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x86: implement support to synchronize RDTSC through MFENCE on AMD CPUs
authorAndi Kleen <ak@suse.de>
Wed, 30 Jan 2008 12:32:37 +0000 (13:32 +0100)
committerIngo Molnar <mingo@elte.hu>
Wed, 30 Jan 2008 12:32:37 +0000 (13:32 +0100)
According to AMD RDTSC can be synchronized through MFENCE.
Implement the necessary CPUID bit for that.

Cc: andreas.herrmann3@amd.com
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

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