+
+ /* Handle TImode as a special case because it is used by some backends
+ (eg. ARM) even though it is not available for normal use. */
-+#if HOST_BITS_PER_WIDE_INT >= 64
++#if HOST_BITS_PER_WIDE_INT >= 65
+ if (bits == TYPE_PRECISION (intTI_type_node))
+ return intTI_type_node;
+#endif
+
+ /* Handle TImode as a special case because it is used by some backends
+ (eg. ARM) even though it is not available for normal use. */
-+#if HOST_BITS_PER_WIDE_INT >= 65
++#if HOST_BITS_PER_WIDE_INT >= 64
+ if (bits == TYPE_PRECISION (intTI_type_node))
+ return intTI_type_node;
+#endif
file://ldflags.patch;patch=1 \
file://fix-ICE-in-arm_unwind_emit_set.diff;patch=1 \
file://cache-amnesia.patch;patch=1 \
- file://gfortran.patch;patch=1 \
+ file://gfortran-4.3.x.patch;patch=1 \
file://gcc-4.0.2-e300c2c3.patch;patch=1 \
# file://pr34130.patch;patch=1 \
# file://fortran-static-linking.patch;patch=1 \
file://ldflags.patch;patch=1 \
file://fix-ICE-in-arm_unwind_emit_set.diff;patch=1 \
file://cache-amnesia.patch;patch=1 \
- file://gfortran.patch;patch=1 \
+ file://gfortran-4.3.x.patch;patch=1 \
file://gcc-4.0.2-e300c2c3.patch;patch=1 \
# file://pr34130.patch;patch=1 \
# file://fortran-static-linking.patch;patch=1 \
file://arm-nolibfloat.patch;patch=1 \
file://arm-softfloat.patch;patch=1 \
file://zecke-xgcc-cpp.patch;patch=1 \
-# file://gfortran.patch;patch=1 \
+# file://gfortran-4.3.x.patch;patch=1 \
# file://fortran-static-linking.patch;patch=1 \
# file://gcc-configure-no-fortran.patch;patch=1;pnum=1 \
# file://gcc-new-makeinfo.patch;patch=1 \
file://gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch;patch=1 \
file://gcc-flags-for-build.patch;patch=1 \
file://gcc-4.3.1-SYSROOT_CFLAGS_FOR_TARGET.patch;patch=1 \
- file://gfortran-csl.patch;patch=1 \
+ file://gfortran-4.3.x.patch;patch=1 \
"