[media] r820t: proper initialize the PLL register
authorMauro Carvalho Chehab <mchehab@redhat.com>
Wed, 10 Apr 2013 18:54:46 +0000 (15:54 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Wed, 17 Apr 2013 00:32:27 +0000 (21:32 -0300)
The rtl-sdr library, from where this driver was initially
based, doesn't use half PLL clock, but this is used on
the Realtek Kernel driver. So, also do the same here.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Tested-by: Antti Palosaari <crope@iki.fi>

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