--- /dev/null
+--- glibc-2.4/stdlib/longlong.h.ark 2006-03-11 22:49:27.000000000 +0100
++++ glibc-2.4/stdlib/longlong.h 2006-03-11 22:55:12.000000000 +0100
+@@ -206,6 +206,14 @@
+ "rI" ((USItype) (bh)), \
+ "r" ((USItype) (al)), \
+ "rI" ((USItype) (bl)) __CLOBBER_CC)
++/* v3m and all higher arches have long multiply support. */
++#if !defined(__ARM_ARCH_2__) && !defined(__ARM_ARCH_3__)
++#define umul_ppmm(xh, xl, a, b) \
++ __asm__ ("umull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#define UMUL_TIME 5
++#define smul_ppmm(xh, xl, a, b) \
++ __asm__ ("smull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#else
+ #define umul_ppmm(xh, xl, a, b) \
+ {register USItype __t0, __t1, __t2; \
+ __asm__ ("%@ Inlined umul_ppmm\n" \
+@@ -227,7 +235,13 @@
+ : "r" ((USItype) (a)), \
+ "r" ((USItype) (b)) __CLOBBER_CC );}
+ #define UMUL_TIME 20
++#endif
+ #define UDIV_TIME 100
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
++#define COUNT_LEADING_ZEROS_0 32
++#endif
++
+ #endif /* __arm__ */
+
+ #if defined (__hppa) && W_TYPE_SIZE == 32
+--- glibc-2.4/ports/sysdeps/arm/mp_clz_tab.c.ark 2006-03-11 22:56:43.000000000 +0100
++++ glibc-2.4/ports/sysdeps/arm/mp_clz_tab.c 2006-03-11 22:58:19.000000000 +0100
+@@ -0,0 +1,24 @@
++/* __clz_tab -- support for longlong.h
++ Copyright (C) 2004 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, write to the Free
++ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
++ 02111-1307 USA. */
++
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++/* Nothing required. */
++#else
++#include <stdlib/mp_clz_tab.c>
++#endif
--- /dev/null
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/memmove.S 2004-03-20 18:37:23.000000000 +0000
+@@ -0,0 +1,251 @@
++/*
++ * Optimized memmove implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memmove (char *dst, const char *src) */
++ENTRY(memmove)
++ subs ip, r0, r1
++ cmphi r2, ip
++ bls memcpy(PLT)
++
++ stmfd sp!, {r0, r4, lr}
++ add r1, r1, r2
++ add r0, r0, r2
++ subs r2, r2, #4
++ blt 25f
++ ands ip, r0, #3
++ PLD( pld [r1, #-4] )
++ bne 26f
++ ands ip, r1, #3
++ bne 27f
++
++19: subs r2, r2, #4
++ blt 24f
++ subs r2, r2, #8
++ blt 23f
++ subs r2, r2, #16
++ blt 22f
++
++ PLD( pld [r1, #-32] )
++ PLD( subs r2, r2, #96 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 21f )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #-64] )
++ PLD( beq 20f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #-96] )
++ PLD( blt 20f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgedb r1!, {r3 - r6} )
++ PLD( stmgedb r0!, {r3 - r6} )
++ PLD( beq 20f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [r1, #-4]! )
++ PLD( ldrge r4, [r1, #-4]! )
++ PLD( ldrgt r5, [r1, #-4]! )
++ PLD( str r3, [r0, #-4]! )
++ PLD( strge r4, [r0, #-4]! )
++ PLD( strgt r5, [r0, #-4]! )
++
++20: PLD( pld [r1, #-96] )
++ PLD( pld [r1, #-128] )
++21: ldmdb r1!, {r3, r4, ip, lr}
++ subs r2, r2, #32
++ stmdb r0!, {r3, r4, ip, lr}
++ ldmdb r1!, {r3, r4, ip, lr}
++ stmgedb r0!, {r3, r4, ip, lr}
++ ldmgedb r1!, {r3, r4, ip, lr}
++ stmgedb r0!, {r3, r4, ip, lr}
++ ldmgedb r1!, {r3, r4, ip, lr}
++ subges r2, r2, #32
++ stmdb r0!, {r3, r4, ip, lr}
++ bge 20b
++ PLD( cmn r2, #96 )
++ PLD( bge 21b )
++ PLD( add r2, r2, #96 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r0, r4, pc}
++
++ tst r2, #16
++22: ldmnedb r1!, {r3, r4, ip, lr}
++ stmnedb r0!, {r3, r4, ip, lr}
++
++ tst r2, #8
++23: ldmnedb r1!, {r3, r4}
++ stmnedb r0!, {r3, r4}
++
++ tst r2, #4
++24: ldrne r3, [r1, #-4]!
++ strne r3, [r0, #-4]!
++
++25: ands r2, r2, #3
++ ldmeqfd sp!, {r0, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [r1, #-1]
++ ldrgeb r4, [r1, #-2]
++ ldrgtb ip, [r1, #-3]
++ strb r3, [r0, #-1]
++ strgeb r4, [r0, #-2]
++ strgtb ip, [r0, #-3]
++ ldmfd sp!, {r0, r4, pc}
++
++26: cmp ip, #2
++ ldrb r3, [r1, #-1]!
++ ldrgeb r4, [r1, #-1]!
++ ldrgtb lr, [r1, #-1]!
++ strb r3, [r0, #-1]!
++ strgeb r4, [r0, #-1]!
++ strgtb lr, [r0, #-1]!
++ subs r2, r2, ip
++ blt 25b
++ ands ip, r1, #3
++ beq 19b
++
++27: bic r1, r1, #3
++ cmp ip, #2
++ ldr r3, [r1]
++ beq 35f
++ blt 36f
++
++
++ .macro backward_copy_shift push pull
++
++ cmp r2, #12
++ PLD( pld [r1, #-4] )
++ blt 33f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 31f
++
++ PLD( subs r2, r2, #96 )
++ PLD( pld [r1, #-32] )
++ PLD( blt 30f )
++ PLD( pld [r1, #-64] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #-96] )
++ PLD( beq 29f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #-128] )
++ PLD( blt 29f )
++ PLD( sub r2, r2, ip )
++28: PLD( mov r4, r3, push #\push )
++ PLD( ldr r3, [r1, #-4]! )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r4, r4, r3, pull #\pull )
++ PLD( str r4, [r0, #-4]! )
++ PLD( bgt 28b )
++
++29: PLD( pld [r1, #-128] )
++30: mov lr, r3, push #\push
++ ldmdb r1!, {r3 - r9, ip}
++ subs r2, r2, #32
++ orr lr, lr, ip, pull #\pull
++ mov ip, ip, push #\push
++ orr ip, ip, r9, pull #\pull
++ mov r9, r9, push #\push
++ orr r9, r9, r8, pull #\pull
++ mov r8, r8, push #\push
++ orr r8, r8, r7, pull #\pull
++ mov r7, r7, push #\push
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb r0!, {r4 - r9, ip, lr}
++ bge 29b
++ PLD( cmn r2, #96 )
++ PLD( bge 30b )
++ PLD( add r2, r2, #96 )
++ cmn r2, #16
++ blt 32f
++31: mov r7, r3, push #\push
++ ldmdb r1!, {r3 - r6}
++ sub r2, r2, #16
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb r0!, {r4 - r7}
++32: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 34f
++33: mov r4, r3, push #\push
++ ldr r3, [r1, #-4]!
++ subs r2, r2, #4
++ orr r4, r4, r3, pull #\pull
++ str r4, [r0, #-4]!
++ bge 33b
++34:
++ .endm
++
++
++ backward_copy_shift push=8 pull=24
++ add r1, r1, #3
++ b 25b
++
++35: backward_copy_shift push=16 pull=16
++ add r1, r1, #2
++ b 25b
++
++36: backward_copy_shift push=24 pull=8
++ add r1, r1, #1
++ b 25b
++
++ .size memmove, . - memmove
++END(memmove)
++libc_hidden_builtin_def (memmove)
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/bcopy.S 2004-03-20 18:37:48.000000000 +0000
+@@ -0,0 +1,255 @@
++/*
++ * Optimized memmove implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++dst .req r1
++src .req r0
++
++/* void *bcopy (const char *src, char *dst, size_t size) */
++ENTRY(bcopy)
++ subs ip, dst, src
++ cmphi r2, ip
++ movls r3, r0
++ movls r0, r1
++ movls r1, r3
++ bls memcpy(PLT)
++
++ stmfd sp!, {r4, lr}
++ add src, src, r2
++ add dst, dst, r2
++ subs r2, r2, #4
++ blt 25f
++ ands ip, dst, #3
++ PLD( pld [src, #-4] )
++ bne 26f
++ ands ip, src, #3
++ bne 27f
++
++19: subs r2, r2, #4
++ blt 24f
++ subs r2, r2, #8
++ blt 23f
++ subs r2, r2, #16
++ blt 22f
++
++ PLD( pld [src, #-32] )
++ PLD( subs r2, r2, #96 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 21f )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, src, #31 )
++ PLD( pld [src, #-64] )
++ PLD( beq 20f )
++ PLD( cmp r2, ip )
++ PLD( pld [src, #-96] )
++ PLD( blt 20f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgedb src!, {r3 - r6} )
++ PLD( stmgedb dst!, {r3 - r6} )
++ PLD( beq 20f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [src, #-4]! )
++ PLD( ldrge r4, [src, #-4]! )
++ PLD( ldrgt r5, [src, #-4]! )
++ PLD( str r3, [dst, #-4]! )
++ PLD( strge r4, [dst, #-4]! )
++ PLD( strgt r5, [dst, #-4]! )
++
++20: PLD( pld [src, #-96] )
++ PLD( pld [src, #-128] )
++21: ldmdb src!, {r3, r4, ip, lr}
++ subs r2, r2, #32
++ stmdb dst!, {r3, r4, ip, lr}
++ ldmdb src!, {r3, r4, ip, lr}
++ stmgedb dst!, {r3, r4, ip, lr}
++ ldmgedb src!, {r3, r4, ip, lr}
++ stmgedb dst!, {r3, r4, ip, lr}
++ ldmgedb src!, {r3, r4, ip, lr}
++ subges r2, r2, #32
++ stmdb dst!, {r3, r4, ip, lr}
++ bge 20b
++ PLD( cmn r2, #96 )
++ PLD( bge 21b )
++ PLD( add r2, r2, #96 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r4, pc}
++
++ tst r2, #16
++22: ldmnedb src!, {r3, r4, ip, lr}
++ stmnedb dst!, {r3, r4, ip, lr}
++
++ tst r2, #8
++23: ldmnedb src!, {r3, r4}
++ stmnedb dst!, {r3, r4}
++
++ tst r2, #4
++24: ldrne r3, [src, #-4]!
++ strne r3, [dst, #-4]!
++
++25: ands r2, r2, #3
++ ldmeqfd sp!, {dst, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [src, #-1]
++ ldrgeb r4, [src, #-2]
++ ldrgtb ip, [src, #-3]
++ strb r3, [dst, #-1]
++ strgeb r4, [dst, #-2]
++ strgtb ip, [dst, #-3]
++ ldmfd sp!, {dst, r4, pc}
++
++26: cmp ip, #2
++ ldrb r3, [src, #-1]!
++ ldrgeb r4, [src, #-1]!
++ ldrgtb lr, [src, #-1]!
++ strb r3, [dst, #-1]!
++ strgeb r4, [dst, #-1]!
++ strgtb lr, [dst, #-1]!
++ subs r2, r2, ip
++ blt 25b
++ ands ip, src, #3
++ beq 19b
++
++27: bic src, src, #3
++ cmp ip, #2
++ ldr r3, [src]
++ beq 35f
++ blt 36f
++
++
++ .macro backward_copy_shift push pull
++
++ cmp r2, #12
++ PLD( pld [src, #-4] )
++ blt 33f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 31f
++
++ PLD( subs r2, r2, #96 )
++ PLD( pld [src, #-32] )
++ PLD( blt 30f )
++ PLD( pld [src, #-64] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, src, #31 )
++ PLD( pld [src, #-96] )
++ PLD( beq 29f )
++ PLD( cmp r2, ip )
++ PLD( pld [src, #-128] )
++ PLD( blt 29f )
++ PLD( sub r2, r2, ip )
++28: PLD( mov r4, r3, push #\push )
++ PLD( ldr r3, [src, #-4]! )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r4, r4, r3, pull #\pull )
++ PLD( str r4, [dst, #-4]! )
++ PLD( bgt 28b )
++
++29: PLD( pld [src, #-128] )
++30: mov lr, r3, push #\push
++ ldmdb src!, {r3 - r9, ip}
++ subs r2, r2, #32
++ orr lr, lr, ip, pull #\pull
++ mov ip, ip, push #\push
++ orr ip, ip, r9, pull #\pull
++ mov r9, r9, push #\push
++ orr r9, r9, r8, pull #\pull
++ mov r8, r8, push #\push
++ orr r8, r8, r7, pull #\pull
++ mov r7, r7, push #\push
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb dst!, {r4 - r9, ip, lr}
++ bge 29b
++ PLD( cmn r2, #96 )
++ PLD( bge 30b )
++ PLD( add r2, r2, #96 )
++ cmn r2, #16
++ blt 32f
++31: mov r7, r3, push #\push
++ ldmdb src!, {r3 - r6}
++ sub r2, r2, #16
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb dst!, {r4 - r7}
++32: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 34f
++33: mov r4, r3, push #\push
++ ldr r3, [src, #-4]!
++ subs r2, r2, #4
++ orr r4, r4, r3, pull #\pull
++ str r4, [dst, #-4]!
++ bge 33b
++34:
++ .endm
++
++
++ backward_copy_shift push=8 pull=24
++ add src, src, #3
++ b 25b
++
++35: backward_copy_shift push=16 pull=16
++ add src, src, #2
++ b 25b
++
++36: backward_copy_shift push=24 pull=8
++ add src, src, #1
++ b 25b
++
++ .size bcopy, . - bcopy
++END(bcopy)
+
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/memcpy.S 2004-05-02 14:33:22.000000000 +0100
+@@ -0,0 +1,242 @@
++/*
++ * Optimized memcpy implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memcpy (char *dst, const char *src) */
++
++ENTRY(memcpy)
++ subs r2, r2, #4
++ stmfd sp!, {r0, r4, lr}
++ blt 7f
++ ands ip, r0, #3
++ PLD( pld [r1, #0] )
++ bne 8f
++ ands ip, r1, #3
++ bne 9f
++
++1: subs r2, r2, #4
++ blt 6f
++ subs r2, r2, #8
++ blt 5f
++ subs r2, r2, #16
++ blt 4f
++
++ PLD( subs r2, r2, #65 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 3f )
++ PLD( pld [r1, #32] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #64] )
++ PLD( beq 2f )
++ PLD( rsb ip, ip, #32 )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #96] )
++ PLD( blt 2f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgeia r1!, {r3 - r6} )
++ PLD( stmgeia r0!, {r3 - r6} )
++ PLD( beq 2f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [r1], #4 )
++ PLD( ldrge r4, [r1], #4 )
++ PLD( ldrgt r5, [r1], #4 )
++ PLD( str r3, [r0], #4 )
++ PLD( strge r4, [r0], #4 )
++ PLD( strgt r5, [r0], #4 )
++
++2: PLD( pld [r1, #96] )
++3: ldmia r1!, {r3 - r8, ip, lr}
++ subs r2, r2, #32
++ stmia r0!, {r3 - r8, ip, lr}
++ bge 2b
++ PLD( cmn r2, #65 )
++ PLD( bge 3b )
++ PLD( add r2, r2, #65 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r0, r4, pc}
++
++ tst r2, #16
++4: ldmneia r1!, {r3, r4, ip, lr}
++ stmneia r0!, {r3, r4, ip, lr}
++
++ tst r2, #8
++5: ldmneia r1!, {r3, r4}
++ stmneia r0!, {r3, r4}
++
++ tst r2, #4
++6: ldrne r3, [r1], #4
++ strne r3, [r0], #4
++
++7: ands r2, r2, #3
++ ldmeqfd sp!, {r0, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [r1], #1
++ ldrgeb r4, [r1], #1
++ ldrgtb ip, [r1]
++ strb r3, [r0], #1
++ strgeb r4, [r0], #1
++ strgtb ip, [r0]
++ ldmfd sp!, {r0, r4, pc}
++
++8: rsb ip, ip, #4
++ cmp ip, #2
++ ldrb r3, [r1], #1
++ ldrgeb r4, [r1], #1
++ ldrgtb lr, [r1], #1
++ strb r3, [r0], #1
++ strgeb r4, [r0], #1
++ strgtb lr, [r0], #1
++ subs r2, r2, ip
++ blt 7b
++ ands ip, r1, #3
++ beq 1b
++
++9: bic r1, r1, #3
++ cmp ip, #2
++ ldr lr, [r1], #4
++ beq 17f
++ bgt 18f
++
++
++ .macro forward_copy_shift pull push
++
++ cmp r2, #12
++ PLD( pld [r1, #0] )
++ blt 15f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 13f
++
++ PLD( subs r2, r2, #97 )
++ PLD( blt 12f )
++ PLD( pld [r1, #32] )
++
++ PLD( @ cache alignment )
++ PLD( rsb ip, r1, #36 )
++ PLD( pld [r1, #64] )
++ PLD( ands ip, ip, #31 )
++ PLD( pld [r1, #96] )
++ PLD( beq 11f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #128] )
++ PLD( blt 11f )
++ PLD( sub r2, r2, ip )
++10: PLD( mov r3, lr, pull #\pull )
++ PLD( ldr lr, [r1], #4 )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r3, r3, lr, push #\push )
++ PLD( str r3, [r0], #4 )
++ PLD( bgt 10b )
++
++11: PLD( pld [r1, #128] )
++12: mov r3, lr, pull #\pull
++ ldmia r1!, {r4 - r9, ip, lr}
++ subs r2, r2, #32
++ orr r3, r3, r4, push #\push
++ mov r4, r4, pull #\pull
++ orr r4, r4, r5, push #\push
++ mov r5, r5, pull #\pull
++ orr r5, r5, r6, push #\push
++ mov r6, r6, pull #\pull
++ orr r6, r6, r7, push #\push
++ mov r7, r7, pull #\pull
++ orr r7, r7, r8, push #\push
++ mov r8, r8, pull #\pull
++ orr r8, r8, r9, push #\push
++ mov r9, r9, pull #\pull
++ orr r9, r9, ip, push #\push
++ mov ip, ip, pull #\pull
++ orr ip, ip, lr, push #\push
++ stmia r0!, {r3 - r9, ip}
++ bge 11b
++ PLD( cmn r2, #97 )
++ PLD( bge 12b )
++ PLD( add r2, r2, #97 )
++ cmn r2, #16
++ blt 14f
++13: mov r3, lr, pull #\pull
++ ldmia r1!, {r4 - r6, lr}
++ sub r2, r2, #16
++ orr r3, r3, r4, push #\push
++ mov r4, r4, pull #\pull
++ orr r4, r4, r5, push #\push
++ mov r5, r5, pull #\pull
++ orr r5, r5, r6, push #\push
++ mov r6, r6, pull #\pull
++ orr r6, r6, lr, push #\push
++ stmia r0!, {r3 - r6}
++14: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 16f
++15: mov r3, lr, pull #\pull
++ ldr lr, [r1], #4
++ subs r2, r2, #4
++ orr r3, r3, lr, push #\push
++ str r3, [r0], #4
++ bge 15b
++16:
++ .endm
++
++
++ forward_copy_shift pull=8 push=24
++ sub r1, r1, #3
++ b 7b
++
++17: forward_copy_shift pull=16 push=16
++ sub r1, r1, #2
++ b 7b
++
++18: forward_copy_shift pull=24 push=8
++ sub r1, r1, #1
++ b 7b
++
++ .size memcpy, . - memcpy
++END(memcpy)
++libc_hidden_builtin_def (memcpy)
++
--- /dev/null
+--- glibc-2.4/elf/Versions.ark 2006-03-11 23:30:09.000000000 +0100
++++ glibc-2.4/elf/Versions 2006-03-11 23:31:44.000000000 +0100
+@@ -63,5 +63,7 @@
+ _dl_debug_state;
+ # Pointer protection.
+ __pointer_chk_guard;
++ # for ldconfig
++ _dl_cache_libcmp;
+ }
+ }
--- /dev/null
+/usr/local/lib
+
--- /dev/null
+--- glibc-2.1.1/sysdeps/unix/sysv/linux/paths.h~ Thu May 27 13:16:33 1999
++++ glibc-2.1.1/sysdeps/unix/sysv/linux/paths.h Thu May 27 13:17:55 1999
+@@ -71,7 +71,7 @@
+ /* Provide trailing slash, since mostly used for building pathnames. */
+ #define _PATH_DEV "/dev/"
+ #define _PATH_TMP "/tmp/"
+-#define _PATH_VARDB "/var/db/"
++#define _PATH_VARDB "/var/lib/misc/"
+ #define _PATH_VARRUN "/var/run/"
+ #define _PATH_VARTMP "/var/tmp/"
+
--- /dev/null
+#!/usr/bin/make
+
+include $(IN)
+
+all:
+ rm -f $(OUT)
+ touch $(OUT)
+ for locale in $(SUPPORTED-LOCALES); do \
+ [ $$locale = true ] && continue; \
+ echo $$locale | sed 's,/, ,' >> $(OUT); \
+ done
--- /dev/null
+/* Copyright (C) 1997, 1998, 2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#ifndef _SYS_SELECT_H
+# error "Never use <bits/select.h> directly; include <sys/select.h> instead."
+#endif
+
+
+/* We don't use `memset' because this would require a prototype and
+ the array isn't too big. */
+#define __FD_ZERO(s) \
+ do { \
+ unsigned int __i; \
+ fd_set *__arr = (s); \
+ for (__i = 0; __i < sizeof (fd_set) / sizeof (__fd_mask); ++__i) \
+ __FDS_BITS (__arr)[__i] = 0; \
+ } while (0)
+#define __FD_SET(d, s) (__FDS_BITS (s)[__FDELT(d)] |= __FDMASK(d))
+#define __FD_CLR(d, s) (__FDS_BITS (s)[__FDELT(d)] &= ~__FDMASK(d))
+#define __FD_ISSET(d, s) ((__FDS_BITS (s)[__FDELT(d)] & __FDMASK(d)) != 0)
--- /dev/null
+/* System-dependent timing definitions. Generic version.
+ Copyright (C) 1996,1997,1999-2002,2003 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+/*
+ * Never include this file directly; use <time.h> instead.
+ */
+
+#ifndef __need_timeval
+# ifndef _BITS_TIME_H
+# define _BITS_TIME_H 1
+
+/* ISO/IEC 9899:1990 7.12.1: <time.h>
+ The macro `CLOCKS_PER_SEC' is the number per second of the value
+ returned by the `clock' function. */
+/* CAE XSH, Issue 4, Version 2: <time.h>
+ The value of CLOCKS_PER_SEC is required to be 1 million on all
+ XSI-conformant systems. */
+# define CLOCKS_PER_SEC 1000000l
+
+# if !defined __STRICT_ANSI__ && !defined __USE_XOPEN2K
+/* Even though CLOCKS_PER_SEC has such a strange value CLK_TCK
+ presents the real value for clock ticks per second for the system. */
+# include <bits/types.h>
+extern long int __sysconf (int);
+# define CLK_TCK ((__clock_t) __sysconf (2)) /* 2 is _SC_CLK_TCK */
+# endif
+
+# ifdef __USE_POSIX199309
+/* Identifier for system-wide realtime clock. */
+# define CLOCK_REALTIME 0
+/* Monotonic system-wide clock. */
+# define CLOCK_MONOTONIC 1
+/* High-resolution timer from the CPU. */
+# define CLOCK_PROCESS_CPUTIME_ID 2
+/* Thread-specific CPU-time clock. */
+# define CLOCK_THREAD_CPUTIME_ID 3
+
+/* Flag to indicate time is absolute. */
+# define TIMER_ABSTIME 1
+# endif
+
+# endif /* bits/time.h */
+#endif
+
+#ifdef __need_timeval
+# undef __need_timeval
+# ifndef _STRUCT_TIMEVAL
+# define _STRUCT_TIMEVAL 1
+# include <bits/types.h>
+
+/* A time value that is accurate to the nearest
+ microsecond but also has a range of years. */
+struct timeval
+ {
+ __time_t tv_sec; /* Seconds. */
+ __suseconds_t tv_usec; /* Microseconds. */
+ };
+# endif /* struct timeval */
+#endif /* need timeval */
--- /dev/null
+/* bits/types.h -- definitions of __*_t types underlying *_t types.
+ Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+/*
+ * Never include this file directly; use <sys/types.h> instead.
+ */
+
+#ifndef _BITS_TYPES_H
+#define _BITS_TYPES_H 1
+
+#include <features.h>
+#include <bits/wordsize.h>
+
+#define __need_size_t
+#include <stddef.h>
+
+/* Convenience types. */
+typedef unsigned char __u_char;
+typedef unsigned short int __u_short;
+typedef unsigned int __u_int;
+typedef unsigned long int __u_long;
+
+/* Fixed-size types, underlying types depend on word size and compiler. */
+typedef signed char __int8_t;
+typedef unsigned char __uint8_t;
+typedef signed short int __int16_t;
+typedef unsigned short int __uint16_t;
+typedef signed int __int32_t;
+typedef unsigned int __uint32_t;
+#if __WORDSIZE == 64
+typedef signed long int __int64_t;
+typedef unsigned long int __uint64_t;
+#elif defined __GLIBC_HAVE_LONG_LONG
+__extension__ typedef signed long long int __int64_t;
+__extension__ typedef unsigned long long int __uint64_t;
+#endif
+
+/* quad_t is also 64 bits. */
+#if __WORDSIZE == 64
+typedef long int __quad_t;
+typedef unsigned long int __u_quad_t;
+#elif defined __GLIBC_HAVE_LONG_LONG
+__extension__ typedef long long int __quad_t;
+__extension__ typedef unsigned long long int __u_quad_t;
+#else
+typedef struct
+{
+ long __val[2];
+} __quad_t;
+typedef struct
+{
+ __u_long __val[2];
+} __u_quad_t;
+#endif
+
+
+/* The machine-dependent file <bits/typesizes.h> defines __*_T_TYPE
+ macros for each of the OS types we define below. The definitions
+ of those macros must use the following macros for underlying types.
+ We define __S<SIZE>_TYPE and __U<SIZE>_TYPE for the signed and unsigned
+ variants of each of the following integer types on this machine.
+
+ 16 -- "natural" 16-bit type (always short)
+ 32 -- "natural" 32-bit type (always int)
+ 64 -- "natural" 64-bit type (long or long long)
+ LONG32 -- 32-bit type, traditionally long
+ QUAD -- 64-bit type, always long long
+ WORD -- natural type of __WORDSIZE bits (int or long)
+ LONGWORD -- type of __WORDSIZE bits, traditionally long
+
+ We distinguish WORD/LONGWORD, 32/LONG32, and 64/QUAD so that the
+ conventional uses of `long' or `long long' type modifiers match the
+ types we define, even when a less-adorned type would be the same size.
+ This matters for (somewhat) portably writing printf/scanf formats for
+ these types, where using the appropriate l or ll format modifiers can
+ make the typedefs and the formats match up across all GNU platforms. If
+ we used `long' when it's 64 bits where `long long' is expected, then the
+ compiler would warn about the formats not matching the argument types,
+ and the programmer changing them to shut up the compiler would break the
+ program's portability.
+
+ Here we assume what is presently the case in all the GCC configurations
+ we support: long long is always 64 bits, long is always word/address size,
+ and int is always 32 bits. */
+
+#define __S16_TYPE short int
+#define __U16_TYPE unsigned short int
+#define __S32_TYPE int
+#define __U32_TYPE unsigned int
+#define __SLONGWORD_TYPE long int
+#define __ULONGWORD_TYPE unsigned long int
+#if __WORDSIZE == 32
+# define __SQUAD_TYPE __quad_t
+# define __UQUAD_TYPE __u_quad_t
+# define __SWORD_TYPE int
+# define __UWORD_TYPE unsigned int
+# define __SLONG32_TYPE long int
+# define __ULONG32_TYPE unsigned long int
+# define __S64_TYPE __quad_t
+# define __U64_TYPE __u_quad_t
+/* We want __extension__ before typedef's that use nonstandard base types
+ such as `long long' in C89 mode. */
+# define __STD_TYPE __extension__ typedef
+#elif __WORDSIZE == 64
+# define __SQUAD_TYPE long int
+# define __UQUAD_TYPE unsigned long int
+# define __SWORD_TYPE long int
+# define __UWORD_TYPE unsigned long int
+# define __SLONG32_TYPE int
+# define __ULONG32_TYPE unsigned int
+# define __S64_TYPE long int
+# define __U64_TYPE unsigned long int
+/* No need to mark the typedef with __extension__. */
+# define __STD_TYPE typedef
+#else
+# error
+#endif
+#include <bits/typesizes.h> /* Defines __*_T_TYPE macros. */
+
+
+__STD_TYPE __DEV_T_TYPE __dev_t; /* Type of device numbers. */
+__STD_TYPE __UID_T_TYPE __uid_t; /* Type of user identifications. */
+__STD_TYPE __GID_T_TYPE __gid_t; /* Type of group identifications. */
+__STD_TYPE __INO_T_TYPE __ino_t; /* Type of file serial numbers. */
+__STD_TYPE __INO64_T_TYPE __ino64_t; /* Type of file serial numbers (LFS).*/
+__STD_TYPE __MODE_T_TYPE __mode_t; /* Type of file attribute bitmasks. */
+__STD_TYPE __NLINK_T_TYPE __nlink_t; /* Type of file link counts. */
+__STD_TYPE __OFF_T_TYPE __off_t; /* Type of file sizes and offsets. */
+__STD_TYPE __OFF64_T_TYPE __off64_t; /* Type of file sizes and offsets (LFS). */
+__STD_TYPE __PID_T_TYPE __pid_t; /* Type of process identifications. */
+__STD_TYPE __FSID_T_TYPE __fsid_t; /* Type of file system IDs. */
+__STD_TYPE __CLOCK_T_TYPE __clock_t; /* Type of CPU usage counts. */
+__STD_TYPE __RLIM_T_TYPE __rlim_t; /* Type for resource measurement. */
+__STD_TYPE __RLIM64_T_TYPE __rlim64_t; /* Type for resource measurement (LFS). */
+__STD_TYPE __ID_T_TYPE __id_t; /* General type for IDs. */
+__STD_TYPE __TIME_T_TYPE __time_t; /* Seconds since the Epoch. */
+__STD_TYPE __USECONDS_T_TYPE __useconds_t; /* Count of microseconds. */
+__STD_TYPE __SUSECONDS_T_TYPE __suseconds_t; /* Signed count of microseconds. */
+
+__STD_TYPE __DADDR_T_TYPE __daddr_t; /* The type of a disk address. */
+__STD_TYPE __SWBLK_T_TYPE __swblk_t; /* Type of a swap block maybe? */
+__STD_TYPE __KEY_T_TYPE __key_t; /* Type of an IPC key. */
+
+/* Clock ID used in clock and timer functions. */
+__STD_TYPE __CLOCKID_T_TYPE __clockid_t;
+
+/* Timer ID returned by `timer_create'. */
+__STD_TYPE __TIMER_T_TYPE __timer_t;
+
+/* Type to represent block size. */
+__STD_TYPE __BLKSIZE_T_TYPE __blksize_t;
+
+/* Types from the Large File Support interface. */
+
+/* Type to count number of disk blocks. */
+__STD_TYPE __BLKCNT_T_TYPE __blkcnt_t;
+__STD_TYPE __BLKCNT64_T_TYPE __blkcnt64_t;
+
+/* Type to count file system blocks. */
+__STD_TYPE __FSBLKCNT_T_TYPE __fsblkcnt_t;
+__STD_TYPE __FSBLKCNT64_T_TYPE __fsblkcnt64_t;
+
+/* Type to count file system nodes. */
+__STD_TYPE __FSFILCNT_T_TYPE __fsfilcnt_t;
+__STD_TYPE __FSFILCNT64_T_TYPE __fsfilcnt64_t;
+
+__STD_TYPE __SSIZE_T_TYPE __ssize_t; /* Type of a byte count, or error. */
+
+/* These few don't really vary by system, they always correspond
+ to one of the other defined types. */
+typedef __off64_t __loff_t; /* Type of file sizes and offsets (LFS). */
+typedef __quad_t *__qaddr_t;
+typedef char *__caddr_t;
+
+/* Duplicates info from stdint.h but this is used in unistd.h. */
+__STD_TYPE __SWORD_TYPE __intptr_t;
+
+/* Duplicate info from sys/socket.h. */
+__STD_TYPE __U32_TYPE __socklen_t;
+
+
+#undef __STD_TYPE
+
+#endif /* bits/types.h */
--- /dev/null
+/* bits/typesizes.h -- underlying types for *_t. Generic version.
+ Copyright (C) 2002, 2003 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#ifndef _BITS_TYPES_H
+# error "Never include <bits/typesizes.h> directly; use <sys/types.h> instead."
+#endif
+
+#ifndef _BITS_TYPESIZES_H
+#define _BITS_TYPESIZES_H 1
+
+/* See <bits/types.h> for the meaning of these macros. This file exists so
+ that <bits/types.h> need not vary across different GNU platforms. */
+
+#define __DEV_T_TYPE __UQUAD_TYPE
+#define __UID_T_TYPE __U32_TYPE
+#define __GID_T_TYPE __U32_TYPE
+#define __INO_T_TYPE __ULONGWORD_TYPE
+#define __INO64_T_TYPE __UQUAD_TYPE
+#define __MODE_T_TYPE __U32_TYPE
+#define __NLINK_T_TYPE __UWORD_TYPE
+#define __OFF_T_TYPE __SLONGWORD_TYPE
+#define __OFF64_T_TYPE __SQUAD_TYPE
+#define __PID_T_TYPE __S32_TYPE
+#define __RLIM_T_TYPE __ULONGWORD_TYPE
+#define __RLIM64_T_TYPE __UQUAD_TYPE
+#define __BLKCNT_T_TYPE __SLONGWORD_TYPE
+#define __BLKCNT64_T_TYPE __SQUAD_TYPE
+#define __FSBLKCNT_T_TYPE __ULONGWORD_TYPE
+#define __FSBLKCNT64_T_TYPE __UQUAD_TYPE
+#define __FSFILCNT_T_TYPE __ULONGWORD_TYPE
+#define __FSFILCNT64_T_TYPE __UQUAD_TYPE
+#define __ID_T_TYPE __U32_TYPE
+#define __CLOCK_T_TYPE __SLONGWORD_TYPE
+#define __TIME_T_TYPE __SLONGWORD_TYPE
+#define __USECONDS_T_TYPE __U32_TYPE
+#define __SUSECONDS_T_TYPE __SLONGWORD_TYPE
+#define __DADDR_T_TYPE __S32_TYPE
+#define __SWBLK_T_TYPE __SLONGWORD_TYPE
+#define __KEY_T_TYPE __S32_TYPE
+#define __CLOCKID_T_TYPE __S32_TYPE
+#define __TIMER_T_TYPE void *
+#define __BLKSIZE_T_TYPE __SLONGWORD_TYPE
+#define __FSID_T_TYPE struct { int __val[2]; }
+#define __SSIZE_T_TYPE __SWORD_TYPE
+
+/* Number of descriptors that can fit in an `fd_set'. */
+#define __FD_SETSIZE 1024
+
+
+#endif /* bits/typesizes.h */
--- /dev/null
+# All lines beginning with `# DP:' are a description of the patch.
+# DP: Description: allow dynamic long-running processes to
+# DP: re-read a dynamically updated resolv.conf on the fly
+# DP: Dpatch author: Adam Conrad <adconrad@ubuntu.com>
+# DP: Patch author: Thorsten Kukuk <kukuk@suse.de>
+# DP: Upstream status: Ubuntu-Specific
+# DP: Date: 2006-01-13 08:14:21 UTC
+
+Index: resolv/res_libc.c
+===================================================================
+--- resolv/res_libc.c.orig
++++ resolv/res_libc.c
+@@ -22,7 +22,7 @@
+ #include <arpa/nameser.h>
+ #include <resolv.h>
+ #include <bits/libc-lock.h>
+-
++#include <sys/stat.h>
+
+ /* The following bit is copied from res_data.c (where it is #ifdef'ed
+ out) since res_init() should go into libc.so but the rest of that
+@@ -94,8 +94,17 @@
+ int
+ __res_maybe_init (res_state resp, int preinit)
+ {
+- if (resp->options & RES_INIT) {
+- if (__res_initstamp != resp->_u._ext.initstamp) {
++ static time_t last_mtime;
++ struct stat statbuf;
++ int ret;
++
++
++ if (resp->options & RES_INIT) {
++ ret = stat (_PATH_RESCONF, &statbuf);
++ if (__res_initstamp != resp->_u._ext.initstamp
++ || (ret == 0) && (last_mtime != statbuf.st_mtime))
++ {
++ last_mtime = statbuf.st_mtime;
+ if (resp->nscount > 0) {
+ __res_iclose (resp, true);
+ return __res_vinit (resp, 1);
--- /dev/null
+Source: http://sourceware.org/ml/libc-alpha/2008-01/msg00017.html
+
+I am checking this x86 assembler patch:
+
+http://sourceware.org/ml/binutils/2008-01/msg00148.html
+
+to check operand size. fnstsw stores 16bit into %ax. The upper
+16bit of %eax is unchanged. The new assembler will disallow
+"fnstsw %eax". Here is a patch for glibc.
+
+
+H.J.
+
+---
+ sysdeps/i386/fpu/ftestexcept.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+Index: glibc-2.6.1/sysdeps/i386/fpu/ftestexcept.c
+===================================================================
+--- glibc-2.6.1.orig/sysdeps/i386/fpu/ftestexcept.c 2008-07-19 11:00:45.000000000 -0700
++++ glibc-2.6.1/sysdeps/i386/fpu/ftestexcept.c 2008-07-19 11:01:25.000000000 -0700
+@@ -26,7 +26,7 @@
+ int
+ fetestexcept (int excepts)
+ {
+- int temp;
++ short temp;
+ int xtemp = 0;
+
+ /* Get current exceptions. */
--- /dev/null
+http://sourceware.org/ml/libc-ports/2008-04/msg00005.html
+
+
+Index: glibc-2.6.1/ports/sysdeps/unix/sysv/linux/arm/ioperm.c
+===================================================================
+--- glibc-2.6.1.orig/ports/sysdeps/unix/sysv/linux/arm/ioperm.c 2008-09-12 18:08:18.000000000 -0700
++++ glibc-2.6.1/ports/sysdeps/unix/sysv/linux/arm/ioperm.c 2008-09-12 18:08:28.000000000 -0700
+@@ -45,7 +45,6 @@
+ #include <sys/mman.h>
+
+ #include <linux/version.h>
+-#include <asm/page.h>
+ #include <sys/sysctl.h>
+
+ #define PATH_ARM_SYSTYPE "/etc/arm_systype"
--- /dev/null
+From libc-ports-return-550-listarch-libc-ports=sources dot redhat dot com at sourceware dot org Tue Oct 31 17:37:21 2006
+Return-Path: <libc-ports-return-550-listarch-libc-ports=sources dot redhat dot com at sourceware dot org>
+Delivered-To: listarch-libc-ports at sources dot redhat dot com
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+Date: Tue, 31 Oct 2006 12:37:08 -0500
+From: Daniel Jacobowitz <drow at false dot org>
+To: Mike Frysinger <vapier at gentoo dot org>
+Cc: libc-ports at sourceware dot org, Philip Balister <philip dot balister at gmail dot com>
+Subject: Re: Problem with glibc-2.5 on ARM
+Message-ID: <20061031173708.GJ20468@nevyn.them.org>
+References: <499146270610241149ibe030e0nd9d6b177a95b346e@mail.gmail.com> <499146270610241254u7cadf63ej2edf05cedbc5266f@mail.gmail.com> <20061024195837.GA20181@nevyn.them.org> <200610291954.27022.vapier@gentoo.org>
+MIME-Version: 1.0
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+In-Reply-To: <200610291954 dot 27022 dot vapier at gentoo dot org>
+User-Agent: Mutt/1.5.13 (2006-08-11)
+X-IsSubscribed: yes
+Mailing-List: contact libc-ports-help at sourceware dot org; run by ezmlm
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+
+On Sun, Oct 29, 2006 at 07:54:25PM -0500, Mike Frysinger wrote:
+> On Tuesday 24 October 2006 15:58, Daniel Jacobowitz wrote:
+> > ARM is going to need a slightly different version of that file, I
+> > guess.
+>
+> would declaring req with attribute packed not help ?
+> -mike
+
+Nope. "struct rtgenmsg" would still have size 4.
+
+Philip, are you still at all interested in this for the old ABI?
+I don't have time to test this patch right now, but I think it
+will work.
+
+--
+Daniel Jacobowitz
+CodeSourcery
+
+2006-10-31 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * sysdeps/unix/sysv/linux/arm/check_pf.c: New file.
+ * sysdeps/unix/sysv/linux/arm/eabi/check_pf.c: New file.
+
+Index: sysdeps/unix/sysv/linux/arm/check_pf.c
+===================================================================
+RCS file: sysdeps/unix/sysv/linux/arm/check_pf.c
+diff -N sysdeps/unix/sysv/linux/arm/check_pf.c
+--- /dev/null 1 Jan 1970 00:00:00 -0000
++++ sysdeps/unix/sysv/linux/arm/check_pf.c 31 Oct 2006 17:29:58 -0000
+@@ -0,0 +1,274 @@
++/* Determine protocol families for which interfaces exist. ARM Linux version.
++ Copyright (C) 2003, 2006 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, write to the Free
++ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
++ 02111-1307 USA. */
++
++#include <assert.h>
++#include <errno.h>
++#include <ifaddrs.h>
++#include <netdb.h>
++#include <stddef.h>
++#include <string.h>
++#include <time.h>
++#include <unistd.h>
++#include <sys/socket.h>
++
++#include <asm/types.h>
++#include <linux/netlink.h>
++#include <linux/rtnetlink.h>
++
++#include <not-cancel.h>
++#include <kernel-features.h>
++
++
++#ifndef IFA_F_TEMPORARY
++# define IFA_F_TEMPORARY IFA_F_SECONDARY
++#endif
++#ifndef IFA_F_HOMEADDRESS
++# define IFA_F_HOMEADDRESS 0
++#endif
++
++
++static int
++make_request (int fd, pid_t pid, bool *seen_ipv4, bool *seen_ipv6,
++ struct in6addrinfo **in6ai, size_t *in6ailen)
++{
++ struct req
++ {
++ struct nlmsghdr nlh;
++ struct rtgenmsg g;
++ } req;
++ struct sockaddr_nl nladdr;
++
++ /* struct rtgenmsg consists of a single byte but the ARM ABI rounds
++ it up to a word. Clear the padding explicitly here. */
++ assert (sizeof (req.g) == 4);
++ memset (&req.g, '\0', sizeof (req.g));
++
++ req.nlh.nlmsg_len = sizeof (req);
++ req.nlh.nlmsg_type = RTM_GETADDR;
++ req.nlh.nlmsg_flags = NLM_F_ROOT | NLM_F_MATCH | NLM_F_REQUEST;
++ req.nlh.nlmsg_pid = 0;
++ req.nlh.nlmsg_seq = time (NULL);
++ req.g.rtgen_family = AF_UNSPEC;
++
++ memset (&nladdr, '\0', sizeof (nladdr));
++ nladdr.nl_family = AF_NETLINK;
++
++ if (TEMP_FAILURE_RETRY (__sendto (fd, (void *) &req, sizeof (req), 0,
++ (struct sockaddr *) &nladdr,
++ sizeof (nladdr))) < 0)
++ return -1;
++
++ *seen_ipv4 = false;
++ *seen_ipv6 = false;
++
++ bool done = false;
++ char buf[4096];
++ struct iovec iov = { buf, sizeof (buf) };
++ struct in6ailist
++ {
++ struct in6addrinfo info;
++ struct in6ailist *next;
++ } *in6ailist = NULL;
++ size_t in6ailistlen = 0;
++
++ do
++ {
++ struct msghdr msg =
++ {
++ (void *) &nladdr, sizeof (nladdr),
++ &iov, 1,
++ NULL, 0,
++ 0
++ };
++
++ ssize_t read_len = TEMP_FAILURE_RETRY (__recvmsg (fd, &msg, 0));
++ if (read_len < 0)
++ return -1;
++
++ if (msg.msg_flags & MSG_TRUNC)
++ return -1;
++
++ struct nlmsghdr *nlmh;
++ for (nlmh = (struct nlmsghdr *) buf;
++ NLMSG_OK (nlmh, (size_t) read_len);
++ nlmh = (struct nlmsghdr *) NLMSG_NEXT (nlmh, read_len))
++ {
++ if (nladdr.nl_pid != 0 || (pid_t) nlmh->nlmsg_pid != pid
++ || nlmh->nlmsg_seq != req.nlh.nlmsg_seq)
++ continue;
++
++ if (nlmh->nlmsg_type == RTM_NEWADDR)
++ {
++ struct ifaddrmsg *ifam = (struct ifaddrmsg *) NLMSG_DATA (nlmh);
++
++ switch (ifam->ifa_family)
++ {
++ case AF_INET:
++ *seen_ipv4 = true;
++ break;
++ case AF_INET6:
++ *seen_ipv6 = true;
++
++ if (ifam->ifa_flags & (IFA_F_DEPRECATED
++ | IFA_F_TEMPORARY
++ | IFA_F_HOMEADDRESS))
++ {
++ struct rtattr *rta = IFA_RTA (ifam);
++ size_t len = (nlmh->nlmsg_len
++ - NLMSG_LENGTH (sizeof (*ifam)));
++ void *local = NULL;
++ void *address = NULL;
++ while (RTA_OK (rta, len))
++ {
++ switch (rta->rta_type)
++ {
++ case IFA_LOCAL:
++ local = RTA_DATA (rta);
++ break;
++
++ case IFA_ADDRESS:
++ address = RTA_DATA (rta);
++ break;
++ }
++
++ rta = RTA_NEXT (rta, len);
++ }
++
++ struct in6ailist *newp = alloca (sizeof (*newp));
++ newp->info.flags = (((ifam->ifa_flags & IFA_F_DEPRECATED)
++ ? in6ai_deprecated : 0)
++ | ((ifam->ifa_flags
++ & IFA_F_TEMPORARY)
++ ? in6ai_temporary : 0)
++ | ((ifam->ifa_flags
++ & IFA_F_HOMEADDRESS)
++ ? in6ai_homeaddress : 0));
++ memcpy (newp->info.addr, address ?: local,
++ sizeof (newp->info.addr));
++ newp->next = in6ailist;
++ in6ailist = newp;
++ ++in6ailistlen;
++ }
++ break;
++ default:
++ /* Ignore. */
++ break;
++ }
++ }
++ else if (nlmh->nlmsg_type == NLMSG_DONE)
++ /* We found the end, leave the loop. */
++ done = true;
++ }
++ }
++ while (! done);
++
++ close_not_cancel_no_status (fd);
++
++ if (in6ailist != NULL)
++ {
++ *in6ai = malloc (in6ailistlen * sizeof (**in6ai));
++ if (*in6ai == NULL)
++ return -1;
++
++ *in6ailen = in6ailistlen;
++
++ do
++ {
++ (*in6ai)[--in6ailistlen] = in6ailist->info;
++ in6ailist = in6ailist->next;
++ }
++ while (in6ailist != NULL);
++ }
++
++ return 0;
++}
++
++
++/* We don't know if we have NETLINK support compiled in in our
++ Kernel. */
++#if __ASSUME_NETLINK_SUPPORT == 0
++/* Define in ifaddrs.h. */
++extern int __no_netlink_support attribute_hidden;
++#else
++# define __no_netlink_support 0
++#endif
++
++
++void
++attribute_hidden
++__check_pf (bool *seen_ipv4, bool *seen_ipv6,
++ struct in6addrinfo **in6ai, size_t *in6ailen)
++{
++ *in6ai = NULL;
++ *in6ailen = 0;
++
++ if (! __no_netlink_support)
++ {
++ int fd = __socket (PF_NETLINK, SOCK_RAW, NETLINK_ROUTE);
++
++ struct sockaddr_nl nladdr;
++ memset (&nladdr, '\0', sizeof (nladdr));
++ nladdr.nl_family = AF_NETLINK;
++
++ socklen_t addr_len = sizeof (nladdr);
++
++ if (fd >= 0
++ && __bind (fd, (struct sockaddr *) &nladdr, sizeof (nladdr)) == 0
++ && __getsockname (fd, (struct sockaddr *) &nladdr, &addr_len) == 0
++ && make_request (fd, nladdr.nl_pid, seen_ipv4, seen_ipv6,
++ in6ai, in6ailen) == 0)
++ /* It worked. */
++ return;
++
++ if (fd >= 0)
++ __close (fd);
++
++#if __ASSUME_NETLINK_SUPPORT == 0
++ /* Remember that there is no netlink support. */
++ __no_netlink_support = 1;
++#else
++ /* We cannot determine what interfaces are available. Be
++ pessimistic. */
++ *seen_ipv4 = true;
++ *seen_ipv6 = true;
++#endif
++ }
++
++#if __ASSUME_NETLINK_SUPPORT == 0
++ /* No netlink. Get the interface list via getifaddrs. */
++ struct ifaddrs *ifa = NULL;
++ if (getifaddrs (&ifa) != 0)
++ {
++ /* We cannot determine what interfaces are available. Be
++ pessimistic. */
++ *seen_ipv4 = true;
++ *seen_ipv6 = true;
++ return;
++ }
++
++ struct ifaddrs *runp;
++ for (runp = ifa; runp != NULL; runp = runp->ifa_next)
++ if (runp->ifa_addr->sa_family == PF_INET)
++ *seen_ipv4 = true;
++ else if (runp->ifa_addr->sa_family == PF_INET6)
++ *seen_ipv6 = true;
++
++ (void) freeifaddrs (ifa);
++#endif
++}
+Index: sysdeps/unix/sysv/linux/arm/eabi/check_pf.c
+===================================================================
+RCS file: sysdeps/unix/sysv/linux/arm/eabi/check_pf.c
+diff -N sysdeps/unix/sysv/linux/arm/eabi/check_pf.c
+--- /dev/null 1 Jan 1970 00:00:00 -0000
++++ sysdeps/unix/sysv/linux/arm/eabi/check_pf.c 31 Oct 2006 17:29:58 -0000
+@@ -0,0 +1 @@
++#include <sysdeps/unix/sysv/linux/check_pf.c>
+
--- /dev/null
+diff -urN glibc-2.6.1/ports/sysdeps/arm/eabi/bits/fenv.h glibc-2.6.1/ports/sysdeps/arm/eabi/bits/fenv.h
+--- glibc-2.6.1/ports/sysdeps/arm/eabi/bits/fenv.h 2008-04-04 18:32:58.000000000 +1000
++++ glibc-2.6.1/ports/sysdeps/arm/eabi/bits/fenv.h 2008-04-07 10:40:28.000000000 +1000
+@@ -20,6 +20,8 @@
+ # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
+ #endif
+
++#if 0
++
+ /* Define bits representing exceptions in the VFP FPU status word. */
+ enum
+ {
+@@ -55,37 +57,50 @@
+ #define FE_TOWARDZERO FE_TOWARDZERO
+ };
+
++#endif
++
+ /* Define bits representing exceptions in the CRUNCH FPU status word. */
+ enum
+ {
+ FE_CRUNCH_INVALID = (1),
+ #define FE_CRUNCH_INVALID FE_CRUNCH_INVALID
++#define FE_INVALID FE_CRUNCH_INVALID
++#define FE_DIVBYZERO 0
+ FE_CRUNCH_OVERFLOW = (4),
+ #define FE_CRUNCH_OVERFLOW FE_CRUNCH_OVERFLOW
++#define FE_OVERFLOW FE_CRUNCH_OVERFLOW
+ FE_CRUNCH_UNDERFLOW = (8),
+ #define FE_CRUNCH_UNDERFLOW FE_CRUNCH_UNDERFLOW
++#define FE_UNDERFLOW FE_CRUNCH_UNDERFLOW
+ FE_CRUNCH_INEXACT = (16),
+ #define FE_CRUNCH_INEXACT FE_CRUNCH_INEXACT
++#define FE_INEXACT FE_CRUNCH_INEXACT
+ };
+
+ /* Amount to shift by to convert an exception to a mask bit. */
+ #define FE_CRUNCH_EXCEPT_SHIFT 5
++#define FE_EXCEPT_SHIFT FE_CRUNCH_EXCEPT_SHIFT
+
+ /* All supported exceptions, except DIVBYZERO. */
+ #define FE_CRUNCH_ALL_EXCEPT \
+ (FE_CRUNCH_INVALID | FE_CRUNCH_OVERFLOW | FE_CRUNCH_UNDERFLOW | FE_CRUNCH_INEXACT)
++#define FE_ALL_EXCEPT FE_CRUNCH_ALL_EXCEPT
+
+ /* CRUNCH supports all of the four defined rounding modes. */
+ enum
+ {
+ FE_CRUNCH_TONEAREST = 0,
+ #define FE_CRUNCH_TONEAREST FE_CRUNCH_TONEAREST
++#define FE_TONEAREST FE_CRUNCH_TONEAREST
+ FE_CRUNCH_TOWARDZERO = 0x400,
+ #define FE_CRUNCH_TOWARDZERO FE_CRUNCH_TOWARDZERO
++#define FE_TOWARDZERO FE_CRUNCH_TOWARDZERO
+ FE_CRUNCH_DOWNWARD = 0x800,
+ #define FE_CRUNCH_DOWNWARD FE_CRUNCH_DOWNWARD
++#define FE_DOWNWARD FE_CRUNCH_DOWNWARD
+ FE_CRUNCH_UPWARD = 0xc00
+ #define FE_CRUNCH_UPWARD FE_CRUNCH_UPWARD
++#define FE_UPWARD FE_CRUNCH_UPWARD
+ };
+
+
+diff -urN glibc-2.6.1/ports/sysdeps/arm/eabi/fpu_control.h glibc-2.6.1/ports/sysdeps/arm/eabi/fpu_control.h
+--- glibc-2.6.1/ports/sysdeps/arm/eabi/fpu_control.h 2008-04-04 18:32:58.000000000 +1000
++++ glibc-2.6.1/ports/sysdeps/arm/eabi/fpu_control.h 2008-04-07 11:02:13.000000000 +1000
+@@ -20,6 +20,8 @@
+ #ifndef _FPU_CONTROL_H
+ #define _FPU_CONTROL_H
+
++#if 0
++
+ /* masking of interrupts */
+ #define _FPU_MASK_IM 0x00000100 /* invalid operation */
+ #define _FPU_MASK_ZM 0x00000200 /* divide by zero */
+@@ -45,6 +47,11 @@
+ #define _FPU_SETCW(cw) \
+ __asm__ __volatile__ ("mcr p10, 7, %0, cr1, cr0, 0" : : "r" (cw))
+
++#endif
++
+ /* CRUNCH SECTION */
+
++/* Type of the control word. */
++typedef unsigned int fpu_control_t;
++
+ /* DSPSC register: (from EP9312 User's Guide)
+@@ -69,19 +73,27 @@
+
+ /* masking of interrupts */
+ #define _FPU_CRUNCH_MASK_IM (1 << 5) /* invalid operation */
++#define _FPU_MASK_IM _FPU_CRUNCH_MASK_IM
+ #define _FPU_CRUNCH_MASK_ZM 0 /* divide by zero */
++#define _FPU_MASK_ZM _FPU_CRUNCH_MASK_ZM
+ #define _FPU_CRUNCH_MASK_OM (1 << 7) /* overflow */
++#define _FPU_MASK_OM _FPU_CRUNCH_MASK_OM
+ #define _FPU_CRUNCH_MASK_UM (1 << 8) /* underflow */
++#define _FPU_MASK_UM _FPU_CRUNCH_MASK_UM
+ #define _FPU_CRUNCH_MASK_PM (1 << 9) /* inexact */
++#define _FPU_MASK_PM _FPU_CRUNCH_MASK_PM
+ #define _FPU_CRUNCH_MASK_DM 0 /* denormalized operation */
++#undef _FPU_MASK_DM
+
+ /* Some bits in the FPSCR are not yet defined. They must be preserved when
+ modifying the contents. */
+ #define _FPU_CRUNCH_RESERVED 0x03000042
++#define _FPU_RESERVED _FPU_CRUNCH_RESERVED
+ #define _FPU_CRUNCH_DEFAULT 0x00b00000
++#define _FPU_DEFAULT _FPU_CRUNCH_DEFAULT
+ /* Default + exceptions enabled. */
+ #define _FPU_CRUNCH_IEEE (_FPU_CRUNCH_DEFAULT | 0x000003a0)
+-
++#define _FPU_IEEE _FPU_CRUNCH_IEEE
+
+ /* Macros for accessing the hardware control word. */
+ /* cfmvr64l %1, mvdx0 */
+@@ -103,6 +115,7 @@
+ : "=r" (cw), "=r" (__t1), "=r" (__t2) \
+ ); \
+ })
++#define _FPU_GETCW(cw) _FPU_CRUNCH_GETCW(cw)
+
+ /* cfmvr64l %1, mvdx0 */
+ /* cfmvr64h %2, mvdx0 */
+@@ -123,7 +136,7 @@
+ : "=r" (__t1), "=r" (__t2) : "r" (cw) \
+ ); \
+ })
+-
++#define _FPU_SETCW(cw) _FPU_CRUNCH_SETCW(cw)
+
+ /* Default control word set at startup. */
+ extern fpu_control_t __fpu_control;
--- /dev/null
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fraiseexcpt.c glibc-2.5/ports/sysdeps/arm/eabi-new/fraiseexcpt.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fraiseexcpt.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi-new/fraiseexcpt.c 2008-04-14 17:21:09.000000000 +1000
+@@ -25,6 +25,7 @@
+ #include <ldsodefs.h>
+ #include <dl-procinfo.h>
+ #include <sysdep.h>
++#include <math.h>
+
+ int
+ feraiseexcept (int excepts)
+@@ -105,8 +105,74 @@
+
+ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
+ {
+- /* Unsupported, for now. */
+- return 1;
++ unsigned int dspsc;
++ const float fp_zero = 0.0, fp_one = 1.0, fp_max = FLT_MAX,
++ fp_min = FLT_MIN, fp_1e32 = 1.0e32f, fp_two = 2.0,
++ fp_three = 3.0, fp_inf = HUGE_VALF;
++
++ /* Raise exceptions represented by EXPECTS. But we must raise only
++ one signal at a time. It is important that if the overflow/underflow
++ exception and the inexact exception are given at the same time,
++ the overflow/underflow exception follows the inexact exception. After
++ each exception we read from the dspsc, to force the exception to be
++ raised immediately. */
++
++ /* There are additional complications because this file may be compiled
++ without CRUNCH support enabled, and we also can't assume that the
++ assembler has CRUNCH instructions enabled. To get around this we use the
++ generic coprocessor mnemonics and avoid asking GCC to put float values
++ in CRUNCH registers. */
++
++ /* First: invalid exception. */
++ if (FE_CRUNCH_INVALID & excepts)
++ /* (ZERO * INFINITY) */
++ __asm__ __volatile__ (
++ "ldc p4, cr0, %1\n\t" /* cflds mvf0, %1 */
++ "ldc p4, cr1, %2\n\t" /* cflds mvf1, %2 */
++ "cdp p4, 1, cr0, cr0, cr1, 0\n\t" /* cfmuls mvf0, mvf0, mvf1 */
++ "cdp p4, 0, cr0, cr0, cr0, 7\n\t" /* cfmv32sc mvdx0, dspsc */
++ "mrc p5, 0, %0, cr0, cr0, 0" : "=r" (dspsc) /* cfmvr64l dspsc, mvdx0 */
++ : "m" (fp_zero), "m" (fp_inf)
++ : "s0", "s1");
++
++ /* Next: overflow. */
++ if (FE_CRUNCH_OVERFLOW & excepts)
++ /* There's no way to raise overflow without also raising inexact. */
++ __asm__ __volatile__ (
++ "ldc p4, cr0, %1\n\t" /* cflds mvf0, %1 */
++ "ldc p4, cr1, %2\n\t" /* cflds mvf1, %2 */
++ "cdp p4, 3, cr0, cr0, cr1, 4\n\t" /* cfadds mvf0, mvf0, mvf1 */
++ "cdp p4, 0, cr0, cr0, cr0, 7\n\t" /* cfmv32sc mvdx0, dspsc */
++ "mrc p5, 0, %0, cr0, cr0, 0" : "=r" (dspsc) /* cfmvr64l dspsc, mvdx0 */
++ : "m" (fp_max), "m" (fp_1e32)
++ : "s0", "s1");
++
++ /* Next: underflow. */
++ if (FE_CRUNCH_UNDERFLOW & excepts)
++ /* (FLT_MIN * FLT_MIN) */
++ __asm__ __volatile__ (
++ "ldc p4, cr0, %1\n\t" /* cflds mvf0, %1 */
++ "ldc p4, cr1, %2\n\t" /* cflds mvf1, %2 */
++ "cdp p4, 1, cr0, cr0, cr1, 0\n\t" /* cfmul mvf0, mvf0, mvf1 */
++ "cdp p4, 0, cr0, cr0, cr0, 7\n\t" /* cfmv32sc mvdx0, dspsc */
++ "mrc p5, 0, %0, cr0, cr0, 0" : "=r" (dspsc) /* cfmvr64l dspsc, mvdx0 */
++ : "m" (fp_min), "m" (fp_min)
++ : "s0", "s1");
++
++ /* Last: inexact. */
++ if (FE_CRUNCH_INEXACT & excepts)
++ /* There's no way to raise inexact without also raising overflow. */
++ __asm__ __volatile__ (
++ "ldc p4, cr0, %1\n\t" /* cflds mvf0, %1 */
++ "ldc p4, cr1, %2\n\t" /* cflds mvf1, %2 */
++ "cdp p4, 3, cr0, cr0, cr1, 4\n\t" /* cfadds mvf0, mvf0, mvf1 */
++ "cdp p4, 0, cr0, cr0, cr0, 7\n\t" /* cfmv32sc mvdx0, dspsc */
++ "mrc p5, 0, %0, cr0, cr0, 0" : "=r" (dspsc) /* cfmvr64l dspsc, mvdx0 */
++ : "m" (fp_max), "m" (fp_1e32)
++ : "s0", "s1");
++
++ /* Success. */
++ return 0;
+ }
+
+ /* Unsupported, so fail. */
--- /dev/null
+--- glibc-2.5/ports/sysdeps/arm/eabi/setjmp.S 2006-09-22 04:39:51.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/setjmp.S 2007-05-24 13:31:20.000000000 +1000
+@@ -74,6 +74,34 @@
+ stcl p1, cr15, [r12], #8
+ Lno_iwmmxt:
+
++ tst a3, #HWCAP_ARM_CRUNCH
++ beq Lno_crunch
++
++ /* Save the call-preserved crunch registers. */
++ /* Following instructions are cfstrd cr10, [ip], #8 (etc.) */
++ /* stcl p4, cr4, [r12], #8 */
++ /* stcl p4, cr5, [r12], #8 */
++ /* stcl p4, cr6, [r12], #8 */
++ /* stcl p4, cr7, [r12], #8 */
++ stcl p4, cr8, [r12], #8
++ stcl p4, cr9, [r12], #8
++ stcl p4, cr10, [r12], #8
++ stcl p4, cr11, [r12], #8
++ stcl p4, cr12, [r12], #8
++ stcl p4, cr13, [r12], #8
++ stcl p4, cr14, [r12], #8
++ stcl p4, cr15, [r12], #8
++ /* Store the floating-point status register.
++ /* Following 6 instructions are FPU_CRUNCH_GETCW (r2) clob (r3, r4) */
++ /* mrc p5, 0, r3, cr0, cr0, 0 */
++ /* mrc p5, 0, r4, cr0, cr0, 1 */
++ /* cdp p4, 0, cr0, cr0, cr0, 7 */
++ /* mrc p5, 0, r2, cr0, cr0, 0 */
++ /* mcr p5, 0, r3, cr0, cr0, 0 */
++ /* mcr p5, 0, r4, cr0, cr0, 1 */
++ /* str r2, [ip], #4 */
++Lno_crunch:
++
+ /* Make a tail call to __sigjmp_save; it takes the same args. */
+ B PLTJMP(C_SYMBOL_NAME(__sigjmp_save))
+
+--- glibc-2.5/ports/sysdeps/arm/eabi/__longjmp.S 2006-09-22 04:39:51.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/__longjmp.S 2007-05-24 13:31:23.000000000 +1000
+@@ -76,6 +76,34 @@
+ ldcl p1, cr15, [r12], #8
+ Lno_iwmmxt:
+
++ tst a2, #HWCAP_ARM_CRUNCH
++ beq Lno_crunch
++
++ /* Restore the call-preserved crunch registers. */
++ /* Following instructions are cfldrd cr10, [ip], #8 (etc.) */
++ /* ldcl p4, cr4, [r12], #8 */
++ /* ldcl p4, cr5, [r12], #8 */
++ /* ldcl p4, cr6, [r12], #8 */
++ /* ldcl p4, cr7, [r12], #8 */
++ ldcl p4, cr8, [r12], #8
++ ldcl p4, cr9, [r12], #8
++ ldcl p4, cr10, [r12], #8
++ ldcl p4, cr11, [r12], #8
++ ldcl p4, cr12, [r12], #8
++ ldcl p4, cr13, [r12], #8
++ ldcl p4, cr14, [r12], #8
++ ldcl p4, cr15, [r12], #8
++ /* Restore the floating-point status register. */
++ ldr r1, [ip], #4
++ /* Following 6 instructions are FPU_CRUNCH_SETCW (r1) clob (r2, r3). */
++ /* mrc p5, 0, r2, cr0, cr0, 0 */
++ /* mrc p5, 0, r3, cr0, cr0, 1 */
++ /* mcr p5, 0, r1, cr0, cr0, 0 */
++ /* cdp p4, 1, cr0, cr0, cr0, 7 */
++ /* mcr p5, 0, r2, cr0, cr0, 0 */
++ /* mcr p5, 0, r3, cr0, cr0, 1 */
++Lno_crunch:
++
+ DO_RET(lr)
+
+ #ifdef IS_IN_rtld
+--- glibc-2.5/ports/sysdeps/unix/sysv/linux/arm/sysdep.h 2006-09-22 04:39:51.000000000 +1000
++++ glibc-2.5/ports/sysdeps/unix/sysv/linux/arm/sysdep.h 2007-05-24 12:59:03.000000000 +1000
+@@ -48,6 +48,7 @@
+ #define HWCAP_ARM_EDSP 128
+ #define HWCAP_ARM_JAVA 256
+ #define HWCAP_ARM_IWMMXT 512
++#define HWCAP_ARM_CRUNCH 1024
+
+ #ifdef __ASSEMBLER__
+
+--- glibc-2.5/ports/sysdeps/unix/sysv/linux/arm/dl-procinfo.c 2007-07-02 13:20:36.000000000 +1000
++++ glibc-2.5/ports/sysdeps/unix/sysv/linux/arm/dl-procinfo.c 2007-07-02 13:23:19.000000000 +1000
+@@ -47,12 +47,12 @@
+ #if !defined PROCINFO_DECL && defined SHARED
+ ._dl_arm_cap_flags
+ #else
+-PROCINFO_CLASS const char _dl_arm_cap_flags[10][10]
++PROCINFO_CLASS const char _dl_arm_cap_flags[11][10]
+ #endif
+ #ifndef PROCINFO_DECL
+ = {
+ "swp", "half", "thumb", "26bit", "fast-mult", "fpa", "vfp", "edsp",
+- "java", "iwmmxt",
++ "java", "iwmmxt", "crunch",
+ }
+ #endif
+ #if !defined SHARED || defined PROCINFO_DECL
+--- glibc-2.5/ports/sysdeps/unix/sysv/linux/arm/dl-procinfo.h 2007-07-02 13:25:23.000000000 +1000
++++ glibc-2.5/ports/sysdeps/unix/sysv/linux/arm/dl-procinfo.h 2007-07-02 13:25:38.000000000 +1000
+@@ -24,7 +24,7 @@
+ #include <ldsodefs.h>
+ #include <sysdep.h>
+
+-#define _DL_HWCAP_COUNT 10
++#define _DL_HWCAP_COUNT 11
+
+ /* The kernel provides platform data but it is not interesting. */
+ #define _DL_HWCAP_PLATFORM 0
--- /dev/null
+--- glibc-2.7/ports/sysdeps/unix/sysv/linux/arm/eabi/nptl/unwind.h 2008-04-04 15:57:19.000000000 +1000
++++ glibc-2.7/ports/sysdeps/unix/sysv/linux/arm/eabi/nptl/unwind.h 2008-04-04 16:00:41.000000000 +1000
+@@ -138,7 +138,8 @@
+ _UVRSC_VFP = 1, /* vfp */
+ _UVRSC_FPA = 2, /* fpa */
+ _UVRSC_WMMXD = 3, /* Intel WMMX data register */
+- _UVRSC_WMMXC = 4 /* Intel WMMX control register */
++ _UVRSC_WMMXC = 4, /* Intel WMMX control register */
++ _UVRSC_CRUNCH = 5 /* Maverick crunch register */
+ }
+ _Unwind_VRS_RegClass;
+
--- /dev/null
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/bits/fenv.h glibc-2.5/ports/sysdeps/arm/eabi/bits/fenv.h
+--- glibc-2.5/ports/sysdeps/arm/eabi/bits/fenv.h 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/bits/fenv.h 2008-04-02 13:35:39.000000000 +1000
+@@ -20,7 +20,7 @@
+ # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
+ #endif
+
+-/* Define bits representing exceptions in the FPU status word. */
++/* Define bits representing exceptions in the VFP FPU status word. */
+ enum
+ {
+ FE_INVALID = 1,
+@@ -55,6 +55,40 @@
+ #define FE_TOWARDZERO FE_TOWARDZERO
+ };
+
++/* Define bits representing exceptions in the CRUNCH FPU status word. */
++enum
++ {
++ FE_CRUNCH_INVALID = (1),
++#define FE_CRUNCH_INVALID FE_CRUNCH_INVALID
++ FE_CRUNCH_OVERFLOW = (4),
++#define FE_CRUNCH_OVERFLOW FE_CRUNCH_OVERFLOW
++ FE_CRUNCH_UNDERFLOW = (8),
++#define FE_CRUNCH_UNDERFLOW FE_CRUNCH_UNDERFLOW
++ FE_CRUNCH_INEXACT = (16),
++#define FE_CRUNCH_INEXACT FE_CRUNCH_INEXACT
++ };
++
++/* Amount to shift by to convert an exception to a mask bit. */
++#define FE_CRUNCH_EXCEPT_SHIFT 5
++
++/* All supported exceptions, except DIVBYZERO. */
++#define FE_CRUNCH_ALL_EXCEPT \
++ (FE_CRUNCH_INVALID | FE_CRUNCH_OVERFLOW | FE_CRUNCH_UNDERFLOW | FE_CRUNCH_INEXACT)
++
++/* CRUNCH supports all of the four defined rounding modes. */
++enum
++ {
++ FE_CRUNCH_TONEAREST = 0,
++#define FE_CRUNCH_TONEAREST FE_CRUNCH_TONEAREST
++ FE_CRUNCH_TOWARDZERO = 0x400,
++#define FE_CRUNCH_TOWARDZERO FE_CRUNCH_TOWARDZERO
++ FE_CRUNCH_DOWNWARD = 0x800,
++#define FE_CRUNCH_DOWNWARD FE_CRUNCH_DOWNWARD
++ FE_CRUNCH_UPWARD = 0xc00
++#define FE_CRUNCH_UPWARD FE_CRUNCH_UPWARD
++ };
++
++
+ /* Type representing exception flags. */
+ typedef unsigned int fexcept_t;
+
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fclrexcpt.c glibc-2.5/ports/sysdeps/arm/eabi/fclrexcpt.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fclrexcpt.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fclrexcpt.c 2008-04-02 13:25:09.000000000 +1000
+@@ -48,6 +48,26 @@
+ return 0;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned long int temp;
++
++ /* Mask out unsupported bits/exceptions. */
++ excepts &= FE_CRUNCH_ALL_EXCEPT;
++
++ /* Get the current floating point status. */
++ _FPU_CRUNCH_GETCW (temp);
++
++ /* Clear the relevant bits. */
++ temp = (temp & ~FE_CRUNCH_ALL_EXCEPT) | (temp & FE_CRUNCH_ALL_EXCEPT & ~excepts);
++
++ /* Put the new data in effect. */
++ _FPU_CRUNCH_SETCW (temp);
++
++ /* Success. */
++ return 0;
++ }
++
+ /* Unsupported, so fail. */
+ return 1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fedisblxcpt.c glibc-2.5/ports/sysdeps/arm/eabi/fedisblxcpt.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fedisblxcpt.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fedisblxcpt.c 2008-04-02 13:29:44.000000000 +1000
+@@ -46,6 +46,23 @@
+ return old_exc;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned long int new_exc, old_exc;
++
++ _FPU_CRUNCH_GETCW(new_exc);
++
++ old_exc = (new_exc >> FE_CRUNCH_EXCEPT_SHIFT) & FE_CRUNCH_ALL_EXCEPT;
++
++ excepts &= FE_CRUNCH_ALL_EXCEPT;
++
++ new_exc &= ~(excepts << FE_CRUNCH_EXCEPT_SHIFT);
++
++ _FPU_CRUNCH_SETCW(new_exc);
++
++ return old_exc;
++ }
++
+ /* Unsupported, so return -1 for failure. */
+ return -1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/feenablxcpt.c glibc-2.5/ports/sysdeps/arm/eabi/feenablxcpt.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/feenablxcpt.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/feenablxcpt.c 2008-04-02 13:30:30.000000000 +1000
+@@ -46,6 +46,23 @@
+ return old_exc;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned long int new_exc, old_exc;
++
++ _FPU_CRUNCH_GETCW(new_exc);
++
++ old_exc = (new_exc >> FE_CRUNCH_EXCEPT_SHIFT) & FE_CRUNCH_ALL_EXCEPT;
++
++ excepts &= FE_CRUNCH_ALL_EXCEPT;
++
++ new_exc |= (excepts << FE_CRUNCH_EXCEPT_SHIFT);
++
++ _FPU_CRUNCH_SETCW(new_exc);
++
++ return old_exc;
++ }
++
+ /* Unsupported, so return -1 for failure. */
+ return -1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fegetenv.c glibc-2.5/ports/sysdeps/arm/eabi/fegetenv.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fegetenv.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fegetenv.c 2008-04-02 13:31:08.000000000 +1000
+@@ -38,6 +38,16 @@
+ return 0;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned long int temp;
++ _FPU_CRUNCH_GETCW (temp);
++ envp->__cw = temp;
++
++ /* Success. */
++ return 0;
++ }
++
+ /* Unsupported, so fail. */
+ return 1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fegetexcept.c glibc-2.5/ports/sysdeps/arm/eabi/fegetexcept.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fegetexcept.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fegetexcept.c 2008-04-02 13:31:40.000000000 +1000
+@@ -38,6 +38,15 @@
+ return (temp >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned long temp;
++
++ _FPU_CRUNCH_GETCW (temp);
++
++ return (temp >> FE_CRUNCH_EXCEPT_SHIFT) & FE_CRUNCH_ALL_EXCEPT;
++ }
++
+ /* Unsupported. Return all exceptions disabled. */
+ return 0;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fegetround.c glibc-2.5/ports/sysdeps/arm/eabi/fegetround.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fegetround.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fegetround.c 2008-04-02 13:32:18.000000000 +1000
+@@ -38,6 +38,16 @@
+ return temp & FE_TOWARDZERO;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned int temp;
++
++ /* Get the current environment. */
++ _FPU_CRUNCH_GETCW (temp);
++
++ return temp & FE_CRUNCH_UPWARD;
++ }
++
+ /* The current soft-float implementation only handles TONEAREST. */
+ return FE_TONEAREST;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/feholdexcpt.c glibc-2.5/ports/sysdeps/arm/eabi/feholdexcpt.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/feholdexcpt.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/feholdexcpt.c 2008-04-02 13:36:24.000000000 +1000
+@@ -47,6 +47,25 @@
+ return 0;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned long int temp;
++
++ /* Store the environment. */
++ _FPU_CRUNCH_GETCW(temp);
++ envp->__cw = temp;
++
++ /* Now set all exceptions to non-stop. */
++ temp &= ~(FE_CRUNCH_ALL_EXCEPT << FE_CRUNCH_EXCEPT_SHIFT);
++
++ /* And clear all exception flags. */
++ temp &= ~FE_CRUNCH_ALL_EXCEPT;
++
++ _FPU_CRUNCH_SETCW(temp);
++
++ return 0;
++ }
++
+ /* Unsupported, so fail. */
+ return 1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fesetenv.c glibc-2.5/ports/sysdeps/arm/eabi/fesetenv.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fesetenv.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fesetenv.c 2008-04-02 13:43:31.000000000 +1000
+@@ -48,6 +48,26 @@
+ return 0;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ unsigned int temp;
++
++ _FPU_CRUNCH_GETCW (temp);
++ temp &= _FPU_CRUNCH_RESERVED;
++
++ if (envp == FE_DFL_ENV)
++ temp |= _FPU_CRUNCH_DEFAULT;
++ else if (envp == FE_NOMASK_ENV)
++ temp |= _FPU_CRUNCH_IEEE;
++ else
++ temp |= envp->__cw & ~_FPU_CRUNCH_RESERVED;
++
++ _FPU_CRUNCH_SETCW (temp);
++
++ /* Success. */
++ return 0;
++ }
++
+ /* Unsupported, so fail. */
+ return 1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fesetround.c glibc-2.5/ports/sysdeps/arm/eabi/fesetround.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fesetround.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fesetround.c 2008-04-02 13:57:35.000000000 +1000
+@@ -45,6 +45,24 @@
+ default:
+ return 1;
+ }
+ }
++ else if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ fpu_control_t temp;
++
++ switch (round)
++ {
++ case FE_CRUNCH_TONEAREST:
++ case FE_CRUNCH_UPWARD:
++ case FE_CRUNCH_DOWNWARD:
++ case FE_CRUNCH_TOWARDZERO:
++ _FPU_CRUNCH_GETCW (temp);
++ temp = (temp & ~FE_CRUNCH_UPWARD) | round;
++ _FPU_CRUNCH_SETCW (temp);
++ return 0;
++ default:
++ return 1;
++ }
++ }
+ else if (round == FE_TONEAREST)
+ /* This is the only supported rounding mode for soft-fp. */
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fpu_control.h glibc-2.5/ports/sysdeps/arm/eabi/fpu_control.h
+--- glibc-2.5/ports/sysdeps/arm/eabi/fpu_control.h 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fpu_control.h 2008-04-02 13:43:05.000000000 +1000
+@@ -45,6 +45,86 @@
+ #define _FPU_SETCW(cw) \
+ __asm__ __volatile__ ("mcr p10, 7, %0, cr1, cr0, 0" : : "r" (cw))
+
++/* CRUNCH SECTION */
++
++/* DSPSC register: (from EP9312 User's Guide)
++ *
++ * bits 31..29 - DAID
++ * bits 28..26 - HVID
++ * bits 25..24 - RSVD
++ * bit 23 - ISAT
++ * bit 22 - UI
++ * bit 21 - INT
++ * bit 20 - AEXC
++ * bits 19..18 - SAT
++ * bits 17..16 - FCC
++ * bit 15 - V
++ * bit 14 - FWDEN
++ * bit 13 - Invalid
++ * bit 12 - Denorm
++ * bits 11..10 - RM
++ * bits 9..5 - IXE, UFE, OFE, RSVD, IOE
++ * bits 4..0 - IX, UF, OF, RSVD, IO
++ */
++
++/* masking of interrupts */
++#define _FPU_CRUNCH_MASK_IM (1 << 5) /* invalid operation */
++#define _FPU_CRUNCH_MASK_ZM 0 /* divide by zero */
++#define _FPU_CRUNCH_MASK_OM (1 << 7) /* overflow */
++#define _FPU_CRUNCH_MASK_UM (1 << 8) /* underflow */
++#define _FPU_CRUNCH_MASK_PM (1 << 9) /* inexact */
++#define _FPU_CRUNCH_MASK_DM 0 /* denormalized operation */
++
++/* Some bits in the FPSCR are not yet defined. They must be preserved when
++ modifying the contents. */
++#define _FPU_CRUNCH_RESERVED 0x03000042
++#define _FPU_CRUNCH_DEFAULT 0x00b00000
++/* Default + exceptions enabled. */
++#define _FPU_CRUNCH_IEEE (_FPU_CRUNCH_DEFAULT | 0x000003a0)
++
++
++/* Macros for accessing the hardware control word. */
++/* cfmvr64l %1, mvdx0 */
++/* cfmvr64h %2, mvdx0 */
++/* cfmv32sc mvdx0, dspsc */
++/* cfmvr64l %0, mvdx0 */
++/* cfmv64lr mvdx0, %1 */
++/* cfmv64hr mvdx0, %2 */
++#define _FPU_CRUNCH_GETCW(cw) ({ \
++ register int __t1, __t2; \
++ \
++ __asm__ volatile ( \
++ "mrc p5, 0, %1, cr0, cr0, 0\n\t" \
++ "mrc p5, 0, %2, cr0, cr0, 1\n\t" \
++ "cdp p4, 0, cr0, cr0, cr0, 7\n\t" \
++ "mrc p5, 0, %0, cr0, cr0, 0\n\t" \
++ "mcr p5, 0, %1, cr0, cr0, 0\n\t" \
++ "mcr p5, 0, %2, cr0, cr0, 1" \
++ : "=r" (cw), "=r" (__t1), "=r" (__t2) \
++ ); \
++})
++
++/* cfmvr64l %1, mvdx0 */
++/* cfmvr64h %2, mvdx0 */
++/* cfmv64lr mvdx0, %0 */
++/* cfmvsc32 dspsc, mvdx0 */
++/* cfmv64lr mvdx0, %1 */
++/* cfmv64hr mvdx0, %2 */
++#define _FPU_CRUNCH_SETCW(cw) ({ \
++ register int __t1, __t2; \
++ \
++ __asm__ volatile ( \
++ "mrc p5, 0, %0, cr0, cr0, 0\n\t" \
++ "mrc p5, 0, %1, cr0, cr0, 1\n\t" \
++ "mcr p5, 0, %2, cr0, cr0, 0\n\t" \
++ "cdp p4, 1, cr0, cr0, cr0, 7\n\t" \
++ "mcr p5, 0, %0, cr0, cr0, 0\n\t" \
++ "mcr p5, 0, %1, cr0, cr0, 1\n\t" \
++ : "=r" (__t1), "=r" (__t2) : "r" (cw) \
++ ); \
++})
++
++
+ /* Default control word set at startup. */
+ extern fpu_control_t __fpu_control;
+
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fraiseexcpt.c glibc-2.5/ports/sysdeps/arm/eabi/fraiseexcpt.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fraiseexcpt.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fraiseexcpt.c 2008-04-07 16:48:09.000000000 +1000
+@@ -103,6 +103,12 @@
+ return 0;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ /* Unsupported, for now. */
++ return 1;
++ }
++
+ /* Unsupported, so fail. */
+ return 1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/fsetexcptflg.c glibc-2.5/ports/sysdeps/arm/eabi/fsetexcptflg.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/fsetexcptflg.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/fsetexcptflg.c 2008-04-02 13:49:34.000000000 +1000
+@@ -47,6 +47,24 @@
+ return 0;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ fexcept_t temp;
++
++ /* Get the current environment. */
++ _FPU_CRUNCH_GETCW (temp);
++
++ /* Set the desired exception mask. */
++ temp &= ~((excepts & FE_CRUNCH_ALL_EXCEPT) << FE_CRUNCH_EXCEPT_SHIFT);
++ temp |= (*flagp & excepts & FE_CRUNCH_ALL_EXCEPT) << FE_CRUNCH_EXCEPT_SHIFT;
++
++ /* Save state back to the FPU. */
++ _FPU_CRUNCH_SETCW (temp);
++
++ /* Success. */
++ return 0;
++ }
++
+ /* Unsupported, so fail. */
+ return 1;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/ftestexcept.c glibc-2.5/ports/sysdeps/arm/eabi/ftestexcept.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/ftestexcept.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/ftestexcept.c 2008-04-02 13:50:10.000000000 +1000
+@@ -38,6 +38,16 @@
+ return temp & excepts & FE_ALL_EXCEPT;
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ fexcept_t temp;
++
++ /* Get current exceptions. */
++ _FPU_CRUNCH_GETCW(temp);
++
++ return temp & excepts & FE_CRUNCH_ALL_EXCEPT;
++ }
++
+ /* Unsupported, return 0. */
+ return 0;
+ }
+diff -urN glibc-2.5/ports/sysdeps/arm/eabi/setfpucw.c glibc-2.5/ports/sysdeps/arm/eabi/setfpucw.c
+--- glibc-2.5/ports/sysdeps/arm/eabi/setfpucw.c 2005-10-11 01:29:32.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/eabi/setfpucw.c 2008-04-02 13:51:28.000000000 +1000
+@@ -43,5 +43,20 @@
+ _FPU_SETCW (cw);
+ }
+
++ if (GLRO (dl_hwcap) & HWCAP_ARM_CRUNCH)
++ {
++ fpu_control_t cw;
++
++ /* Fetch the current control word. */
++ _FPU_CRUNCH_GETCW (cw);
++
++ /* Preserve the reserved bits, and set the rest as the user
++ specified (or the default, if the user gave zero). */
++ cw &= _FPU_CRUNCH_RESERVED;
++ cw |= set & ~_FPU_CRUNCH_RESERVED;
++
++ _FPU_CRUNCH_SETCW (cw);
++ }
++
+ /* Do nothing if a VFP unit isn't present. */
+ }
--- /dev/null
+diff -urN glibc-2.5/ports/sysdeps/arm/bits/endian.h glibc-2.5/ports/sysdeps/arm/bits/endian.h
+--- glibc-2.5/ports/sysdeps/arm/bits/endian.h 2005-06-13 20:11:47.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/bits/endian.h 2007-05-18 08:41:52.000000000 +1000
+@@ -15,5 +15,9 @@
+ #ifdef __VFP_FP__
+ #define __FLOAT_WORD_ORDER __BYTE_ORDER
+ #else
++#ifdef __MAVERICK__
++#define __FLOAT_WORD_ORDER __LITTLE_ENDIAN
++#else
+ #define __FLOAT_WORD_ORDER __BIG_ENDIAN
+ #endif
++#endif
+diff -urN glibc-2.5/ports/sysdeps/arm/gccframe.h glibc-2.5/ports/sysdeps/arm/gccframe.h
+--- glibc-2.5/ports/sysdeps/arm/gccframe.h 2001-11-16 11:07:20.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/gccframe.h 2007-05-18 08:53:38.000000000 +1000
+@@ -17,6 +17,10 @@
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
++#ifdef __MAVERICK__
++#define FIRST_PSEUDO_REGISTER 43
++#else
+ #define FIRST_PSEUDO_REGISTER 27
++#endif
+
+ #include <sysdeps/generic/gccframe.h>
+diff -urN glibc-2.5/ports/sysdeps/arm/gmp-mparam.h glibc-2.5/ports/sysdeps/arm/gmp-mparam.h
+--- glibc-2.5/ports/sysdeps/arm/gmp-mparam.h 2005-06-13 20:11:47.000000000 +1000
++++ glibc-2.5/ports/sysdeps/arm/gmp-mparam.h 2007-05-18 08:54:21.000000000 +1000
+@@ -29,6 +29,9 @@
+ #if defined(__ARMEB__)
+ # define IEEE_DOUBLE_MIXED_ENDIAN 0
+ # define IEEE_DOUBLE_BIG_ENDIAN 1
++#elif defined(__MAVERICK__)
++#define IEEE_DOUBLE_MIXED_ENDIAN 0
++#define IEEE_DOUBLE_BIG_ENDIAN 0
+ #elif defined(__VFP_FP__)
+ # define IEEE_DOUBLE_MIXED_ENDIAN 0
+ # define IEEE_DOUBLE_BIG_ENDIAN 0
--- /dev/null
+http://sourceware.org/ml/libc-alpha/2007-03/msg00017.html
+
+GCC trunk now has multiple internal headers directories, one
+containing the self-contained GCC-provided headers and one containing
+the <limits.h> (not self-contained but including libc's <limits.h> or
+a fixed version thereof) and the fixed headers; more such directories
+may be added in future.
+
+When glibc uses -nostdinc, it needs to use -isystem options for all
+these internal directories. This patch teaches it about the
+include-fixed directory (and is harmless with old GCC versions without
+that directory).
+
+2007-03-18 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.in: Also pass -isystem option for GCC's include-fixed
+ directory.
+ * configure: Regenerate.
+
+
+Index: glibc-2.6.1/configure
+===================================================================
+--- glibc-2.6.1.orig/configure 2008-09-12 16:38:06.000000000 -0700
++++ glibc-2.6.1/configure 2008-09-12 16:39:22.000000000 -0700
+@@ -4563,7 +4563,7 @@
+ # thing on a system that doesn't need fixincludes. (Not presently a problem.)
+ if test -n "$sysheaders"; then
+ ccheaders=`$CC -print-file-name=include`
+- SYSINCLUDES="-nostdinc -isystem $ccheaders \
++ SYSINCLUDES="-nostdinc -isystem $ccheaders -isystem $ccheaders-fixed \
+ -isystem `echo $sysheaders | sed 's/:/ -isystem /g'`"
+ if test -n "$CXX"; then
+ cxxversion=`$CXX -dumpversion 2>&5` &&
+Index: glibc-2.6.1/configure.in
+===================================================================
+--- glibc-2.6.1.orig/configure.in 2008-09-12 16:38:26.000000000 -0700
++++ glibc-2.6.1/configure.in 2008-09-12 16:39:01.000000000 -0700
+@@ -912,7 +912,7 @@
+ # thing on a system that doesn't need fixincludes. (Not presently a problem.)
+ if test -n "$sysheaders"; then
+ ccheaders=`$CC -print-file-name=include`
+- SYSINCLUDES="-nostdinc -isystem $ccheaders \
++ SYSINCLUDES="-nostdinc -isystem $ccheaders -isystem $ccheaders-fixed \
+ -isystem `echo $sysheaders | sed 's/:/ -isystem /g'`"
+ if test -n "$CXX"; then
+ cxxversion=`$CXX -dumpversion 2>&AS_MESSAGE_LOG_FD` &&
--- /dev/null
+--- glibc-2.5/elf/ldd.bash.in.org 2006-04-30 16:06:20.000000000 +0000
++++ glibc-2.5/elf/ldd.bash.in 2007-03-30 19:18:57.000000000 +0000
+@@ -110,7 +110,7 @@
+ # environments where the executed program might not have permissions
+ # to write to the console/tty. But only bash 3.x supports the pipefail
+ # option, and we don't bother to handle the case for older bash versions.
+-if set -o pipefail 2> /dev/null; then
++if false; then
+ try_trace() {
+ eval $add_env '"$@"' | cat
+ }
--- /dev/null
+Create a configparms file which disabled no-z-defs.
+This is required to build a working glibs for sh4,
+without there will be a lot linker errors during the build.
+
+diff -duNr libc.orig/configparms libc/configparms
+--- libc.orig/configparms 1970-01-01 10:00:00.000000000 +1000
++++ libc/configparms 2006-02-23 14:08:18.000000000 +1100
+@@ -0,0 +1 @@
++no-z-defs=yes
--- /dev/null
+--- glibc-2.4/nptl/sysdeps/pthread/configure.in.ark 2006-03-12 00:41:40.000000000 +0100
++++ glibc-2.4/nptl/sysdeps/pthread/configure.in 2006-03-12 00:44:08.000000000 +0100
+@@ -45,5 +45,6 @@
+ AC_MSG_ERROR([the compiler must support C cleanup handling])
+ fi
+ else
+- AC_MSG_ERROR(forced unwind support is required)
++ AC_MSG_WARN([forced unwind support is required, can't be verified while crosscompiling])
++ AC_DEFINE(HAVE_FORCED_UNWIND)
+ fi
+--- glibc-2.4/nptl/sysdeps/pthread/configure.ark 2006-03-12 00:42:47.000000000 +0100
++++ glibc-2.4/nptl/sysdeps/pthread/configure 2006-03-12 00:44:08.000000000 +0100
+@@ -153,7 +153,10 @@
+ { (exit 1); exit 1; }; }
+ fi
+ else
+- { { echo "$as_me:$LINENO: error: forced unwind support is required" >&5
+-echo "$as_me: error: forced unwind support is required" >&2;}
+- { (exit 1); exit 1; }; }
++ { echo "$as_me:$LINENO: WARNING: forced unwind support is required, can't be verified while crosscompiling" >&5
++echo "$as_me: WARNING: forced unwind support is required, can't be verified while crosscompiling" >&2;}
++ cat >>confdefs.h <<\_ACEOF
++#define HAVE_FORCED_UNWIND 1
++_ACEOF
++
+ fi
--- /dev/null
+diff -Nurd ../glibc-initial-2.5-r4/glibc-2.5/sysdeps/powerpc/fpu/e_sqrt.c glibc-2.5/sysdeps/powerpc/fpu/e_sqrt.c
+--- ../glibc-initial-2.5-r4/glibc-2.5/sysdeps/powerpc/fpu/e_sqrt.c 2006-04-14 07:44:30.000000000 +0200
++++ glibc-2.5/sysdeps/powerpc/fpu/e_sqrt.c 2006-12-08 12:53:32.202227000 +0100
+@@ -25,6 +25,9 @@
+ #include <sysdep.h>
+ #include <ldsodefs.h>
+
++#define __CPU_HAS_FSQRT ((GLRO(dl_hwcap) & PPC_FEATURE_64) != 0)
++
++
+ static const double almost_half = 0.5000000000000001; /* 0.5 + 2^-53 */
+ static const ieee_float_shape_type a_nan = {.word = 0x7fc00000 };
+ static const ieee_float_shape_type a_inf = {.word = 0x7f800000 };
+diff -Nurd ../glibc-initial-2.5-r4/glibc-2.5/sysdeps/powerpc/fpu/e_sqrtf.c glibc-2.5/sysdeps/powerpc/fpu/e_sqrtf.c
+--- ../glibc-initial-2.5-r4/glibc-2.5/sysdeps/powerpc/fpu/e_sqrtf.c 2006-04-14 07:44:30.000000000 +0200
++++ glibc-2.5/sysdeps/powerpc/fpu/e_sqrtf.c 2006-12-08 12:53:36.992227000 +0100
+@@ -25,6 +25,8 @@
+ #include <sysdep.h>
+ #include <ldsodefs.h>
+
++#define __CPU_HAS_FSQRT ((GLRO(dl_hwcap) & PPC_FEATURE_64) != 0)
++
+ static const float almost_half = 0.50000006; /* 0.5 + 2^-24 */
+ static const ieee_float_shape_type a_nan = {.word = 0x7fc00000 };
+ static const ieee_float_shape_type a_inf = {.word = 0x7f800000 };
--- /dev/null
+upstream: http://sources.redhat.com/bugzilla/show_bug.cgi?id=3004
+status: WONTFIX
+comment: Use OEs version of the readelf version. There might be no
+host system version (e.g. on OSX) or it is not multiarch.
+
+Index: glibc-2.6.1/configure
+===================================================================
+--- glibc-2.6.1.orig/configure 2007-07-31 06:46:12.000000000 -0700
++++ glibc-2.6.1/configure 2008-09-12 16:38:06.000000000 -0700
+@@ -5478,6 +5478,96 @@
+ fi
+ fi
+
++### AC_CHECK_TARGET_TOOL([READELF],[readelf],[readelf],[$PATH])
++### XXXX copy and pasted
++# Check for readelf
++# Extract the first word of "$target_alias-readelf", so it can be a program name with args.
++set dummy $target_alias-readelf; ac_word=$2
++{ echo "$as_me:$LINENO: checking for $ac_word" >&5
++echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
++if test "${ac_cv_prog_READELF+set}" = set; then
++ echo $ECHO_N "(cached) $ECHO_C" >&6
++else
++ if test -n "$READELF"; then
++ ac_cv_prog_READELF="$READELF" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++ IFS=$as_save_IFS
++ test -z "$as_dir" && as_dir=.
++ for ac_exec_ext in '' $ac_executable_extensions; do
++ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
++ ac_cv_prog_READELF="$target_alias-readelf"
++ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
++ break 2
++ fi
++done
++done
++IFS=$as_save_IFS
++
++fi
++fi
++READELF=$ac_cv_prog_READELF
++if test -n "$READELF"; then
++ { echo "$as_me:$LINENO: result: $READELF" >&5
++echo "${ECHO_T}$READELF" >&6; }
++else
++ { echo "$as_me:$LINENO: result: no" >&5
++echo "${ECHO_T}no" >&6; }
++fi
++
++
++if test -z "$ac_cv_prog_READELF"; then
++ if test "$build" = "$target"; then
++ ac_ct_READELF=$READELF
++ # Extract the first word of "readelf", so it can be a program name with args.
++set dummy readelf; ac_word=$2
++{ echo "$as_me:$LINENO: checking for $ac_word" >&5
++echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
++if test "${ac_cv_prog_ac_ct_READELF+set}" = set; then
++ echo $ECHO_N "(cached) $ECHO_C" >&6
++else
++ if test -n "$ac_ct_READELF"; then
++ ac_cv_prog_ac_ct_READELF="$ac_ct_READELF" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++ IFS=$as_save_IFS
++ test -z "$as_dir" && as_dir=.
++ for ac_exec_ext in '' $ac_executable_extensions; do
++ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
++ ac_cv_prog_ac_ct_READELF="readelf"
++ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
++ break 2
++ fi
++done
++done
++IFS=$as_save_IFS
++
++ test -z "$ac_cv_prog_ac_ct_READELF" && ac_cv_prog_ac_ct_READELF="readelf"
++fi
++fi
++ac_ct_READELF=$ac_cv_prog_ac_ct_READELF
++if test -n "$ac_ct_READELF"; then
++ { echo "$as_me:$LINENO: result: $ac_ct_READELF" >&5
++echo "${ECHO_T}$ac_ct_READELF" >&6; }
++else
++ { echo "$as_me:$LINENO: result: no" >&5
++echo "${ECHO_T}no" >&6; }
++fi
++
++ READELF=ac_ct_READELF
++ else
++ READELF="readelf"
++ fi
++else
++ READELF="$ac_cv_prog_READELF"
++fi
++
++### XXXX copy and pasted
++
+ echo "$as_me:$LINENO: checking for .preinit_array/.init_array/.fini_array support" >&5
+ echo $ECHO_N "checking for .preinit_array/.init_array/.fini_array support... $ECHO_C" >&6
+ if test "${libc_cv_initfini_array+set}" = set; then
+@@ -5497,7 +5587,7 @@
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }
+ then
+- if readelf -S conftest | fgrep INIT_ARRAY > /dev/null; then
++ if $READELF -S conftest | fgrep INIT_ARRAY > /dev/null; then
+ libc_cv_initfini_array=yes
+ else
+ libc_cv_initfini_array=no
+@@ -5797,7 +5887,7 @@
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }
+ then
+- if readelf -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
++ if $READELF -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
+ libc_cv_z_combreloc=yes
+ else
+ libc_cv_z_combreloc=no
+Index: glibc-2.6.1/configure.in
+===================================================================
+--- glibc-2.6.1.orig/configure.in 2007-03-20 05:11:23.000000000 -0700
++++ glibc-2.6.1/configure.in 2008-09-12 16:38:26.000000000 -0700
+@@ -1347,6 +1347,96 @@
+ fi
+ fi
+
++### AC_CHECK_TARGET_TOOL([READELF],[readelf],[readelf],[$PATH])
++### XXXX copy and pasted
++# Check for readelf
++# Extract the first word of "$target_alias-readelf", so it can be a program name with args.
++set dummy $target_alias-readelf; ac_word=$2
++{ echo "$as_me:$LINENO: checking for $ac_word" >&5
++echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
++if test "${ac_cv_prog_READELF+set}" = set; then
++ echo $ECHO_N "(cached) $ECHO_C" >&6
++else
++ if test -n "$READELF"; then
++ ac_cv_prog_READELF="$READELF" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++ IFS=$as_save_IFS
++ test -z "$as_dir" && as_dir=.
++ for ac_exec_ext in '' $ac_executable_extensions; do
++ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
++ ac_cv_prog_READELF="$target_alias-readelf"
++ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
++ break 2
++ fi
++done
++done
++IFS=$as_save_IFS
++
++fi
++fi
++READELF=$ac_cv_prog_READELF
++if test -n "$READELF"; then
++ { echo "$as_me:$LINENO: result: $READELF" >&5
++echo "${ECHO_T}$READELF" >&6; }
++else
++ { echo "$as_me:$LINENO: result: no" >&5
++echo "${ECHO_T}no" >&6; }
++fi
++
++
++if test -z "$ac_cv_prog_READELF"; then
++ if test "$build" = "$target"; then
++ ac_ct_READELF=$READELF
++ # Extract the first word of "readelf", so it can be a program name with args.
++set dummy readelf; ac_word=$2
++{ echo "$as_me:$LINENO: checking for $ac_word" >&5
++echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
++if test "${ac_cv_prog_ac_ct_READELF+set}" = set; then
++ echo $ECHO_N "(cached) $ECHO_C" >&6
++else
++ if test -n "$ac_ct_READELF"; then
++ ac_cv_prog_ac_ct_READELF="$ac_ct_READELF" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++ IFS=$as_save_IFS
++ test -z "$as_dir" && as_dir=.
++ for ac_exec_ext in '' $ac_executable_extensions; do
++ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
++ ac_cv_prog_ac_ct_READELF="readelf"
++ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
++ break 2
++ fi
++done
++done
++IFS=$as_save_IFS
++
++ test -z "$ac_cv_prog_ac_ct_READELF" && ac_cv_prog_ac_ct_READELF="readelf"
++fi
++fi
++ac_ct_READELF=$ac_cv_prog_ac_ct_READELF
++if test -n "$ac_ct_READELF"; then
++ { echo "$as_me:$LINENO: result: $ac_ct_READELF" >&5
++echo "${ECHO_T}$ac_ct_READELF" >&6; }
++else
++ { echo "$as_me:$LINENO: result: no" >&5
++echo "${ECHO_T}no" >&6; }
++fi
++
++ READELF=ac_ct_READELF
++ else
++ READELF="readelf"
++ fi
++else
++ READELF="$ac_cv_prog_READELF"
++fi
++
++### XXXX copy and pasted
++
+ AC_CACHE_CHECK(for .preinit_array/.init_array/.fini_array support,
+ libc_cv_initfini_array, [dnl
+ cat > conftest.c <<EOF
+@@ -1358,7 +1448,7 @@
+ if AC_TRY_COMMAND([${CC-cc} $CFLAGS $CPPFLAGS $LDFLAGS -o conftest conftest.c
+ -static -nostartfiles -nostdlib 1>&AS_MESSAGE_LOG_FD])
+ then
+- if readelf -S conftest | fgrep INIT_ARRAY > /dev/null; then
++ if $READELF -S conftest | fgrep INIT_ARRAY > /dev/null; then
+ libc_cv_initfini_array=yes
+ else
+ libc_cv_initfini_array=no
+@@ -1543,7 +1633,7 @@
+ dnl introducing new options this is not easily doable. Instead use a tool
+ dnl which always is cross-platform: readelf. To detect whether -z combreloc
+ dnl look for a section named .rel.dyn.
+- if readelf -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
++ if $READELF -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
+ libc_cv_z_combreloc=yes
+ else
+ libc_cv_z_combreloc=no
git.openpandora.org / openembedded.git / commitdiff