--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * This header provides constants for AT91 pmc status.
+ *
+ * The constants defined in this header are being used in dts.
+ */
+
+#ifndef _DT_BINDINGS_CLK_AT91_H
+#define _DT_BINDINGS_CLK_AT91_H
+
+#define PMC_TYPE_CORE 0
+#define PMC_TYPE_SYSTEM 1
+#define PMC_TYPE_PERIPHERAL 2
+#define PMC_TYPE_GCK 3
+#define PMC_TYPE_PROGRAMMABLE 4
+
+#define PMC_SLOW 0
+#define PMC_MCK 1
+#define PMC_UTMI 2
+#define PMC_MAIN 3
+#define PMC_MCK2 4
+#define PMC_I2S0_MUX 5
+#define PMC_I2S1_MUX 6
+#define PMC_PLLACK 7
+#define PMC_PLLBCK 8
+#define PMC_AUDIOPLLCK 9
+#define PMC_AUDIOPINCK 10
+
+/* SAMA7G5 */
+#define PMC_CPUPLL (PMC_MAIN + 1)
+#define PMC_SYSPLL (PMC_MAIN + 2)
+#define PMC_DDRPLL (PMC_MAIN + 3)
+#define PMC_IMGPLL (PMC_MAIN + 4)
+#define PMC_BAUDPLL (PMC_MAIN + 5)
+#define PMC_AUDIOPMCPLL (PMC_MAIN + 6)
+#define PMC_AUDIOIOPLL (PMC_MAIN + 7)
+#define PMC_ETHPLL (PMC_MAIN + 8)
+#define PMC_CPU (PMC_MAIN + 9)
+#define PMC_MCK1 (PMC_MAIN + 10)
+
+/* SAM9X7 */
+#define PMC_PLLADIV2 (PMC_MAIN + 11)
+#define PMC_LVDSPLL (PMC_MAIN + 12)
+
++/* SAMA7D65 */
++#define PMC_MCK3 (PMC_MAIN + 13)
++#define PMC_MCK5 (PMC_MAIN + 14)
++
+#ifndef AT91_PMC_MOSCS
+#define AT91_PMC_MOSCS 0 /* MOSCS Flag */
+#define AT91_PMC_LOCKA 1 /* PLLA Lock */
+#define AT91_PMC_LOCKB 2 /* PLLB Lock */
+#define AT91_PMC_MCKRDY 3 /* Master Clock */
+#define AT91_PMC_LOCKU 6 /* UPLL Lock */
+#define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
+#define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */
+#define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */
+#define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */
+#define AT91_PMC_GCKRDY 24 /* Generated Clocks */
+#endif
+
++/* Slow clock. */
++#define SCKC_MD_SLCK 0
++#define SCKC_TD_SLCK 1
++
+#endif
--- /dev/null
+/*
+ * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
+#define _DT_BINDINGS_CLK_SUN50I_A64_H_
+
+#define CLK_PLL_VIDEO0 7
++#define CLK_PLL_VIDEO0_2X 8
+#define CLK_PLL_PERIPH0 11
++#define CLK_PLL_MIPI 17
+
+#define CLK_CPUX 21
+#define CLK_BUS_MIPI_DSI 28
+#define CLK_BUS_CE 29
+#define CLK_BUS_DMA 30
+#define CLK_BUS_MMC0 31
+#define CLK_BUS_MMC1 32
+#define CLK_BUS_MMC2 33
+#define CLK_BUS_NAND 34
+#define CLK_BUS_DRAM 35
+#define CLK_BUS_EMAC 36
+#define CLK_BUS_TS 37
+#define CLK_BUS_HSTIMER 38
+#define CLK_BUS_SPI0 39
+#define CLK_BUS_SPI1 40
+#define CLK_BUS_OTG 41
+#define CLK_BUS_EHCI0 42
+#define CLK_BUS_EHCI1 43
+#define CLK_BUS_OHCI0 44
+#define CLK_BUS_OHCI1 45
+#define CLK_BUS_VE 46
+#define CLK_BUS_TCON0 47
+#define CLK_BUS_TCON1 48
+#define CLK_BUS_DEINTERLACE 49
+#define CLK_BUS_CSI 50
+#define CLK_BUS_HDMI 51
+#define CLK_BUS_DE 52
+#define CLK_BUS_GPU 53
+#define CLK_BUS_MSGBOX 54
+#define CLK_BUS_SPINLOCK 55
+#define CLK_BUS_CODEC 56
+#define CLK_BUS_SPDIF 57
+#define CLK_BUS_PIO 58
+#define CLK_BUS_THS 59
+#define CLK_BUS_I2S0 60
+#define CLK_BUS_I2S1 61
+#define CLK_BUS_I2S2 62
+#define CLK_BUS_I2C0 63
+#define CLK_BUS_I2C1 64
+#define CLK_BUS_I2C2 65
+#define CLK_BUS_SCR 66
+#define CLK_BUS_UART0 67
+#define CLK_BUS_UART1 68
+#define CLK_BUS_UART2 69
+#define CLK_BUS_UART3 70
+#define CLK_BUS_UART4 71
+#define CLK_BUS_DBG 72
+#define CLK_THS 73
+#define CLK_NAND 74
+#define CLK_MMC0 75
+#define CLK_MMC1 76
+#define CLK_MMC2 77
+#define CLK_TS 78
+#define CLK_CE 79
+#define CLK_SPI0 80
+#define CLK_SPI1 81
+#define CLK_I2S0 82
+#define CLK_I2S1 83
+#define CLK_I2S2 84
+#define CLK_SPDIF 85
+#define CLK_USB_PHY0 86
+#define CLK_USB_PHY1 87
+#define CLK_USB_HSIC 88
+#define CLK_USB_HSIC_12M 89
+
+#define CLK_USB_OHCI0 91
+
+#define CLK_USB_OHCI1 93
+#define CLK_DRAM 94
+#define CLK_DRAM_VE 95
+#define CLK_DRAM_CSI 96
+#define CLK_DRAM_DEINTERLACE 97
+#define CLK_DRAM_TS 98
+#define CLK_DE 99
+#define CLK_TCON0 100
+#define CLK_TCON1 101
+#define CLK_DEINTERLACE 102
+#define CLK_CSI_MISC 103
+#define CLK_CSI_SCLK 104
+#define CLK_CSI_MCLK 105
+#define CLK_VE 106
+#define CLK_AC_DIG 107
+#define CLK_AC_DIG_4X 108
+#define CLK_AVS 109
+#define CLK_HDMI 110
+#define CLK_HDMI_DDC 111
+#define CLK_MBUS 112
+#define CLK_DSI_DPHY 113
+#define CLK_GPU 114
+
+#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */
--- /dev/null
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Copyright (C) 2022 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ */
+
+#ifndef __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__
+#define __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__
+
+#define MEDIA_BUS_TYPE_CSI2_CPHY 1
+#define MEDIA_BUS_TYPE_CSI1 2
+#define MEDIA_BUS_TYPE_CCP2 3
+#define MEDIA_BUS_TYPE_CSI2_DPHY 4
+#define MEDIA_BUS_TYPE_PARALLEL 5
+#define MEDIA_BUS_TYPE_BT656 6
+
++#define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC 0
++#define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ACB 1
++#define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_BAC 2
++#define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_BCA 3
++#define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_CAB 4
++#define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_CBA 5
++
+#endif /* __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__ */