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GPIO: clps711x: Fix direction logic for PORTD
authorAlexander Shiyan <shc_work@mail.ru>
Wed, 24 Oct 2012 08:34:46 +0000 (12:34 +0400)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 26 Oct 2012 07:16:15 +0000 (09:16 +0200)
PORTD have different direction logic, i.e. "0" is output and "1" is input.
This patch fix this issue.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

No differences found
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