-From 491d4b0389fb95e43017b7d4d07d866b114f6c7d Mon Sep 17 00:00:00 2001
+From 3128e95ff7e6a1bed47cc5c64a138cc3bbab492a Mon Sep 17 00:00:00 2001
From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Mon, 8 Dec 2008 13:43:36 +0200
+Date: Wed, 7 Jan 2009 14:30:09 +0200
Subject: [PATCH] DSS: New display subsystem driver for OMAP2/3
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
---
+ Documentation/arm/OMAP/DSS | 266 +++
arch/arm/plat-omap/Kconfig | 2 +
arch/arm/plat-omap/Makefile | 2 +
- arch/arm/plat-omap/dss/Kconfig | 66 +
+ arch/arm/plat-omap/dss/Kconfig | 69 +
arch/arm/plat-omap/dss/Makefile | 6 +
- arch/arm/plat-omap/dss/dispc.c | 2021 +++++++++++++++++++
- arch/arm/plat-omap/dss/display.c | 765 +++++++
- arch/arm/plat-omap/dss/dpi.c | 320 +++
- arch/arm/plat-omap/dss/dsi.c | 3135 +++++++++++++++++++++++++++++
- arch/arm/plat-omap/dss/dss.c | 789 ++++++++
- arch/arm/plat-omap/dss/dss.h | 268 +++
- arch/arm/plat-omap/dss/rfbi.c | 1225 +++++++++++
- arch/arm/plat-omap/dss/sdi.c | 150 ++
- arch/arm/plat-omap/dss/venc.c | 501 +++++
- arch/arm/plat-omap/include/mach/display.h | 463 +++++
- 14 files changed, 9713 insertions(+), 0 deletions(-)
+ arch/arm/plat-omap/dss/dispc.c | 2113 +++++++++++++++++++
+ arch/arm/plat-omap/dss/display.c | 787 +++++++
+ arch/arm/plat-omap/dss/dpi.c | 344 ++++
+ arch/arm/plat-omap/dss/dsi.c | 3187 +++++++++++++++++++++++++++++
+ arch/arm/plat-omap/dss/dss.c | 774 +++++++
+ arch/arm/plat-omap/dss/dss.h | 274 +++
+ arch/arm/plat-omap/dss/rfbi.c | 1262 ++++++++++++
+ arch/arm/plat-omap/dss/sdi.c | 174 ++
+ arch/arm/plat-omap/dss/venc.c | 506 +++++
+ arch/arm/plat-omap/include/mach/display.h | 462 +++++
+ 15 files changed, 10228 insertions(+), 0 deletions(-)
+ create mode 100644 Documentation/arm/OMAP/DSS
create mode 100644 arch/arm/plat-omap/dss/Kconfig
create mode 100644 arch/arm/plat-omap/dss/Makefile
create mode 100644 arch/arm/plat-omap/dss/dispc.c
create mode 100644 arch/arm/plat-omap/dss/venc.c
create mode 100644 arch/arm/plat-omap/include/mach/display.h
+diff --git a/Documentation/arm/OMAP/DSS b/Documentation/arm/OMAP/DSS
+new file mode 100644
+index 0000000..a5e608c
+--- /dev/null
++++ b/Documentation/arm/OMAP/DSS
+@@ -0,0 +1,266 @@
++OMAP2/3 Display Subsystem
++-------------------------
++
++This is an almost total rewrite of the OMAP FB driver in drivers/video/omap
++(let's call it DSS1). The main differences between DSS1 and DSS2 are DSI,
++TV-out and multiple display support.
++
++The DSS2 driver (omap-dss module) is in arch/arm/plat-omap/dss/, and the FB,
++panel and controller drivers are in drivers/video/omap2/. DSS1 and DSS2 live
++currently side by side, you can choose which one to use.
++
++Features
++--------
++
++Working and tested features include:
++
++- MIPI DPI (parallel) output
++- MIPI DSI output in command mode
++- MIPI DBI (RFBI) output (not tested for a while, might've gotten broken)
++- SDI output
++- TV output
++- All pieces can be compiled as a module or inside kernel
++- Use DISPC to update any of the outputs
++- Use CPU to update RFBI or DSI output
++- OMAP DISPC planes
++- RGB16, RGB24 packed, RGB24 unpacked
++- YUV2, UYVY
++- Scaling
++- Adjusting DSS FCK to find a good pixel clock
++- Use DSI DPLL to create DSS FCK
++
++omap-dss driver
++------------
++
++The DSS driver does not itself have any support for Linux framebuffer, V4L or
++such like the current ones, but it has an internal kernel API that upper level
++drivers can use.
++
++The DSS driver models OMAP's overlays, overlay managers and displays in a
++flexible way to enable non-common multi-display configuration. In addition to
++modelling the hardware overlays, omap-dss supports virtual overlays and overlay
++managers. These can be used when updating a display with CPU or system DMA.
++
++Panel and controller drivers
++----------------------------
++
++The drivers implement panel or controller specific functionality and are not
++visible to users except through omapfb driver. They register themselves to the
++DSS driver.
++
++omapfb driver
++-------------
++
++The omapfb driver implements arbitrary number of standard linux framebuffers.
++These framebuffers can be routed flexibly to any overlays, thus allowing very
++dynamic display architecture.
++
++The driver exports some omapfb specific ioctls, which are compatible with the
++ioctls in the old driver.
++
++The rest of the non standard features are exported via sysfs. Whether the final
++implementation will use sysfs, or ioctls, is still open.
++
++V4L2 drivers
++------------
++
++Currently there are no V4L2 display drivers planned, but it is possible to
++implement such either to omapfb driver, or as a separate one. From omap-dss
++point of view the V4L2 drivers should be similar to framebuffer driver.
++
++Architecture
++--------------------
++
++Some clarification what the different components do:
++
++ - Framebuffer is a memory area inside OMAP's SDRAM that contains the pixel
++ data for the image. Framebuffer has width and height and color depth.
++ - Overlay defines where the pixels are read from and where they go on the
++ screen. The overlay may be smaller than framebuffer, thus displaying only
++ part of the framebuffer. The position of the overlay may be changed if
++ the overlay is smaller than the display.
++ - Overlay manager combines the overlays in to one image and feeds them to
++ display.
++ - Display is the actual physical display device.
++
++A framebuffer can be connected to multiple overlays to show the same pixel data
++on all of the overlays. Note that in this case the overlay input sizes must be
++the same, but, in case of video overlays, the output size can be different. Any
++framebuffer can be connected to any overlay.
++
++An overlay can be connected to one overlay manager. Also DISPC overlays can be
++connected only to DISPC overlay managers, and virtual overlays can be only
++connected to virtual overlays.
++
++An overlay manager can be connected to one display. There are certain
++restrictions which kinds of displays an overlay manager can be connected:
++
++ - DISPC TV overlay manager can be only connected to TV display.
++ - Virtual overlay managers can only be connected to DBI or DSI displays.
++ - DISPC LCD overlay manager can be connected to all displays, except TV
++ display.
++
++Sysfs
++-----
++The sysfs interface is a hack, but works for testing. I don't think sysfs
++interface is the best for this in the final version, but I don't quite know
++what would be the best interfaces for these things.
++
++In /sys/devices/platform/omapfb we have four files: framebuffers,
++overlays, managers and displays. You can read them so see the current
++setup, and change them by writing to it in the form of
++"<item-id> <opt1>:<val1> <opt2>:<val2>..."
++
++"framebuffers" lists all framebuffers. Its format is:
++ <fb number>
++ p:<physical address, read only>
++ v:<virtual address, read only>
++ s:<size, read only>
++ t:<target overlay>
++
++"overlays" lists all overlays. Its format is:
++ <overlay name>
++ t:<target manager>
++ x:<xpos>
++ y:<ypos>
++ iw:<input width, read only>
++ ih:<input height, read only>
++ w:<output width>
++ h:<output height>
++ e:<enabled>
++
++"managers" lists all overlay managers. Its format is:
++ <manager name>
++ t:<target display>
++
++"displays" lists all displays. Its format is:
++ <display name>
++ e:<enabled>
++ u:<update mode>
++ t:<tear sync on/off>
++ h:<xres/hfp/hbp/hsw>
++ v:<yres/vfp/vbp/vsw>
++ p:<pix clock, in kHz>
++ m:<mode str, as in drivers/video/modedb.c:fb_find_mode>
++
++There is also a debug sysfs file at /sys/devices/platform/omap-dss/clk which
++shows how DSS has configured the clocks.
++
++Examples
++--------
++
++In the example scripts "omapfb" is a symlink to /sys/devices/platform/omapfb/.
++
++Default setup on OMAP3 SDP
++--------------------------
++
++Here's the default setup on OMAP3 SDP board. All planes go to LCD. DVI
++and TV-out are not in use. The columns from left to right are:
++framebuffers, overlays, overlay managers, displays. Framebuffers are
++handled by omapfb, and the rest by the DSS.
++
++FB0 --- GFX -\ DVI
++FB1 --- VID1 --+- LCD ---- LCD
++FB2 --- VID2 -/ TV ----- TV
++
++Switch from LCD to DVI
++----------------------
++
++dviline=`cat omapfb/displays |grep dvi`
++w=`echo $dviline | cut -d " " -f 5 | cut -d ":" -f 2 | cut -d "/" -f 1`
++h=`echo $dviline | cut -d " " -f 6 | cut -d ":" -f 2 | cut -d "/" -f 1`
++
++echo "lcd e:0" > omapfb/displays
++echo "lcd t:none" > omapfb/managers
++fbset -fb /dev/fb0 -xres $w -yres $h
++# at this point you have to switch the dvi/lcd dip-switch from the omap board
++echo "lcd t:dvi" > omapfb/managers
++echo "dvi e:1" > omapfb/displays
++
++After this the configuration looks like:
++
++FB0 --- GFX -\ -- DVI
++FB1 --- VID1 --+- LCD -/ LCD
++FB2 --- VID2 -/ TV ----- TV
++
++Clone GFX overlay to LCD and TV
++-------------------------------
++
++tvline=`cat /sys/devices/platform/omapfb/displays |grep tv`
++w=`echo $tvline | cut -d " " -f 5 | cut -d ":" -f 2 | cut -d "/" -f 1`
++h=`echo $tvline | cut -d " " -f 6 | cut -d ":" -f 2 | cut -d "/" -f 1`
++
++echo "1 t:none" > omapfb/framebuffers
++echo "0 t:gfx,vid1" > omapfb/framebuffers
++echo "gfx e:1" > omapfb/overlays
++echo "vid1 t:tv w:$w h:$h e:1" > omapfb/overlays
++echo "tv e:1" > omapfb/displays
++
++After this the configuration looks like (only relevant parts shown):
++
++FB0 +-- GFX ---- LCD ---- LCD
++ \- VID1 ---- TV ---- TV
++
++Misc notes
++----------
++
++OMAP FB allocates the framebuffer memory using the OMAP VRAM allocator. If
++that fails, it will fall back to dma_alloc_writecombine().
++
++Using DSI DPLL to generate pixel clock it is possible produce the pixel clock
++of 86.5MHz (max possible), and with that you get 1280x1024@57 output from DVI.
++
++Arguments
++---------
++
++vram
++ - Amount of total VRAM to preallocate. For example, "10M".
++
++omapfb.video_mode
++ - Default video mode for default display. For example,
++ "800x400MR-24@60". See drivers/video/modedb.c
++
++omapfb.vram
++ - VRAM allocated for each framebuffer. Normally omapfb allocates vram
++ depending on the display size. With this you can manually allocate
++ more. For example "4M,3M" allocates 4M for fb0, 3M for fb1.
++
++omapfb.debug
++ - Enable debug printing. You have to have OMAPFB debug support enabled
++ in kernel config.
++
++omap-dss.def_disp
++ - Name of default display, to which all overlays will be connected.
++ Common examples are "lcd" or "tv".
++
++omap-dss.debug
++ - Enable debug printing. You have to have DSS debug support enabled in
++ kernel config.
++
++TODO
++----
++
++DSS locking
++
++Error checking
++- Lots of checks are missing or implemented just as BUG()
++
++Rotate (external FB)
++Rotate (VRFB)
++Rotate (SMS)
++
++System DMA update for DSI
++- Can be used for RGB16 and RGB24P modes. Probably not for RGB24U (how
++ to skip the empty byte?)
++
++Power management
++- Context saving
++
++Resolution change
++- The x/y res of the framebuffer are not display resolutions, but the size
++ of the overlay.
++- The display resolution affects all planes on the display.
++
++OMAP1 support
++- Not sure if needed
++
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
-index 960c13f..4e90667 100644
+index 2465aea..cd7d9e2 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -245,6 +245,8 @@ config OMAP_SERIAL_WAKE
+obj-y += dss/
diff --git a/arch/arm/plat-omap/dss/Kconfig b/arch/arm/plat-omap/dss/Kconfig
new file mode 100644
-index 0000000..ef0b5d9
+index 0000000..6b342df
--- /dev/null
+++ b/arch/arm/plat-omap/dss/Kconfig
-@@ -0,0 +1,66 @@
+@@ -0,0 +1,69 @@
+config OMAP2_DSS
+ tristate "OMAP2/3 Display Subsystem support (EXPERIMENTAL)"
+ depends on ARCH_OMAP2 || ARCH_OMAP3
+
+if OMAP2_DSS
+
-+config OMAP2_DSS_DEBUG
-+ bool "Debug output"
-+ default n
++config OMAP2_DSS_DEBUG_SUPPORT
++ bool "Debug support"
++ default y
++ help
++ This enables debug messages. You need to enable printing
++ with 'debug' module parameter.
+
+config OMAP2_DSS_RFBI
+ bool "RFBI support"
+omap-dss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o
diff --git a/arch/arm/plat-omap/dss/dispc.c b/arch/arm/plat-omap/dss/dispc.c
new file mode 100644
-index 0000000..33fbd0a
+index 0000000..20caa48
--- /dev/null
+++ b/arch/arm/plat-omap/dss/dispc.c
-@@ -0,0 +1,2021 @@
+@@ -0,0 +1,2113 @@
+/*
+ * linux/arch/arm/plat-omap/dss/dispc.c
+ *
+
+ spinlock_t irq_lock;
+
++ unsigned long cache_req_pck;
++ unsigned long cache_prate;
++ struct dispc_clock_info cache_cinfo;
++
+ u32 ctx[DISPC_SZ_REGS / sizeof(u32)];
+} dispc;
+
+
+void dispc_save_context(void)
+{
++ if (cpu_is_omap24xx())
++ return;
++
+ SR(SYSCONFIG);
+ SR(IRQENABLE);
+ SR(CONTROL);
+{
+ RR(SYSCONFIG);
+ RR(IRQENABLE);
-+ //RR(CONTROL);
++ /*RR(CONTROL);*/
+ RR(CONFIG);
+ RR(DEFAULT_COLOR0);
+ RR(DEFAULT_COLOR1);
+ dispc_write_reg(dispc_reg_att[plane], val);
+}
+
-+static void _dispc_set_burst_size(enum omap_plane plane,
++void dispc_set_burst_size(enum omap_plane plane,
+ enum omap_burst_size burst_size)
+{
+ int shift;
+ u32 val;
+
++ enable_clocks(1);
++
+ switch (plane) {
+ case OMAP_DSS_GFX:
+ shift = 6;
+ val = dispc_read_reg(dispc_reg_att[plane]);
+ val = FLD_MOD(val, burst_size, shift+1, shift);
+ dispc_write_reg(dispc_reg_att[plane], val);
++
++ enable_clocks(0);
+}
+
+static void _dispc_set_vid_color_conv(enum omap_plane plane, int enable)
+ enable_clocks(0);
+}
+
-+void dispc_setup_plane_fifo(enum omap_plane plane, int ext_mode)
++u32 dispc_get_plane_fifo_size(enum omap_plane plane)
++{
++ const struct dispc_reg fsz_reg[] = { DISPC_GFX_FIFO_SIZE_STATUS,
++ DISPC_VID_FIFO_SIZE_STATUS(0),
++ DISPC_VID_FIFO_SIZE_STATUS(1) };
++ u32 size;
++
++ enable_clocks(1);
++
++ if (cpu_is_omap24xx())
++ size = FLD_GET(dispc_read_reg(fsz_reg[plane]), 8, 0);
++ else if (cpu_is_omap34xx())
++ size = FLD_GET(dispc_read_reg(fsz_reg[plane]), 10, 0);
++ else
++ BUG();
++
++ enable_clocks(0);
++
++ return size;
++}
++
++void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high)
+{
+ const struct dispc_reg ftrs_reg[] = { DISPC_GFX_FIFO_THRESHOLD,
+ DISPC_VID_FIFO_THRESHOLD(0),
+ const struct dispc_reg fsz_reg[] = { DISPC_GFX_FIFO_SIZE_STATUS,
+ DISPC_VID_FIFO_SIZE_STATUS(0),
+ DISPC_VID_FIFO_SIZE_STATUS(1) };
-+ int low, high;
+ u32 size;
+
+ enable_clocks(1);
+ else
+ BUG();
+
-+ if (ext_mode) {
-+ low = size * 3 / 4;
-+ high = size;
-+ } else {
-+ low = size / 4;
-+ high = size * 3 / 4;
-+ }
++ BUG_ON(low > size || high > size);
++
++ DSSDBG("fifo(%d) size %d, low/high old %u/%u, new %u/%u\n",
++ plane, size,
++ REG_GET(ftrs_reg[plane], 11, 0),
++ REG_GET(ftrs_reg[plane], 27, 16),
++ low, high);
+
+ if (cpu_is_omap24xx())
+ dispc_write_reg(ftrs_reg[plane],
+ enable_clocks(0);
+}
+
++/* change name to mode? */
+void dispc_set_lcd_timings(struct omap_video_timings *timings)
+{
++ unsigned xtot, ytot;
++ unsigned long ht, vt;
++
+ _dispc_set_lcd_timings(timings->hsw, timings->hfp, timings->hbp,
-+ timings->vsw, timings->vfp, timings->vbp);
++ timings->vsw, timings->vfp, timings->vbp);
++
++ dispc_set_lcd_size(timings->x_res, timings->y_res);
++
++ xtot = timings->x_res + timings->hfp + timings->hsw + timings->hbp;
++ ytot = timings->y_res + timings->vfp + timings->vsw + timings->vbp;
++
++ ht = (timings->pixel_clock * 1000) / xtot;
++ vt = (timings->pixel_clock * 1000) / xtot / ytot;
++
++ DSSDBG("xres %u yres %u\n", timings->x_res, timings->y_res);
++ DSSDBG("pck %u\n", timings->pixel_clock);
++ DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
++ timings->hsw, timings->hfp, timings->hbp,
++ timings->vsw, timings->vfp, timings->vbp);
++
++ DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
+}
+
+void dispc_set_lcd_divisor(int lck_div, int pck_div)
+{
+ u32 l = 0;
+
-+ DSSDBG("polfreq ihs %d, ivs %d, acb %d\n", ihs, ivs, acb);
++ DSSDBG("onoff %d rf %d ieo %d ipc %d ihs %d ivs %d acbi %d acb %d\n",
++ onoff, rf, ieo, ipc, ihs, ivs, acbi, acb);
+
+ l |= FLD_VAL(onoff, 17, 17);
+ l |= FLD_VAL(rf, 16, 16);
+int dispc_calc_clock_div(int is_tft, unsigned long req_pck,
+ struct dispc_clock_info *cinfo)
+{
-+ unsigned long prate = clk_get_rate(clk_get_parent(dispc.dpll4_m4_ck));
++ unsigned long prate;
+ struct dispc_clock_info cur, best;
+ int match = 0;
+ int min_fck_per_pck;
+
++ if (cpu_is_omap34xx())
++ prate = clk_get_rate(clk_get_parent(dispc.dpll4_m4_ck));
++ else
++ prate = 0;
++
++ if (req_pck == dispc.cache_req_pck &&
++ ((cpu_is_omap34xx() && prate == dispc.cache_prate) ||
++ dispc.cache_cinfo.fck == dss_clk_get_rate(DSS_CLK_FCK1))) {
++ DSSDBG("dispc clock info found from cache.\n");
++ *cinfo = dispc.cache_cinfo;
++ return 0;
++ }
++
+ min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK;
+
+ if (min_fck_per_pck &&
+ memset(&cur, 0, sizeof(cur));
+ memset(&best, 0, sizeof(best));
+
-+ for (cur.fck_div = 16; cur.fck_div > 0; --cur.fck_div) {
-+ cur.fck = prate / cur.fck_div * 2;
-+
-+ if (cur.fck > DISPC_MAX_FCK)
-+ continue;
-+
-+ if (min_fck_per_pck &&
-+ cur.fck < req_pck * min_fck_per_pck)
-+ continue;
++ if (cpu_is_omap24xx()) {
++ /* XXX can we change the clock on omap2? */
++ cur.fck = dss_clk_get_rate(DSS_CLK_FCK1);
++ cur.fck_div = 1;
+
+ match = 1;
+
+ cur.lck = cur.fck / cur.lck_div;
+ cur.pck = cur.lck / cur.pck_div;
+
-+ if (abs(cur.pck - req_pck) < abs(best.pck - req_pck)) {
-+ best = cur;
++ best = cur;
+
-+ if (cur.pck == req_pck)
-+ goto found;
++ goto found;
++ } else if (cpu_is_omap34xx()) {
++ for (cur.fck_div = 16; cur.fck_div > 0; --cur.fck_div) {
++ cur.fck = prate / cur.fck_div * 2;
++
++ if (cur.fck > DISPC_MAX_FCK)
++ continue;
++
++ if (min_fck_per_pck &&
++ cur.fck < req_pck * min_fck_per_pck)
++ continue;
++
++ match = 1;
++
++ find_lck_pck_divs(is_tft, req_pck, cur.fck,
++ &cur.lck_div, &cur.pck_div);
++
++ cur.lck = cur.fck / cur.lck_div;
++ cur.pck = cur.lck / cur.pck_div;
++
++ if (abs(cur.pck - req_pck) < abs(best.pck - req_pck)) {
++ best = cur;
++
++ if (cur.pck == req_pck)
++ goto found;
++ }
+ }
++ } else {
++ BUG();
+ }
+
+found:
+ if (cinfo)
+ *cinfo = best;
+
++ dispc.cache_req_pck = req_pck;
++ dispc.cache_prate = prate;
++ dispc.cache_cinfo = best;
++
+ return 0;
+}
+
+ unsigned long prate;
+ int r;
+
-+ prate = clk_get_rate(clk_get_parent(dispc.dpll4_m4_ck));
-+
-+ r = clk_set_rate(dispc.dpll4_m4_ck, prate / cinfo->fck_div);
-+
-+ if (r)
-+ return r;
-+
-+ dispc_set_lcd_divisor(cinfo->lck_div, cinfo->pck_div);
++ if (cpu_is_omap34xx()) {
++ prate = clk_get_rate(clk_get_parent(dispc.dpll4_m4_ck));
++ DSSDBG("dpll4_m4 = %ld\n", prate);
++ }
+
-+ DSSDBG("dpll4_m4 = %ld\n", prate);
+ DSSDBG("fck = %ld (%d)\n", cinfo->fck, cinfo->fck_div);
+ DSSDBG("lck = %ld (%d)\n", cinfo->lck, cinfo->lck_div);
+ DSSDBG("pck = %ld (%d)\n", cinfo->pck, cinfo->pck_div);
+
++ if (cpu_is_omap34xx()) {
++ r = clk_set_rate(dispc.dpll4_m4_ck, prate / cinfo->fck_div);
++ if (r)
++ return r;
++ }
++
++ dispc_set_lcd_divisor(cinfo->lck_div, cinfo->pck_div);
++
+ return 0;
+}
+
+}
+#endif
+
-+/* called from dss */
++/* Called from dss.c. Note that we don't touch clocks here,
++ * but we presume they are on because we got an IRQ. However,
++ * an irq handler may turn the clocks off, so we may not have
++ * clock later in the function. */
+void dispc_irq_handler(void)
+{
+ int i;
+ u32 handledirqs = 0;
+
+#ifdef DEBUG
-+ print_irq_status(irqstatus);
++ if (dss_debug)
++ print_irq_status(irqstatus);
+#endif
++ /* Ack the interrupt. Do it here before clocks are possibly turned
++ * off */
++ dispc_write_reg(DISPC_IRQSTATUS, irqstatus);
+
+ for (i = 0; i < DISPC_MAX_NR_ISRS; i++) {
+ if (!registered_isr[i].isr)
+ }
+ }
+
-+ /* ack the interrupt */
-+ dispc_write_reg(DISPC_IRQSTATUS, irqstatus);
+}
+
+#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC
+ /* L3 firewall setting: enable access to OCM RAM */
+ __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0));
+
-+ _dispc_set_burst_size(OMAP_DSS_GFX, OMAP_DSS_BURST_16x32);
-+ _dispc_set_burst_size(OMAP_DSS_VIDEO1, OMAP_DSS_BURST_16x32);
-+ _dispc_set_burst_size(OMAP_DSS_VIDEO2, OMAP_DSS_BURST_16x32);
-+
+ _dispc_setup_color_conv_coef();
+
+ dispc_set_loadmode(OMAP_DSS_LOAD_FRAME_ONLY);
+
+ /* Set logic clock to fck, pixel clock to fck/2 for now */
+ dispc_set_lcd_divisor(1, 2);
-+
-+ dispc_setup_plane_fifo(OMAP_DSS_GFX, 0);
-+ dispc_setup_plane_fifo(OMAP_DSS_VIDEO1, 0);
-+ dispc_setup_plane_fifo(OMAP_DSS_VIDEO2, 0);
+}
+
+int dispc_init(void)
+ return -ENOMEM;
+ }
+
-+ dispc.dpll4_m4_ck = clk_get(NULL, "dpll4_m4_ck");
-+ if (IS_ERR(dispc.dpll4_m4_ck)) {
-+ DSSERR("Failed to get dpll4_m4_ck\n");
-+ return -ENODEV;
++ if (cpu_is_omap34xx()) {
++ dispc.dpll4_m4_ck = clk_get(NULL, "dpll4_m4_ck");
++ if (IS_ERR(dispc.dpll4_m4_ck)) {
++ DSSERR("Failed to get dpll4_m4_ck\n");
++ return -ENODEV;
++ }
+ }
+
+ enable_clocks(1);
+
+void dispc_exit(void)
+{
-+ clk_put(dispc.dpll4_m4_ck);
++ if (cpu_is_omap34xx())
++ clk_put(dispc.dpll4_m4_ck);
+ iounmap(dispc.base);
+}
+
+
diff --git a/arch/arm/plat-omap/dss/display.c b/arch/arm/plat-omap/dss/display.c
new file mode 100644
-index 0000000..b7f7aff
+index 0000000..e3ff778
--- /dev/null
+++ b/arch/arm/plat-omap/dss/display.c
-@@ -0,0 +1,765 @@
+@@ -0,0 +1,787 @@
+/*
+ * linux/arch/arm/plat-omap/dss/display.c
+ *
+ outh = info->out_height;
+ }
+
-+ if (display->x_res < info->pos_x + outw)
++ if (display->panel->timings.x_res < info->pos_x + outw)
+ return -EINVAL;
+
-+ if (display->y_res < info->pos_y + outh)
++ if (display->panel->timings.y_res < info->pos_y + outh)
+ return -EINVAL;
+
+ return 0;
+ return 0;
+}
+
-+void initialize_overlays(void)
++void initialize_overlays(const char *def_disp_name)
+{
+ int i;
+ struct omap_overlay_manager *lcd_mgr;
+ lcd_mgr = omap_dss_get_overlay_manager(OMAP_DSS_OVL_MGR_LCD);
+ tv_mgr = omap_dss_get_overlay_manager(OMAP_DSS_OVL_MGR_TV);
+
-+ /* connect lcd manager to first non-VENC display found */
-+ for (i = 0; i < num_displays; i++) {
-+ if (displays[i].type != OMAP_DISPLAY_TYPE_VENC) {
++ if (def_disp_name) {
++ for (i = 0; i < num_displays; i++) {
+ struct omap_display *display = &displays[i];
-+ omap_dss_set_display(lcd_mgr, display);
+
-+ def_mgr = lcd_mgr;
++ if (strcmp(display->name, def_disp_name) == 0) {
++ if (display->type != OMAP_DISPLAY_TYPE_VENC) {
++ omap_dss_set_display(lcd_mgr, display);
++ def_mgr = lcd_mgr;
++ } else {
++ omap_dss_set_display(tv_mgr, display);
++ def_mgr = tv_mgr;
++ }
+
-+ break;
++ break;
++ }
+ }
++
++ if (!def_mgr)
++ DSSWARN("default display %s not found\n",
++ def_disp_name);
+ }
+
-+ /* connect tv manager to first VENC display found */
-+ for (i = 0; i < num_displays; i++) {
-+ if (displays[i].type == OMAP_DISPLAY_TYPE_VENC) {
++ if (def_mgr != lcd_mgr) {
++ /* connect lcd manager to first non-VENC display found */
++ for (i = 0; i < num_displays; i++) {
+ struct omap_display *display = &displays[i];
-+ omap_dss_set_display(tv_mgr, display);
++ if (display->type != OMAP_DISPLAY_TYPE_VENC) {
++ omap_dss_set_display(lcd_mgr, display);
+
-+ if (!def_mgr)
-+ def_mgr = tv_mgr;
++ if (!def_mgr)
++ def_mgr = lcd_mgr;
+
-+ break;
++ break;
++ }
++ }
++ }
++
++ if (def_mgr != tv_mgr) {
++ /* connect tv manager to first VENC display found */
++ for (i = 0; i < num_displays; i++) {
++ struct omap_display *display = &displays[i];
++ if (display->type == OMAP_DISPLAY_TYPE_VENC) {
++ omap_dss_set_display(tv_mgr, display);
++
++ if (!def_mgr)
++ def_mgr = tv_mgr;
++
++ break;
++ }
+ }
+ }
+
+ if (atomic_cmpxchg(&display->ref_count, 0, 1) != 0)
+ return 0;
+*/
-+ if (display->panel) {
-+ display->x_res = display->panel->x_res;
-+ display->y_res = display->panel->y_res;
-+ display->bpp = display->panel->bpp;
-+ }
+
+ return display;
+err3:
+EXPORT_SYMBOL(omap_dss_unregister_panel);
diff --git a/arch/arm/plat-omap/dss/dpi.c b/arch/arm/plat-omap/dss/dpi.c
new file mode 100644
-index 0000000..e3ad44e
+index 0000000..2dd8a3b
--- /dev/null
+++ b/arch/arm/plat-omap/dss/dpi.c
-@@ -0,0 +1,320 @@
+@@ -0,0 +1,344 @@
+/*
+ * linux/arch/arm/plat-omap/dss/dpi.c
+ *
+ unsigned long pck;
+ int is_tft;
+
-+ dispc_set_lcd_size(display->x_res, display->y_res);
++ dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+
-+ dispc_set_lcd_timings(&panel->timings);
+ dispc_set_pol_freq(panel);
+
+ is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
+ {
+ struct dsi_clock_info cinfo;
+ dsi_pll_calc_pck(is_tft,
-+ display->panel->timings.pixel_clock*1000,
++ display->panel->timings.pixel_clock * 1000,
+ &cinfo);
+
+ dsi_pll_program(&cinfo);
+#else
+ {
+ struct dispc_clock_info cinfo;
-+ dispc_calc_clock_div(is_tft, panel->timings.pixel_clock*1000,
++ dispc_calc_clock_div(is_tft, panel->timings.pixel_clock * 1000,
+ &cinfo);
+
+ if (dispc_set_clock_div(&cinfo)) {
+ DSSERR("Failed to set DSS clocks\n");
++ dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+ return;
+ }
+
+ pck = fck / lck_div / pck_div / 1000;
+
+ if (pck != panel->timings.pixel_clock) {
-+ DSSWARN("Could not find exact pixel clock. Requested %d KHz, "
-+ "got %lu KHz.\n",
-+ panel->timings.pixel_clock,
-+ pck);
++ DSSWARN("Could not find exact pixel clock. "
++ "Requested %d kHz, got %lu kHz\n",
++ panel->timings.pixel_clock, pck);
+
+ panel->timings.pixel_clock = pck;
+ }
+
-+ DSSDBG("fck %lu, lck_div %d, pck_div %d\n", fck, lck_div, pck_div);
-+#ifdef DEBUG
-+ {
-+ struct omap_video_timings *t;
-+ int xtot, ytot;
-+ unsigned long ht, vt;
-+
-+ t = &display->panel->timings;
-+ xtot = display->panel->x_res + t->hfp + t->hsw + t->hbp;
-+ ytot = display->panel->y_res + t->vfp + t->vsw + t->vbp;
-+
-+ ht = (pck * 1000) / xtot;
-+ vt = (pck * 1000) / xtot / ytot;
-+
-+ DSSDBG("hsync %ldHz, vsync %ldHz\n", ht, vt);
++ dispc_set_lcd_timings(&panel->timings);
+
-+ }
-+#endif
-+ DSSDBG("pixel clock changed to %d\n", panel->timings.pixel_clock);
++ dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+}
+
+
+ struct omap_panel *panel = display->panel;
+ int r;
+ int is_tft;
++ unsigned high, low, burst;
+
+ if (display->state != OMAP_DSS_DISPLAY_DISABLED) {
+ DSSERR("display already enabled\n");
+ OMAP_DSS_LCD_DISPLAY_STN);
+ dispc_set_tft_data_lines(display->hw_config.u.dpi.data_lines);
+
++ dispc_set_burst_size(OMAP_DSS_GFX, OMAP_DSS_BURST_16x32);
++ dispc_set_burst_size(OMAP_DSS_VIDEO1, OMAP_DSS_BURST_16x32);
++ dispc_set_burst_size(OMAP_DSS_VIDEO2, OMAP_DSS_BURST_16x32);
++
++ burst = 16 * 32 / 8;
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_GFX) - burst;
++ low = dispc_get_plane_fifo_size(OMAP_DSS_GFX) / 4;
++ dispc_setup_plane_fifo(OMAP_DSS_GFX, low, high);
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO1) - burst;
++ low = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO1) / 4;
++ dispc_setup_plane_fifo(OMAP_DSS_VIDEO1, low, high);
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO2) - burst;
++ low = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO2) / 4;
++ dispc_setup_plane_fifo(OMAP_DSS_VIDEO2, low, high);
++
+ dpi_set_mode(display);
+
+ mdelay(2);
+ return 0;
+}
+
-+static void dpi_display_set_mode(struct omap_display *display,
-+ int x_res, int y_res, int bpp)
-+{
-+ if (display->panel && display->panel->set_mode)
-+ display->panel->set_mode(display, x_res, y_res, bpp);
-+}
-+
+static void dpi_set_timings(struct omap_display *display,
+ struct omap_video_timings *timings)
+{
+ DSSDBG("dpi_set_timings\n");
+ display->panel->timings = *timings;
-+ dpi_set_mode(display);
++ if (display->state == OMAP_DSS_DISPLAY_ACTIVE) {
++ dpi_set_mode(display);
++ dispc_go(OMAP_DSS_CHANNEL_LCD);
++ }
+}
+
+static int dpi_check_timings(struct omap_display *display,
+{
+ int is_tft;
+ int r;
++ int lck_div, pck_div;
++ unsigned long fck;
++ unsigned long pck;
+
+ if (timings->hsw < 1 || timings->hsw > 64 ||
+ timings->hfp < 1 || timings->hfp > 256 ||
+ is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
+
+#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
-+ r = dsi_pll_calc_pck(is_tft, timings->pixel_clock * 1000, 0);
++ {
++ struct dsi_clock_info cinfo;
++ r = dsi_pll_calc_pck(is_tft, timings->pixel_clock * 1000,
++ &cinfo);
++
++ if (r)
++ return r;
++
++ fck = cinfo.dispc_fck;
++ lck_div = cinfo.lck_div;
++ pck_div = cinfo.pck_div;
++ }
+#else
-+ r = dispc_calc_clock_div(is_tft, timings->pixel_clock * 1000, 0);
++ {
++ struct dispc_clock_info cinfo;
++ r = dispc_calc_clock_div(is_tft, timings->pixel_clock * 1000,
++ &cinfo);
++
++ if (r)
++ return r;
++
++ fck = cinfo.fck;
++ lck_div = cinfo.lck_div;
++ pck_div = cinfo.pck_div;
++ }
+#endif
-+ if (r)
-+ return r;
++
++ pck = fck / lck_div / pck_div / 1000;
++
++ timings->pixel_clock = pck;
+
+ return 0;
+}
+ display->disable = dpi_display_disable;
+ display->suspend = dpi_display_suspend;
+ display->resume = dpi_display_resume;
-+ display->set_mode = dpi_display_set_mode;
+ display->set_timings = dpi_set_timings;
+ display->check_timings = dpi_check_timings;
+ display->get_timings = dpi_get_timings;
+
diff --git a/arch/arm/plat-omap/dss/dsi.c b/arch/arm/plat-omap/dss/dsi.c
new file mode 100644
-index 0000000..7f7db32
+index 0000000..e279571
--- /dev/null
+++ b/arch/arm/plat-omap/dss/dsi.c
-@@ -0,0 +1,3135 @@
+@@ -0,0 +1,3187 @@
+/*
+ * linux/arch/arm/plat-omap/dss/dsi.c
+ *
+ struct completion update_completion;
+ struct delayed_work framedone_work;
+
-+ enum omap_dss_update_mode user_update_mode; /* what the user wants */
-+ enum omap_dss_update_mode update_mode; /* current mode */
++ enum omap_dss_update_mode user_update_mode; /* what the user wants */
++ enum omap_dss_update_mode update_mode; /* current mode */
+ int use_te;
+ int framedone_scheduled; /* helps to catch strange framedone bugs */
+
+ int bytespp;
+ } update_region;
+
++ unsigned long cache_req_pck;
++ unsigned long cache_clk_freq;
++ struct dsi_clock_info cache_cinfo;
++
+#ifdef MEASURE_PERF
-+ ktime_t measure_time;
-+ int measure_frames;
++ ktime_t perf_setup_time;
++ ktime_t perf_start_time;
++ int perf_measure_frames;
+#endif
+} dsi;
+
+
+
+#ifdef MEASURE_PERF
-+static void start_measuring(void)
++static void perf_mark_setup(void)
++{
++ dsi.perf_setup_time = ktime_get();
++}
++
++static void perf_mark_start(void)
+{
-+ dsi.measure_time = ktime_get();
++ dsi.perf_start_time = ktime_get();
+}
+
-+static void end_measuring(const char *name)
++static void perf_show(const char *name)
+{
-+ ktime_t t;
++ ktime_t t, setup_time, trans_time;
+ u32 total_bytes;
-+ u32 us;
++ u32 setup_us, trans_us, total_us;
+ const int numframes = 100;
++ static u32 s_trans_us, s_min_us = 0xffffffff, s_max_us;
+
+ if (dsi.update_mode == OMAP_DSS_UPDATE_DISABLED)
+ return;
+
-+ if (dsi.update_mode == OMAP_DSS_UPDATE_AUTO) {
-+ dsi.measure_frames++;
-+ if (dsi.measure_frames < numframes)
-+ return;
-+ dsi.measure_frames = 0;
-+ }
-+
+ t = ktime_get();
-+ t = ktime_sub(t, dsi.measure_time);
-+ us = (u32)ktime_to_us(t);
-+ if (us == 0)
-+ us = 1;
++
++ setup_time = ktime_sub(dsi.perf_start_time, dsi.perf_setup_time);
++ setup_us = (u32)ktime_to_us(setup_time);
++ if (setup_us == 0)
++ setup_us = 1;
++
++ trans_time = ktime_sub(t, dsi.perf_start_time);
++ trans_us = (u32)ktime_to_us(trans_time);
++ if (trans_us == 0)
++ trans_us = 1;
++
++ total_us = setup_us + trans_us;
+
+ total_bytes = dsi.update_region.w *
+ dsi.update_region.h *
+ dsi.update_region.bytespp;
+
+ if (dsi.update_mode == OMAP_DSS_UPDATE_AUTO) {
-+ DSSINFO("%s update: %d frames in %u us, %u frames/sec\n",
++ dsi.perf_measure_frames++;
++
++ if (trans_us < s_min_us)
++ s_min_us = trans_us;
++
++ if (trans_us > s_max_us)
++ s_max_us = trans_us;
++
++ s_trans_us += trans_us;
++
++ if (dsi.perf_measure_frames < numframes)
++ return;
++
++ DSSINFO("%s update: %d frames in %u us (min/max %u/%u), "
++ "%u fps\n",
+ name, numframes,
-+ us,
-+ 1000*1000 / us);
++ s_trans_us,
++ s_min_us,
++ s_max_us,
++ 1000*1000 / (s_trans_us / numframes));
++
++ dsi.perf_measure_frames = 0;
++ s_trans_us = 0;
++ s_min_us = 0xffffffff;
++ s_max_us = 0;
+ } else {
-+ DSSINFO("%s update in %u us (%u Hz), %u bytes, %u kbytes/sec\n",
++ DSSINFO("%s update %u us + %u us = %u us (%uHz), %u bytes, "
++ "%u kbytes/sec\n",
+ name,
-+ us,
-+ 1000*1000 / us,
++ setup_us,
++ trans_us,
++ total_us,
++ 1000*1000 / total_us,
+ total_bytes,
-+ total_bytes * 1000 / us);
++ total_bytes * 1000 / total_us);
+ }
+}
+#else
-+#define start_measuring()
-+#define end_measuring(x)
++#define perf_mark_setup()
++#define perf_mark_start()
++#define perf_show(x)
+#endif
+
+
+ }
+}
+
-+#if 1
-+
+#ifdef DEBUG
+static void _dsi_print_reset_status(void)
+{
+ u32 l;
+
++ if (!dss_debug)
++ return;
++
+ /* A dummy read using the SCP interface to any DSIPHY register is
+ * required after DSIPHY reset to complete the reset of the DSI complex
+ * I/O. */
+#define _dsi_print_reset_status()
+#endif
+
-+static int _dsi_reset(void)
-+{
-+ int r = 0;
-+
-+ /* Soft reset */
-+ REG_FLD_MOD(DSI_SYSCONFIG, 1, 1, 1);
-+
-+ if (wait_for_bit_change(DSI_SYSSTATUS, 0, 1) != 1) {
-+ DSSERR("soft reset failed\n");
-+ r = -ENODEV;
-+ }
-+
-+ /* A dummy read using the SCP interface to any DSIPHY register is
-+ * required after DSIPHY reset to complete the reset of the DSI complex
-+ * I/O. */
-+ dsi_read_reg(DSI_DSIPHY_CFG5);
-+
-+ _dsi_print_reset_status();
-+
-+ return r;
-+}
-+#endif
-+
+static inline int dsi_if_enable(int enable)
+{
+ DSSDBG("dsi_if_enable(%d)\n", enable);
+ int min_fck_per_pck;
+ int match = 0;
+
++ if (req_pck == dsi.cache_req_pck &&
++ dsi.cache_cinfo.clkin == dss_clk_get_rate(DSS_CLK_FCK2)) {
++ DSSDBG("DSI clock info found from cache\n");
++ *cinfo = dsi.cache_cinfo;
++ return 0;
++ }
++
+ min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK;
+
+ if (min_fck_per_pck &&
+ if (cinfo)
+ *cinfo = best;
+
++ dsi.cache_req_pck = req_pck;
++ dsi.cache_clk_freq = 0;
++ dsi.cache_cinfo = best;
++
+ return 0;
+}
+
-+static int dsi_pll_calc_datafreq(unsigned long datafreq,
++static int dsi_pll_calc_ddrfreq(unsigned long clk_freq,
+ struct dsi_clock_info *cinfo)
+{
+ struct dsi_clock_info cur, best;
+ const int use_dss2_fck = 1;
++ unsigned long datafreq;
++
++ DSSDBG("dsi_pll_calc_ddrfreq\n");
++
++ if (clk_freq == dsi.cache_clk_freq &&
++ dsi.cache_cinfo.clkin == dss_clk_get_rate(DSS_CLK_FCK2)) {
++ DSSDBG("DSI clock info found from cache\n");
++ *cinfo = dsi.cache_cinfo;
++ return 0;
++ }
+
-+ DSSDBG("dsi_pll_calc_datarate\n");
++ datafreq = clk_freq * 4;
+
+ memset(&best, 0, sizeof(best));
+
+ if (cinfo)
+ *cinfo = best;
+
++ dsi.cache_clk_freq = clk_freq;
++ dsi.cache_req_pck = 0;
++ dsi.cache_cinfo = best;
++
+ return 0;
+}
+
+ /* CIO_CLK_ICG, enable L3 clk to CIO */
+ REG_FLD_MOD(DSI_CLK_CTRL, 1, 14, 14);
+
++ /* A dummy read using the SCP interface to any DSIPHY register is
++ * required after DSIPHY reset to complete the reset of the DSI complex
++ * I/O. */
++ dsi_read_reg(DSI_DSIPHY_CFG5);
++
+ if (wait_for_bit_change(DSI_DSIPHY_CFG5, 30, 1) != 1) {
+ DSSERR("ComplexIO PHY not coming out of reset.\n");
+ r = -ENODEV;
+ /* 10000ns * 4 */
+ dsi_set_hs_tx_timeout(10000, 1, 0);
+
-+ switch (display->bpp) {
++ switch (display->ctrl->pixel_size) {
+ case 16:
+ buswidth = 0;
+ break;
+ if (ovl->info.color_mode != OMAP_DSS_COLOR_RGB24U)
+ return -EINVAL;
+
-+ if (display->ctrl->bpp != 24)
++ if (display->ctrl->pixel_size != 24)
+ return -EINVAL;
+
+ enable_clocks(1);
+ dsi.update_region.h = h;
+ dsi.update_region.bytespp = bytespp;
+
-+ start_measuring();
++ perf_mark_start();
+
+ while (pixels_left > 0) {
+ /* 0x2c = write_memory_start */
+ DSI_FLUSH(0);
+ }
+
-+ end_measuring("L4");
++ perf_show("L4");
+
+ enable_clocks(0);
+ dsi_enable_pll_clock(0);
+ if (0)
+ dsi_vc_print_status(1);
+
-+ start_measuring();
++ perf_mark_start();
+
+ l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */
+ dsi_write_reg(DSI_VC_TE(1), l);
+ }
+ spin_unlock_irqrestore(&dsi.update_lock, flags);
+
-+ end_measuring("DISPC");
++ perf_show("DISPC");
+
+ if (dsi.user_update_mode != OMAP_DSS_UPDATE_AUTO)
+ DSSDBG("FRAMEDONE\n");
+ dsi.update_region.display = display;
+ dsi.update_region.x = 0;
+ dsi.update_region.y = 0;
-+ dsi.update_region.w = display->x_res;
-+ dsi.update_region.h = display->y_res;
++ dsi.update_region.w = display->panel->timings.x_res;
++ dsi.update_region.h = display->panel->timings.y_res;
+ dsi.update_region.bytespp = bytespp;
+
+ enable_clocks(1);
+ dsi_enable_pll_clock(1);
+
-+ dispc_set_lcd_size(display->x_res, display->y_res);
++ dispc_set_lcd_size(display->panel->timings.x_res,
++ display->panel->timings.y_res);
+
+ spin_lock_irqsave(&dsi.update_lock, flags);
+ dsi.update_ongoing = 1;
+{
+ int r = 0;
+ struct dsi_clock_info cinfo;
++ u32 low, high;
+
+ DSSDBG("dsi_display_enable\n");
+
+
+ dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_DSI);
+ dispc_enable_fifohandcheck(1);
-+ dispc_setup_plane_fifo(OMAP_DSS_GFX, 0);
-+ dispc_setup_plane_fifo(OMAP_DSS_VIDEO1, 0);
-+ dispc_setup_plane_fifo(OMAP_DSS_VIDEO2, 0);
-+ dispc_set_tft_data_lines(display->bpp);
++
++ dispc_set_burst_size(OMAP_DSS_GFX, OMAP_DSS_BURST_16x32);
++ dispc_set_burst_size(OMAP_DSS_VIDEO1, OMAP_DSS_BURST_16x32);
++ dispc_set_burst_size(OMAP_DSS_VIDEO2, OMAP_DSS_BURST_16x32);
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_GFX) - (16*32/8);
++ low = 0;
++ dispc_setup_plane_fifo(OMAP_DSS_GFX, low, high);
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO1) - (16*32/8);
++ low = 0;
++ dispc_setup_plane_fifo(OMAP_DSS_VIDEO1, low, high);
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO2) - (16*32/8);
++ low = 0;
++ dispc_setup_plane_fifo(OMAP_DSS_VIDEO2, low, high);
++
++ dispc_set_tft_data_lines(display->ctrl->pixel_size);
+
+ {
+ struct omap_video_timings timings = {
+ if (r)
+ goto err2;
+
-+ /* XXX hardcoded for 300Mbp/lane for now */
-+ r = dsi_pll_calc_datafreq(600 * 1000 * 1000, &cinfo);
++ r = dsi_pll_calc_ddrfreq(display->hw_config.u.dsi.ddr_clk_hz, &cinfo);
+ if (r)
+ goto err3;
+
+ return 0;
+}
+
-+static void dsi_display_set_mode(struct omap_display *display,
-+ int x_res, int y_res, int bpp)
-+{
-+ DSSDBG("dsi_display_set_mode %dx%d, %dbpp\n", x_res, y_res, bpp);
-+}
-+
+static int dsi_display_update(struct omap_display *display,
+ int x, int y, int w, int h)
+{
+ goto end;
+ }
+
++ perf_mark_setup();
++
+ dsi.update_ongoing = 1;
+
+ if (dsi.update_syncers > 0)
+ display->disable = dsi_display_disable;
+ display->suspend = dsi_display_suspend;
+ display->resume = dsi_display_resume;
-+ display->set_mode = dsi_display_set_mode;
+ display->update = dsi_display_update;
+ display->sync = dsi_display_sync;
+ display->set_update_mode = dsi_display_set_update_mode;
+ /* SIDLEMODE smart-idle */
+ REG_FLD_MOD(DSI_SYSCONFIG, 2, 4, 3);
+
-+ if (0)
-+ _dsi_reset();
-+
+ _dsi_initialize_irq();
+
+ rev = dsi_read_reg(DSI_REVISION);
+
diff --git a/arch/arm/plat-omap/dss/dss.c b/arch/arm/plat-omap/dss/dss.c
new file mode 100644
-index 0000000..cc402dc
+index 0000000..4a403c1
--- /dev/null
+++ b/arch/arm/plat-omap/dss/dss.c
-@@ -0,0 +1,789 @@
+@@ -0,0 +1,774 @@
+/*
+ * linux/arch/arm/plat-omap/dss/dss.c
+ *
+static void dss_clk_disable_no_ctx(enum dss_clock clks);
+static int _omap_dss_wait_reset(void);
+
++static char *def_disp_name;
++module_param_named(def_disp, def_disp_name, charp, 0);
++MODULE_PARM_DESC(def_disp_name, "default display name");
++
++#ifdef DEBUG
++unsigned int dss_debug;
++module_param_named(debug, dss_debug, bool, 0644);
++#endif
++
+static inline void dss_write_reg(const struct dss_reg idx, u32 val)
+{
+ __raw_writel(val, dss.base + idx.idx);
+
+static void dss_save_context(void)
+{
++ if (cpu_is_omap24xx())
++ return;
++
+ SR(SYSCONFIG);
+ SR(CONTROL);
+ SR(SDI_CONTROL);
+#undef SR
+#undef RR
+
-+/* PM TESTING */
-+#if 0
-+static unsigned last_tr_id;
-+
-+unsigned get_last_off_on_transaction_id(struct device *dev)
-+{
-+ return last_tr_id;
-+}
-+
-+void inc_last_off_on_transaction_id(void)
++static unsigned dss_get_ctx_id(void)
+{
-+ last_tr_id++;
-+}
++ struct omap_dss_platform_data *pdata = dss.pdev->dev.platform_data;
+
-+unsigned get_last_off_on_transaction_id(struct device *dev);
++ if (!pdata->get_last_off_on_transaction_id)
++ return 0;
+
-+unsigned dss_get_ctx_id(void)
-+{
-+ return get_last_off_on_transaction_id(&dss.pdev->dev);
++ return pdata->get_last_off_on_transaction_id(&dss.pdev->dev);
+}
-+#else
-+static unsigned dss_get_ctx_id(void)
-+{
-+ return 0;
-+}
-+#endif
+
+static void save_all_ctx(void)
+{
+
+void dss_clk_enable(enum dss_clock clks)
+{
-+ int id;
-+
+ dss_clk_enable_no_ctx(clks);
+
-+ id = dss_get_ctx_id();
++ if (cpu_is_omap34xx()) {
++ int id = dss_get_ctx_id();
+
-+ if (id != dss.ctx_id) {
-+ DSSDBG("ctx id %u -> id %u\n",
-+ dss.ctx_id, id);
-+ restore_all_ctx();
-+ dss.ctx_id = id;
++ if (id != dss.ctx_id) {
++ DSSDBG("ctx id %u -> id %u\n",
++ dss.ctx_id, id);
++ restore_all_ctx();
++ dss.ctx_id = id;
++ }
+ }
+}
+
+
+void dss_clk_disable(enum dss_clock clks)
+{
-+ unsigned num_clks = count_clk_bits(clks);
++ if (cpu_is_omap34xx()) {
++ unsigned num_clks = count_clk_bits(clks);
+
-+ BUG_ON(dss.num_clks_enabled < num_clks);
++ BUG_ON(dss.num_clks_enabled < num_clks);
+
-+ if (dss.num_clks_enabled == num_clks)
-+ save_all_ctx();
++ if (dss.num_clks_enabled == num_clks)
++ save_all_ctx();
++ }
+
+ dss_clk_disable_no_ctx(clks);
+}
+
+static irqreturn_t dss_irq_handler_omap2(int irq, void *arg)
+{
-+ //clk_enable(dss.dss_ick);
-+ //clk_enable(dss.dss1_fck);
-+
+ dispc_irq_handler();
+
-+ //clk_disable(dss.dss1_fck);
-+ //clk_disable(dss.dss_ick);
-+
+ return IRQ_HANDLED;
+}
+
+{
+ u32 irqstatus;
+
-+ //clk_enable(dss.dss_ick); // XXX are these needed...
-+ //clk_enable(dss.dss1_fck);
-+
+ irqstatus = dss_read_reg(DSS_IRQSTATUS);
+
+ if (irqstatus & (1<<0)) /* DISPC_IRQ */
+ dsi_irq_handler();
+#endif
+
-+ //clk_disable(dss.dss1_fck);
-+ //clk_disable(dss.dss_ick);
-+
+ return IRQ_HANDLED;
+}
+
+ if (r)
+ goto fail0;
+
-+ initialize_overlays();
++ initialize_overlays(def_disp_name);
+
+ dss_clk_disable_all();
+
+
diff --git a/arch/arm/plat-omap/dss/dss.h b/arch/arm/plat-omap/dss/dss.h
new file mode 100644
-index 0000000..04abdc6
+index 0000000..da628a7
--- /dev/null
+++ b/arch/arm/plat-omap/dss/dss.h
-@@ -0,0 +1,268 @@
+@@ -0,0 +1,274 @@
+/*
+ * linux/arch/arm/plat-omap/dss/dss.h
+ *
+#ifndef __OMAP2_DSS_H
+#define __OMAP2_DSS_H
+
-+#ifdef CONFIG_OMAP2_DSS_DEBUG
++#ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
+#define DEBUG
+#endif
+
+#ifdef DEBUG
++extern unsigned int dss_debug;
+#ifdef DSS_SUBSYS_NAME
+#define DSSDBG(format, ...) \
-+ printk(KERN_DEBUG "omap-dss " DSS_SUBSYS_NAME ": " format, \
-+ ## __VA_ARGS__)
++ if (dss_debug) \
++ printk(KERN_DEBUG "omap-dss " DSS_SUBSYS_NAME ": " format, \
++ ## __VA_ARGS__)
+#else
+#define DSSDBG(format, ...) \
-+ printk(KERN_DEBUG "omap-dss: " format, ## __VA_ARGS__)
++ if (dss_debug) \
++ printk(KERN_DEBUG "omap-dss: " format, ## __VA_ARGS__)
+#endif
+#else
+#define DSSDBG(format, ...)
+int initialize_sysfs(struct device *dev);
+void uninitialize_sysfs(struct device *dev);
+void initialize_displays(struct omap_dss_platform_data *pdata);
-+void initialize_overlays(void);
++void initialize_overlays(const char *def_disp_name);
+
+/* DSS */
+int dss_init(void);
+
+void dispc_set_lcd_size(int width, int height);
+void dispc_set_digit_size(int width, int height);
-+void dispc_setup_plane_fifo(enum omap_plane plane, int ext_mode);
++u32 dispc_get_plane_fifo_size(enum omap_plane plane);
++void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high);
++void dispc_set_burst_size(enum omap_plane plane,
++ enum omap_burst_size burst_size);
+
+void dispc_set_plane_ba0(enum omap_plane plane, u32 paddr);
+void dispc_set_plane_ba1(enum omap_plane plane, u32 paddr);
+#endif
diff --git a/arch/arm/plat-omap/dss/rfbi.c b/arch/arm/plat-omap/dss/rfbi.c
new file mode 100644
-index 0000000..eaf6e2c
+index 0000000..b4b65e6
--- /dev/null
+++ b/arch/arm/plat-omap/dss/rfbi.c
-@@ -0,0 +1,1225 @@
+@@ -0,0 +1,1262 @@
+/*
+ * linux/arch/arm/plat-omap/dss/rfbi.c
+ *
+#include <linux/delay.h>
+#include <linux/kfifo.h>
+#include <linux/ktime.h>
++#include <linux/hrtimer.h>
+
+#include <mach/board.h>
+#include <mach/display.h>
+ atomic_t cmd_fifo_full;
+ atomic_t cmd_pending;
+#ifdef MEASURE_PERF
-+ ktime_t perf_time;
++ unsigned perf_bytes;
++ ktime_t perf_setup_time;
++ ktime_t perf_start_time;
+#endif
+} rfbi;
+
+}
+EXPORT_SYMBOL(omap_rfbi_write_pixels);
+
++#ifdef MEASURE_PERF
++static void perf_mark_setup(void)
++{
++ rfbi.perf_setup_time = ktime_get();
++}
++
++static void perf_mark_start(void)
++{
++ rfbi.perf_start_time = ktime_get();
++}
++
++static void perf_show(const char *name)
++{
++ ktime_t t, setup_time, trans_time;
++ u32 total_bytes;
++ u32 setup_us, trans_us, total_us;
++
++ t = ktime_get();
++
++ setup_time = ktime_sub(rfbi.perf_start_time, rfbi.perf_setup_time);
++ setup_us = (u32)ktime_to_us(setup_time);
++ if (setup_us == 0)
++ setup_us = 1;
++
++ trans_time = ktime_sub(t, rfbi.perf_start_time);
++ trans_us = (u32)ktime_to_us(trans_time);
++ if (trans_us == 0)
++ trans_us = 1;
++
++ total_us = setup_us + trans_us;
++
++ total_bytes = rfbi.perf_bytes;
++
++ DSSINFO("%s update %u us + %u us = %u us (%uHz), %u bytes, "
++ "%u kbytes/sec\n",
++ name,
++ setup_us,
++ trans_us,
++ total_us,
++ 1000*1000 / total_us,
++ total_bytes,
++ total_bytes * 1000 / total_us);
++}
++#else
++#define perf_mark_setup()
++#define perf_mark_start()
++#define perf_show(x)
++#endif
++
+void rfbi_transfer_area(int width, int height,
+ void (callback)(void *data), void *data)
+{
+
+ rfbi_enable_clocks(1);
+
-+#ifdef MEASURE_PERF
-+ rfbi.perf_time = ktime_get();
-+#endif
+ rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
+
+ l = rfbi_read_reg(RFBI_CONTROL);
+ if (!rfbi.te_enabled)
+ l = FLD_MOD(l, 1, 4, 4); /* ITE */
+
++ perf_mark_start();
++
+ rfbi_write_reg(RFBI_CONTROL, l);
+}
+
+{
+ void (*callback)(void *data);
+
-+#ifdef MEASURE_PERF
-+ {
-+ ktime_t t = ktime_get();
-+ t = ktime_sub(t, rfbi.perf_time);
-+ DSSDBG("FRAMEDONE in %lld ns\n", ktime_to_ns(t));
-+ }
-+#else
+ DSSDBG("FRAMEDONE\n");
-+#endif
++
++ perf_show("DISPC");
+
+ REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
+
+
+ return 0;
+}
++EXPORT_SYMBOL(rfbi_configure);
+
+static int rfbi_find_display(struct omap_display *disp)
+{
+ int w = upd->w;
+ int h = upd->h;
+
++ perf_mark_setup();
++
+ if (display->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
+ /*display->ctrl->enable_te(display, 1); */
-+
+ dispc_setup_partial_planes(display, &x, &y, &w, &h);
++ }
+
-+ display->ctrl->setup_update(display, x, y, w, h);
++#ifdef MEASURE_PERF
++ rfbi.perf_bytes = w * h * 2; /* XXX always 16bit */
++#endif
+
-+ rfbi_transfer_area(w, h, NULL, NULL);
++ display->ctrl->setup_update(display, x, y, w, h);
+
++ if (display->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
++ rfbi_transfer_area(w, h, NULL, NULL);
+ return 1;
+ } else {
+ struct omap_overlay *ovl;
+ void *addr;
+ int scr_width;
-+#ifdef MEASURE_PERF
-+ ktime_t t1, t2;
-+#endif
++
+ ovl = &display->manager->overlays[0];
+ scr_width = ovl->info.screen_width;
+ addr = ovl->info.vaddr;
+
-+ display->ctrl->setup_update(display, x, y, w, h);
++ omap_rfbi_write_pixels(addr, scr_width, x, y, w, h);
++
++ perf_show("L4");
+
-+#ifdef MEASURE_PERF
-+ t1 = ktime_get();
-+#endif
-+ omap_rfbi_write_pixels(addr, scr_width,
-+ x, y, w, h);
-+#ifdef MEASURE_PERF
-+ t2 = ktime_get();
-+ t1 = ktime_sub(t2, t1);
-+ DSSDBG("L4 FRAMEDONE in %lld ns\n",
-+ ktime_to_ns(t1));
-+#endif
+ return 0;
+ }
+}
+}
+
+/* struct omap_display support */
-+static void rfbi_display_set_mode(struct omap_display *display,
-+ int x_res, int y_res, int bpp)
-+{
-+ display->bpp = bpp;
-+
-+ dispc_set_tft_data_lines(display->bpp);
-+
-+ if (rfbi_configure(display->hw_config.u.rfbi.channel,
-+ display->bpp,
-+ display->hw_config.u.rfbi.data_lines) != 0) {
-+ DSSERR("can't configure rfbi\n");
-+ }
-+
-+ display->ctrl->set_mode(display, x_res, y_res, bpp);
-+}
-+
-+
+static int rfbi_display_update(struct omap_display *display,
+ int x, int y, int w, int h)
+{
+
+ dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_RFBI);
+
-+ /* FIX select 16bpp as default */
++ dispc_set_tft_data_lines(display->ctrl->pixel_size);
++
+ rfbi_configure(display->hw_config.u.rfbi.channel,
-+ 16,
-+ display->hw_config.u.rfbi.data_lines);
++ display->ctrl->pixel_size,
++ display->hw_config.u.rfbi.data_lines);
+
+ rfbi_set_timings(display->hw_config.u.rfbi.channel,
+ &display->ctrl->timings);
+
-+ display->ctrl->enable(display);
++
++ if (display->ctrl && display->ctrl->enable) {
++ r = display->ctrl->enable(display);
++ if (r)
++ goto err;
++ }
++
++ if (display->panel && display->panel->enable) {
++ r = display->panel->enable(display);
++ if (r)
++ goto err;
++ }
+
+ return 0;
++err:
++ return -ENODEV;
+}
+
+static void rfbi_display_disable(struct omap_display *display)
+{
+ display->enable = rfbi_display_enable;
+ display->disable = rfbi_display_disable;
-+ display->set_mode = rfbi_display_set_mode;
+ display->update = rfbi_display_update;
+ display->sync = rfbi_display_sync;
+ display->enable_te = rfbi_display_enable_te;
+}
diff --git a/arch/arm/plat-omap/dss/sdi.c b/arch/arm/plat-omap/dss/sdi.c
new file mode 100644
-index 0000000..8d5b16d
+index 0000000..02d549b
--- /dev/null
+++ b/arch/arm/plat-omap/dss/sdi.c
-@@ -0,0 +1,150 @@
+@@ -0,0 +1,174 @@
+/*
+ * linux/arch/arm/plat-omap/dss/sdi.c
+ *
+ struct dispc_clock_info cinfo;
+ int lck_div, pck_div;
+ unsigned long fck;
-+
+ struct omap_panel *panel = display->panel;
++ unsigned high, low, burst;
++ unsigned long pck;
+
++ if (display->state != OMAP_DSS_DISPLAY_DISABLED) {
++ DSSERR("display already enabled\n");
++ return -EINVAL;
++ }
+
+ panel->enable(display);
+
+ dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+
+ dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_BYPASS);
-+ dispc_set_lcd_size(display->x_res, display->y_res);
++
++ dispc_set_burst_size(OMAP_DSS_GFX, OMAP_DSS_BURST_16x32);
++ dispc_set_burst_size(OMAP_DSS_VIDEO1, OMAP_DSS_BURST_16x32);
++ dispc_set_burst_size(OMAP_DSS_VIDEO2, OMAP_DSS_BURST_16x32);
++
++ burst = 16 * 32 / 8;
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_GFX) - burst;
++ low = dispc_get_plane_fifo_size(OMAP_DSS_GFX) / 4 * 3;
++ dispc_setup_plane_fifo(OMAP_DSS_GFX, low, high);
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO1) - burst;
++ low = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO1) / 4 * 3;
++ dispc_setup_plane_fifo(OMAP_DSS_VIDEO1, low, high);
++
++ high = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO2) - burst;
++ low = dispc_get_plane_fifo_size(OMAP_DSS_VIDEO2) / 4 * 3;
++ dispc_setup_plane_fifo(OMAP_DSS_VIDEO2, low, high);
+
+ /* 15.5.9.1.2 */
+ panel->config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF;
+
-+ dispc_set_lcd_timings(&panel->timings);
+ dispc_set_pol_freq(panel);
+
+ dispc_calc_clock_div(1, panel->timings.pixel_clock * 1000,
+ lck_div = cinfo.lck_div;
+ pck_div = cinfo.pck_div;
+
-+ panel->timings.pixel_clock = fck / lck_div / pck_div / 1000;
++ pck = fck / lck_div / pck_div / 1000;
++
++ if (pck != panel->timings.pixel_clock) {
++ DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
++ "got %lu kHz\n",
++ panel->timings.pixel_clock, pck);
+
-+ DSSDBG("fck %lu, lck_div %d, pck_div %d\n", fck, lck_div, pck_div);
-+ DSSDBG("pixel clock changed to %d\n", panel->timings.pixel_clock);
++ panel->timings.pixel_clock = pck;
++ }
+
++ dispc_set_lcd_timings(&panel->timings);
+
+ dispc_set_lcd_display_type(OMAP_DSS_LCD_DISPLAY_TFT);
+ dispc_set_tft_data_lines(24);
+
+ dispc_enable_lcd_out(1);
+
++ display->state = OMAP_DSS_DISPLAY_ACTIVE;
++
+ return 0;
+}
+
+static void sdi_display_disable(struct omap_display *display)
+{
++ if (display->state == OMAP_DSS_DISPLAY_DISABLED)
++ return;
++
+ display->panel->disable(display);
+ dispc_enable_lcd_out(0);
+
+ dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
-+}
+
-+static void sdi_display_set_mode(struct omap_display *display,
-+ int x_res, int y_res, int bpp)
-+{
-+ if (display->ctrl && display->ctrl->set_mode)
-+ display->ctrl->set_mode(display, x_res, y_res, bpp);
-+ if (display->panel && display->panel->set_mode)
-+ display->panel->set_mode(display, x_res, y_res, bpp);
++ display->state = OMAP_DSS_DISPLAY_DISABLED;
+}
+
+static int sdi_display_set_update_mode(struct omap_display *display,
+
+ display->enable = sdi_display_enable;
+ display->disable = sdi_display_disable;
-+ display->set_mode = sdi_display_set_mode;
+ display->set_update_mode = sdi_display_set_update_mode;
+ display->get_update_mode = sdi_display_get_update_mode;
+}
+}
diff --git a/arch/arm/plat-omap/dss/venc.c b/arch/arm/plat-omap/dss/venc.c
new file mode 100644
-index 0000000..7afb2c5
+index 0000000..81319e4
--- /dev/null
+++ b/arch/arm/plat-omap/dss/venc.c
-@@ -0,0 +1,501 @@
+@@ -0,0 +1,506 @@
+/*
+ * linux/arch/arm/plat-omap/dss/venc.c
+ *
+
+static struct omap_panel venc_panel = {
+ .name = "tv-out",
-+ .x_res = 0,
-+ .y_res = 0,
+ .bpp = 24,
+};
+
+ else
+ venc.config = &venc_config_ntsc_trm;
+
-+ venc_panel.x_res = venc.config->width;
-+ venc_panel.y_res = venc.config->height;
++ venc_panel.timings.x_res = venc.config->width;
++ venc_panel.timings.y_res = venc.config->height;
+
+ venc.base = ioremap(VENC_BASE, SZ_1K);
+ if (!venc.base) {
+
+ dispc_go(OMAP_DSS_CHANNEL_DIGIT);
+
-+ omap_dispc_register_isr(venc_sync_lost_handler, 0,
++ omap_dispc_register_isr(venc_sync_lost_handler, NULL,
+ DISPC_IRQ_SYNC_LOST_DIGIT);
+
+ dispc_enable_digit_out(1);
+ mutex_unlock(&venc.venc_lock);
+}
+
++static void venc_get_timings(struct omap_display *display,
++ struct omap_video_timings *timings)
++{
++ *timings = venc_panel.timings;
++}
++
+void venc_init_display(struct omap_display *display)
+{
+ display->panel = &venc_panel;
+ display->enable = venc_enable_display;
+ display->disable = venc_disable_display;
++ display->get_timings = venc_get_timings;
+}
diff --git a/arch/arm/plat-omap/include/mach/display.h b/arch/arm/plat-omap/include/mach/display.h
new file mode 100644
-index 0000000..95f5b3a
+index 0000000..49ab00a
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/display.h
-@@ -0,0 +1,463 @@
+@@ -0,0 +1,462 @@
+/*
+ * linux/include/asm-arm/arch-omap/display.h
+ *
+ int data1_pol;
+ int data2_lane;
+ int data2_pol;
++ unsigned long ddr_clk_hz;
+ } dsi;
+
+ struct {
+ int level);
+};
+
++struct device;
++
+/* Board specific data */
+struct omap_dss_platform_data {
++ unsigned (*get_last_off_on_transaction_id)(struct device *dev);
+ int num_displays;
+ struct omap_display_data *displays[];
+};
+ int (*resume)(struct omap_display *display);
+ void (*setup_update)(struct omap_display *display,
+ int x, int y, int w, int h);
-+ void (*set_mode)(struct omap_display *display,
-+ int x_res, int y_res, int bpp);
+
+ int (*enable_te)(struct omap_display *display, int enable);
+
+
+ int (*run_test)(struct omap_display *display, int test);
+
-+ int bpp;
++ int pixel_size;
+
+ struct rfbi_timings timings;
+
+};
+
+struct omap_video_timings {
++ /* Unit: pixels */
++ u16 x_res;
++ /* Unit: pixels */
++ u16 y_res;
+ /* Unit: KHz */
+ u32 pixel_clock;
+ /* Unit: pixel clocks */
+ u16 vfp; /* Vertical front porch */
+ /* Unit: line clocks */
+ u16 vbp; /* Vertical back porch */
++
+};
+
+struct omap_panel {
+ void (*disable)(struct omap_display *display);
+ int (*suspend)(struct omap_display *display);
+ int (*resume)(struct omap_display *display);
-+ void (*set_mode)(struct omap_display *display,
-+ int x_res, int y_res, int bpp);
+ int (*run_test)(struct omap_display *display, int test);
+
+ struct omap_video_timings timings;
+
+ enum omap_panel_config config;
+
-+ int x_res, y_res;
+ int bpp;
+
+ void *priv;
+
+ struct omap_overlay_manager *manager;
+
-+ int x_res, y_res;
-+ int bpp;
-+
+ enum omap_dss_display_state state;
+
+ struct omap_display_data hw_config; /* board specific data */
+ int (*suspend)(struct omap_display *display);
+ int (*resume)(struct omap_display *display);
+
-+ void (*set_mode)(struct omap_display *display,
-+ int x_res, int y_res, int bpp);
+ int (*check_timings)(struct omap_display *display,
+ struct omap_video_timings *timings);
+ void (*set_timings)(struct omap_display *display,
-From a2bd3b5934be26656ba88ac1083cb76c9665822e Mon Sep 17 00:00:00 2001
+From 2167c1818af2d302d3934185b534ea4006c407c7 Mon Sep 17 00:00:00 2001
From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Tue, 4 Nov 2008 15:12:21 +0200
+Date: Wed, 7 Jan 2009 14:30:18 +0200
Subject: [PATCH] DSS: OMAPFB: fb driver for new display subsystem
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
---
arch/arm/plat-omap/Makefile | 2 +-
- arch/arm/plat-omap/fb-vram.c | 498 +++++++++++
- arch/arm/plat-omap/fb.c | 33 +-
+ arch/arm/plat-omap/fb-vram.c | 646 +++++++++++++
+ arch/arm/plat-omap/fb.c | 22 +
arch/arm/plat-omap/include/mach/omapfb.h | 14 +
drivers/video/Kconfig | 1 +
drivers/video/Makefile | 1 +
drivers/video/omap/Kconfig | 5 +-
- drivers/video/omap2/Kconfig | 38 +
+ drivers/video/omap2/Kconfig | 42 +
drivers/video/omap2/Makefile | 2 +
- drivers/video/omap2/omapfb-ioctl.c | 462 ++++++++++
- drivers/video/omap2/omapfb-main.c | 1382 ++++++++++++++++++++++++++++++
- drivers/video/omap2/omapfb-sysfs.c | 838 ++++++++++++++++++
- drivers/video/omap2/omapfb.h | 109 +++
- 13 files changed, 3377 insertions(+), 8 deletions(-)
+ drivers/video/omap2/omapfb-ioctl.c | 464 ++++++++++
+ drivers/video/omap2/omapfb-main.c | 1441 ++++++++++++++++++++++++++++++
+ drivers/video/omap2/omapfb-sysfs.c | 901 +++++++++++++++++++
+ drivers/video/omap2/omapfb.h | 115 +++
+ 13 files changed, 3653 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/plat-omap/fb-vram.c
create mode 100644 drivers/video/omap2/Kconfig
create mode 100644 drivers/video/omap2/Makefile
obj- :=
diff --git a/arch/arm/plat-omap/fb-vram.c b/arch/arm/plat-omap/fb-vram.c
new file mode 100644
-index 0000000..de24503
+index 0000000..2994f8f
--- /dev/null
+++ b/arch/arm/plat-omap/fb-vram.c
-@@ -0,0 +1,498 @@
+@@ -0,0 +1,646 @@
+/*
+ * linux/arch/arm/plat-omap/fb-vram.c
+ *
+#include <linux/dma-mapping.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
++#include <linux/bootmem.h>
+
++#include <asm/setup.h>
++
++#include <mach/sram.h>
+#include <mach/omapfb.h>
+
+#ifdef DEBUG
+#define REG_MAP_MASK(_page_nr) \
+ (1 << ((_page_nr) & (sizeof(unsigned long) * 8 - 1)))
+
-+#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) \
-+ || defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
++#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
+
+/* postponed regions are used to temporarily store region information at boot
+ * time when we cannot yet allocate the region list */
+ kfree(va);
+}
+
-+__init int omap_vram_add_region_postponed(unsigned long paddr, size_t size)
++static __init int omap_vram_add_region_postponed(unsigned long paddr, size_t size)
+{
+ if (postponed_cnt == MAX_POSTPONED_REGIONS)
+ return -ENOMEM;
+
+arch_initcall(omap_vram_init);
+
-+#endif
++/* boottime vram alloc stuff */
++static u32 omapfb_sram_vram_start __initdata;
++static u32 omapfb_sram_vram_size __initdata;
+
-diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
-index 3746222..da528d0 100644
---- a/arch/arm/plat-omap/fb.c
-+++ b/arch/arm/plat-omap/fb.c
-@@ -36,7 +36,11 @@
- #include <mach/sram.h>
- #include <mach/omapfb.h>
-
--#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
-+#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) \
-+ || defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
++static u32 omapfb_sdram_vram_start __initdata;
++static u32 omapfb_sdram_vram_size __initdata;
+
-+static int omapfb_vram_count;
-+static struct omap_fbmem_config *omapfb_vram_config;
-
- static struct omapfb_platform_data omapfb_config;
- static int config_invalid;
-@@ -95,11 +99,11 @@ static int get_fbmem_region(int region_idx, struct omapfb_mem_region *rg)
- const struct omap_fbmem_config *conf;
- u32 paddr;
-
-- conf = omap_get_nr_config(OMAP_TAG_FBMEM,
-- struct omap_fbmem_config, region_idx);
-- if (conf == NULL)
-+ if (region_idx >= omapfb_vram_count)
- return -ENOENT;
-
-+ conf = &omapfb_vram_config[region_idx];
-+
- paddr = conf->start;
- /*
- * Low bits encode the page allocation mode, if high bits
-@@ -209,6 +213,13 @@ void __init omapfb_reserve_sdram(void)
- if (rg.paddr) {
- reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT);
- reserved += rg.size;
-+ omap_vram_add_region_postponed(rg.paddr, rg.size);
++static u32 omapfb_def_sdram_vram_size __initdata;
++
++static void __init omapfb_early_vram(char **p)
++{
++ unsigned long size;
++ size = memparse(*p, p);
++ omapfb_def_sdram_vram_size = size;
++}
++__early_param("vram=", omapfb_early_vram);
++
++/*
++ * Called from map_io. We need to call to this early enough so that we
++ * can reserve the fixed SDRAM regions before VM could get hold of them.
++ */
++void __init omapfb_reserve_sdram(void)
++{
++ struct bootmem_data *bdata;
++ unsigned long sdram_start, sdram_size;
++ unsigned long reserved;
++ u32 paddr;
++ u32 size;
++
++ bdata = NODE_DATA(0)->bdata;
++ sdram_start = bdata->node_min_pfn << PAGE_SHIFT;
++ sdram_size = (bdata->node_low_pfn << PAGE_SHIFT) - sdram_start;
++ reserved = 0;
++
++ /* cmdline arg overrides the board file definition */
++ if (omapfb_def_sdram_vram_size) {
++ size = omapfb_def_sdram_vram_size;
++ paddr = 0;
++ } else {
++ size = omapfb_sdram_vram_size;
++ paddr = omapfb_sdram_vram_start;
++ }
++
++ if (size) {
++ if (paddr) {
++ if (paddr < sdram_start ||
++ paddr + size > sdram_start + sdram_size) {
++ printk(KERN_ERR "Illegal SDRAM region for VRAM\n");
++ return;
++ }
++
++ reserve_bootmem(paddr, size, BOOTMEM_DEFAULT);
+ } else {
-+ void *vaddr;
-+ vaddr = alloc_bootmem(rg.size);
-+ rg.paddr = virt_to_phys(vaddr);
-+ reserved += rg.size;
-+ omap_vram_add_region_postponed(rg.paddr, rg.size);
- }
- omapfb_config.mem_desc.region[i] = rg;
- configured_regions++;
-@@ -229,7 +240,7 @@ void __init omapfb_reserve_sdram(void)
- * this point, since the driver built as a module would have problem with
- * freeing / reallocating the regions.
- */
--unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
++ if (size > sdram_size) {
++ printk(KERN_ERR "Illegal SDRAM size for VRAM\n");
++ return;
++ }
++
++ paddr = virt_to_phys(alloc_bootmem(size));
++ }
++
++ reserved += size;
++ omap_vram_add_region_postponed(paddr, size);
++ }
++
++ if (reserved)
++ pr_info("Reserving %lu bytes SDRAM for VRAM\n", reserved);
++}
++
++/*
++ * Called at sram init time, before anything is pushed to the SRAM stack.
++ * Because of the stack scheme, we will allocate everything from the
++ * start of the lowest address region to the end of SRAM. This will also
++ * include padding for page alignment and possible holes between regions.
++ *
++ * As opposed to the SDRAM case, we'll also do any dynamic allocations at
++ * this point, since the driver built as a module would have problem with
++ * freeing / reallocating the regions.
++ */
+unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
- unsigned long sram_vstart,
- unsigned long sram_size,
- unsigned long pstart_avail,
-@@ -298,14 +309,24 @@ unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
- return reserved;
- }
-
-+void __init omapfb_set_vram_config(struct omap_fbmem_config *config, int count)
++ unsigned long sram_vstart,
++ unsigned long sram_size,
++ unsigned long pstart_avail,
++ unsigned long size_avail)
++{
++ unsigned long pend_avail;
++ unsigned long reserved;
++ u32 paddr;
++ u32 size;
++
++ paddr = omapfb_sram_vram_start;
++ size = omapfb_sram_vram_size;
++
++ reserved = 0;
++ pend_avail = pstart_avail + size_avail;
++
++
++ if (!paddr) {
++ /* Dynamic allocation */
++ if ((size_avail & PAGE_MASK) < size) {
++ printk(KERN_ERR "Not enough SRAM for VRAM\n");
++ return 0;
++ }
++ size_avail = (size_avail - size) & PAGE_MASK;
++ paddr = pstart_avail + size_avail;
++ }
++
++ if (paddr < sram_pstart ||
++ paddr + size > sram_pstart + sram_size) {
++ printk(KERN_ERR "Illegal SRAM region for VRAM\n");
++ return 0;
++ }
++
++ /* Reserve everything above the start of the region. */
++ if (pend_avail - paddr > reserved)
++ reserved = pend_avail - paddr;
++ size_avail = pend_avail - reserved - pstart_avail;
++
++ /*
++ * We have a kernel mapping for this already, so the
++ * driver won't have to make one.
++ */
++ /* XXX do we need the vaddr? */
++ /* rg.vaddr = (void *)(sram_vstart + paddr - sram_pstart); */
++
++ omap_vram_add_region_postponed(paddr, size);
++
++ if (reserved)
++ pr_info("Reserving %lu bytes SRAM for VRAM\n", reserved);
++
++ return reserved;
++}
++
++void __init omap2_set_sdram_vram(u32 size, u32 start)
+{
-+ omapfb_vram_count = count;
-+ omapfb_vram_config = config;
++ omapfb_sdram_vram_start = start;
++ omapfb_sdram_vram_size = size;
++}
++
++void __init omap2_set_sram_vram(u32 size, u32 start)
++{
++ omapfb_sram_vram_start = start;
++ omapfb_sram_vram_size = size;
+}
+
-+#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
- void omapfb_set_ctrl_platform_data(void *data)
- {
- omapfb_config.ctrl_platform_data = data;
- }
+#endif
++
+diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
+index 3746222..ee2cc6f 100644
+--- a/arch/arm/plat-omap/fb.c
++++ b/arch/arm/plat-omap/fb.c
+@@ -327,6 +327,28 @@ static inline int omap_init_fb(void)
- static inline int omap_init_fb(void)
- {
-+#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
- const struct omap_lcd_config *conf;
-+#endif
+ arch_initcall(omap_init_fb);
- if (config_invalid)
- return 0;
-@@ -313,6 +334,7 @@ static inline int omap_init_fb(void)
- printk(KERN_ERR "Invalid FB mem configuration entries\n");
- return 0;
- }
-+#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
- conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
- if (conf == NULL) {
- if (configured_regions)
-@@ -321,6 +343,7 @@ static inline int omap_init_fb(void)
- return 0;
- }
- omapfb_config.lcd = *conf;
-+#endif
++#elif defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
++
++static u64 omap_fb_dma_mask = ~(u32)0;
++
++static struct platform_device omap_fb_device = {
++ .name = "omapfb",
++ .id = -1,
++ .dev = {
++ .dma_mask = &omap_fb_dma_mask,
++ .coherent_dma_mask = ~(u32)0,
++ .platform_data = NULL,
++ },
++ .num_resources = 0,
++};
++
++static inline int omap_init_fb(void)
++{
++ return platform_device_register(&omap_fb_device);
++}
++
++arch_initcall(omap_init_fb);
++
+ #else
- return platform_device_register(&omap_fb_device);
- }
+ void omapfb_reserve_sdram(void) {}
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h
-index 90d63c5..277e3cf 100644
+index b226bdf..0800f92 100644
--- a/arch/arm/plat-omap/include/mach/omapfb.h
+++ b/arch/arm/plat-omap/include/mach/omapfb.h
@@ -90,6 +90,13 @@ enum omapfb_color_format {
};
struct omapfb_update_window {
-@@ -392,6 +399,13 @@ extern int omapfb_update_window_async(struct fb_info *fbi,
-
+@@ -393,6 +400,13 @@ extern int omapfb_update_window_async(struct fb_info *fbi,
/* in arch/arm/plat-omap/fb.c */
extern void omapfb_set_ctrl_platform_data(void *pdata);
-+extern void omapfb_set_vram_config(struct omap_fbmem_config *config, int count);
-+
+
+/* in arch/arm/plat-omap/fb-vram */
-+__init int omap_vram_add_region_postponed(unsigned long paddr, size_t size);
+int omap_vram_free(unsigned long paddr, void *vaddr, size_t size);
+void *omap_vram_reserve(unsigned long paddr, size_t size);
+void *omap_vram_alloc(int mtype, size_t size, unsigned long *paddr);
-
++extern void omap2_set_sdram_vram(u32 size, u32 start);
++extern void omap2_set_sram_vram(u32 size, u32 start);
++
#endif /* __KERNEL__ */
+ #endif /* __OMAPFB_H */
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3f3ce13..689a3b1 100644
--- a/drivers/video/Kconfig
help
diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig
new file mode 100644
-index 0000000..bfa1617
+index 0000000..8be51a3
--- /dev/null
+++ b/drivers/video/omap2/Kconfig
-@@ -0,0 +1,38 @@
+@@ -0,0 +1,42 @@
+config FB_OMAP2
+ tristate "OMAP2/3 frame buffer support (EXPERIMENTAL)"
+ depends on FB && OMAP2_DSS
+ Frame buffer driver for OMAP2/3 based boards.
+
+config FB_OMAP2_DEBUG
-+ bool "Debug output for OMAP2/3 FB"
++ bool "Debug support for OMAP2/3 FB"
++ default y
+ depends on FB_OMAP2
++ help
++ Support for debug output. You have to enable the actual printing
++ with debug module parameter.
+
+config FB_OMAP2_FORCE_AUTO_UPDATE
+ bool "Force main display to automatic update mode"
+omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o
diff --git a/drivers/video/omap2/omapfb-ioctl.c b/drivers/video/omap2/omapfb-ioctl.c
new file mode 100644
-index 0000000..6bf750f
+index 0000000..1f0f044
--- /dev/null
+++ b/drivers/video/omap2/omapfb-ioctl.c
-@@ -0,0 +1,462 @@
+@@ -0,0 +1,464 @@
+/*
+ * linux/drivers/video/omap2/omapfb-ioctl.c
+ *
+
+ if (display->update)
+ display->update(display, 0, 0,
-+ display->x_res, display->y_res);
++ display->panel->timings.x_res,
++ display->panel->timings.y_res);
+ }
+
+out:
+ if (w == 0 || h == 0)
+ return 0;
+
-+ if (x + w > display->x_res || y + h > display->y_res)
++ if (x + w > display->panel->timings.x_res ||
++ y + h > display->panel->timings.y_res)
+ return -EINVAL;
+
+ omapfb_lock(fbdev);
+
diff --git a/drivers/video/omap2/omapfb-main.c b/drivers/video/omap2/omapfb-main.c
new file mode 100644
-index 0000000..89ad631
+index 0000000..76bd416
--- /dev/null
+++ b/drivers/video/omap2/omapfb-main.c
-@@ -0,0 +1,1382 @@
+@@ -0,0 +1,1441 @@
+/*
+ * linux/drivers/video/omap2/omapfb-main.c
+ *
+
+#define MODULE_NAME "omapfb"
+
++static char *def_mode;
++static char *def_vram;
++
++#ifdef DEBUG
++unsigned int omapfb_debug;
++module_param_named(debug, omapfb_debug, bool, 0644);
++#endif
++
+#ifdef DEBUG
+static void fill_fb(void *addr, struct fb_info *fbi)
+{
+ } else if (var->bits_per_pixel == 32) {
+ u32 *pd = (u32 *)p;
+
-+ if (x == 20 || x == w - 20 ||
++ if (x < 20 && y < 20)
++ *pd = 0xffffff;
++ else if (x == 20 || x == w - 20 ||
+ y == 20 || y == h - 20)
+ *pd = 0xffffff;
+ else if (x == y || w - x == h - y)
+ }
+
+ xres_min = OMAPFB_PLANE_XRES_MIN;
-+ xres_max = (display ? display->x_res : 2048) - ovl->info.pos_x;
++ xres_max = (display ? display->panel->timings.x_res : 2048) - ovl->info.pos_x;
+ yres_min = OMAPFB_PLANE_YRES_MIN;
-+ yres_max = (display ? display->y_res : 2048) - ovl->info.pos_y;
++ yres_max = (display ? display->panel->timings.y_res : 2048) - ovl->info.pos_y;
+
+ if (var->xres < xres_min)
+ var->xres = xres_min;
+ var->width = -1;
+ var->grayscale = 0;
+
-+ if (display && display->check_timings) {
++ if (display && display->get_timings) {
+ struct omap_video_timings timings;
-+
-+ if (var->pixclock == 0) {
-+ DBG("Pixclock can't be zero.\n");
-+ return -EINVAL;
-+ }
-+
-+ timings.pixel_clock = PICOS2KHZ(var->pixclock);
-+ timings.hfp = var->left_margin;
-+ timings.hbp = var->right_margin;
-+ timings.vfp = var->upper_margin;
-+ timings.vbp = var->lower_margin;
-+ timings.hsw = var->hsync_len;
-+ timings.vsw = var->vsync_len;
-+
-+ if (display->check_timings(display, &timings)) {
-+ DBG("illegal video timings\n");
-+ return -EINVAL;
-+ }
++ display->get_timings(display, &timings);
+
+ /* pixclock in ps, the rest in pixclock */
-+ var->pixclock = KHZ2PICOS(timings.pixel_clock);
-+ var->left_margin = timings.hfp;
-+ var->right_margin = timings.hbp;
-+ var->upper_margin = timings.vfp;
-+ var->lower_margin = timings.vbp;
-+ var->hsync_len = timings.hsw;
-+ var->vsync_len = timings.vsw;
++ var->pixclock = timings.pixel_clock != 0 ?
++ KHZ2PICOS(timings.pixel_clock) :
++ 0;
++ var->left_margin = timings.hfp;
++ var->right_margin = timings.hbp;
++ var->upper_margin = timings.vfp;
++ var->lower_margin = timings.vbp;
++ var->hsync_len = timings.hsw;
++ var->vsync_len = timings.vsw;
++ } else {
++ var->pixclock = 0;
++ var->left_margin = 0;
++ var->right_margin = 0;
++ var->upper_margin = 0;
++ var->lower_margin = 0;
++ var->hsync_len = 0;
++ var->vsync_len = 0;
+ }
+
+ /* TODO: get these from panel->config */
+ if (display->update)
+ display->update(display,
+ 0, 0,
-+ display->x_res, display->y_res);
++ display->panel->timings.x_res,
++ display->panel->timings.y_res);
+ }
+#endif
+
+ int r = 0;
+ struct omapfb_info *ofbi = FB2OFB(fbi);
+ struct fb_var_screeninfo *var = &fbi->var;
-+ /*struct omap_display *display = fb2display(fbi);*/
+ struct omap_overlay *ovl;
+ int posx, posy;
+ int outw, outh;
+ if (r)
+ goto err;
+
-+ /* disabled for now. if the display has changed, var
-+ * still contains the old timings. */
-+#if 0
-+ if (display && display->set_timings) {
-+ struct omap_video_timings timings;
-+ timings.pixel_clock = PICOS2KHZ(var->pixclock);
-+ timings.hfp = var->left_margin;
-+ timings.hbp = var->right_margin;
-+ timings.vfp = var->upper_margin;
-+ timings.vbp = var->lower_margin;
-+ timings.hsw = var->hsync_len;
-+ timings.vsw = var->vsync_len;
-+
-+ display->set_timings(display, &timings);
-+ }
-+#endif
+ if (!init && ovl->manager)
+ ovl->manager->apply(ovl->manager);
+ }
+ if (r == 0 && do_update && display->update)
+ r = display->update(display,
+ 0, 0,
-+ display->x_res, display->y_res);
++ display->panel->timings.x_res,
++ display->panel->timings.y_res);
+
+ return r;
+}
+
+ if (rg->paddr)
+ if (omap_vram_free(rg->paddr, rg->vaddr, rg->size))
-+ printk("VRAM FREE failed\n");
++ dev_err(fbdev->dev, "VRAM FREE failed\n");
+
+ rg->vaddr = NULL;
+ rg->paddr = 0;
+ unsigned long paddr;
+ void *vaddr;
+
++ size = PAGE_ALIGN(size);
++
+ ofbi = FB2OFB(fbdev->fbs[fbnum]);
+ rg = &ofbi->region;
+ memset(rg, 0, sizeof(*rg));
+ size, ofbi->id);
+
+ vaddr = omap_vram_alloc(OMAPFB_MEMTYPE_SDRAM, size, &paddr);
-+ DBG("VRAM ALLOCCI paddr %lx, vaddr %p\n", paddr, vaddr);
++ DBG("allocated VRAM paddr %lx, vaddr %p\n", paddr, vaddr);
+
+ if (vaddr == NULL) {
+ dev_err(fbdev->dev,
+ unsigned old_size = rg->size;
+ int r;
+
++ size = PAGE_ALIGN(size);
++
+ omapfb_free_fbmem(fbdev, fbnum);
+
+ if (size == 0)
+}
+
+/* allocate fbmem using display resolution as reference */
-+static int omapfb_alloc_fbmem_display(struct omapfb2_device *fbdev, int fbnum)
++static int omapfb_alloc_fbmem_display(struct omapfb2_device *fbdev, int fbnum,
++ unsigned long def_vram)
+{
+ struct omapfb_info *ofbi;
+ struct omap_display *display;
+ if (!display)
+ return 0;
+
-+ switch (display->bpp) {
++ switch (display->panel->bpp) {
+ case 16:
+ bytespp = 2;
+ break;
+ break;
+ }
+
-+ size = display->x_res * display->y_res * bytespp;
++ size = display->panel->timings.x_res * display->panel->timings.y_res *
++ bytespp;
++
++ if (def_vram > size)
++ size = def_vram;
+
+ return omapfb_alloc_fbmem(fbdev, fbnum, size);
+}
+static int omapfb_allocate_all_fbs(struct omapfb2_device *fbdev)
+{
+ int i, r;
++ unsigned long vrams[10];
++
++ memset(vrams, 0, sizeof(vrams));
++
++ if (def_vram) {
++ char *p = def_vram;
++ i = 0;
++
++ while (true) {
++ unsigned long size;
++
++ size = memparse(p, &p);
++
++ if (size == 0) {
++ dev_err(fbdev->dev, "illegal vram size\n");
++ break;
++ }
++
++ vrams[i++] = size;
++
++ if (*p != ',')
++ break;
++
++ p++;
++ }
++ }
+
+ for (i = 0; i < fbdev->num_fbs; i++) {
-+ r = omapfb_alloc_fbmem_display(fbdev, i);
++ r = omapfb_alloc_fbmem_display(fbdev, i, vrams[i]);
+
+ if (r)
+ return r;
+ var->nonstd = 0;
+
+ if (display) {
-+ var->xres = display->x_res;
-+ var->yres = display->y_res;
++ var->xres = display->panel->timings.x_res;
++ var->yres = display->panel->timings.y_res;
+ var->xres_virtual = var->xres;
+ var->yres_virtual = var->yres;
+ /* var->rotate = def_rotate; */
+
-+ switch (display->bpp) {
++ switch (display->panel->bpp) {
+ case 16:
+ var->bits_per_pixel = 16;
+ break;
+ dev_err(fbdev->dev, "illegal display bpp\n");
+ return -EINVAL;
+ }
-+
-+ if (display->get_timings) {
-+ struct omap_video_timings timings;
-+ display->get_timings(display, &timings);
-+
-+ /* pixclock in ps, the rest in pixclock */
-+ var->pixclock = KHZ2PICOS(timings.pixel_clock);
-+ var->left_margin = timings.hfp;
-+ var->right_margin = timings.hbp;
-+ var->upper_margin = timings.vfp;
-+ var->lower_margin = timings.vbp;
-+ var->hsync_len = timings.hsw;
-+ var->vsync_len = timings.vsw;
-+ } else {
-+ var->pixclock = 0;
-+ var->left_margin = 0;
-+ var->right_margin = 0;
-+ var->upper_margin = 0;
-+ var->lower_margin = 0;
-+ var->hsync_len = 0;
-+ var->vsync_len = 0;
-+ }
+ }
+
+ r = check_fb_var(fbi, var);
+ set_fb_fix(fbi);
+
+#ifdef DEBUG
-+ fill_fb(FB2OFB(fbi)->region.vaddr, fbi);
++ if (omapfb_debug)
++ fill_fb(FB2OFB(fbi)->region.vaddr, fbi);
+#endif
+err:
+ return r;
+ return 0;
+}
+
++int omapfb_mode_to_timings(const char *mode_str,
++ struct omap_video_timings *timings, unsigned *bpp)
++{
++ struct fb_info fbi;
++ struct fb_var_screeninfo var;
++ struct fb_ops fbops;
++ int r;
++
++ /* this is quite a hack, but I wanted to use the modedb and for
++ * that we need fb_info and var, so we create dummy ones */
++
++ memset(&fbi, 0, sizeof(fbi));
++ memset(&var, 0, sizeof(var));
++ memset(&fbops, 0, sizeof(fbops));
++ fbi.fbops = &fbops;
++
++ r = fb_find_mode(&var, &fbi, mode_str, NULL, 0, NULL, 24);
++
++ if (r != 0) {
++ timings->pixel_clock = PICOS2KHZ(var.pixclock);
++ timings->hfp = var.left_margin;
++ timings->hbp = var.right_margin;
++ timings->vfp = var.upper_margin;
++ timings->vbp = var.lower_margin;
++ timings->hsw = var.hsync_len;
++ timings->vsw = var.vsync_len;
++ timings->x_res = var.xres;
++ timings->y_res = var.yres;
++
++ switch (var.bits_per_pixel) {
++ case 16:
++ *bpp = 16;
++ break;
++ case 24:
++ case 32:
++ default:
++ *bpp = 24;
++ break;
++ }
++
++ return 0;
++ } else {
++ return -EINVAL;
++ }
++}
++
+static int omapfb_probe(struct platform_device *pdev)
+{
+ struct omapfb2_device *fbdev = NULL;
+ goto err0;
+ }
+
-+ if (pdev->dev.platform_data == NULL) {
-+ dev_err(&pdev->dev, "missing platform data\n");
-+ r = -ENOENT;
-+ goto err0;
-+ }
-+
+ fbdev = kzalloc(sizeof(struct omapfb2_device), GFP_KERNEL);
+ if (fbdev == NULL) {
+ r = -ENOMEM;
+ goto cleanup;
+ }
+
++ if (def_mode && strlen(def_mode) > 0)
++ {
++ struct omap_video_timings timings;
++ unsigned bpp;
++
++ if (omapfb_mode_to_timings(def_mode, &timings, &bpp) == 0) {
++ if (def_display->set_timings)
++ def_display->set_timings(def_display, &timings);
++
++ def_display->panel->bpp = bpp;
++ }
++ }
++
+ r = omapfb_create_framebuffers(fbdev);
+ if (r)
+ goto cleanup;
+ if (display->update)
+ display->update(display,
+ 0, 0,
-+ display->x_res, display->y_res);
++ display->panel->timings.x_res,
++ display->panel->timings.y_res);
+ }
+
+ DBG("display->updated\n");
+ platform_driver_unregister(&omapfb_driver);
+}
+
++module_param_named(video_mode, def_mode, charp, 0);
++module_param_named(vram, def_vram, charp, 0);
++
+/* late_initcall to let panel/ctrl drivers loaded first.
+ * I guess better option would be a more dynamic approach,
+ * so that omapfb reacts to new panels when they are loaded */
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/video/omap2/omapfb-sysfs.c b/drivers/video/omap2/omapfb-sysfs.c
new file mode 100644
-index 0000000..59b48ac
+index 0000000..4383e44
--- /dev/null
+++ b/drivers/video/omap2/omapfb-sysfs.c
-@@ -0,0 +1,838 @@
+@@ -0,0 +1,901 @@
+/*
+ * linux/drivers/video/omap2/omapfb-sysfs.c
+ *
+#include <linux/device.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
++#include <linux/kernel.h>
+
+#include <mach/display.h>
+#include <mach/omapfb.h>
+ if (mgr && mgr->display && mgr->display->update)
+ mgr->display->update(mgr->display,
+ 0, 0,
-+ mgr->display->x_res, mgr->display->y_res);
++ mgr->display->panel->timings.x_res,
++ mgr->display->panel->timings.y_res);
+
+ omapfb_unlock(fbdev);
+ return count;
+ struct omapfb2_device *fbdev = platform_get_drvdata(pdev);
+ ssize_t l = 0, size = PAGE_SIZE;
+ int i;
++ struct omap_video_timings timings;
+
+ omapfb_lock(fbdev);
+
+ if (display->get_te)
+ te = display->get_te(display);
+
++ if (display->get_timings)
++ display->get_timings(display, &timings);
++ else
++ memset(&timings, 0, sizeof(timings));
++
+ l += snprintf(buf + l, size - l,
-+ "%s w:%d h:%d e:%d u:%d t:%d\n",
++ "%s e:%d u:%d t:%d h:%u/%u/%u/%u "
++ "v:%u/%u/%u/%u p:%u\n",
+ display->name,
-+ display->x_res,
-+ display->y_res,
+ display->state != OMAP_DSS_DISPLAY_DISABLED,
-+ mode, te);
++ mode, te,
++ timings.x_res,
++ timings.hfp, timings.hbp, timings.hsw,
++ timings.y_res,
++ timings.vfp, timings.vbp, timings.vsw,
++ timings.pixel_clock);
+ }
+
+ omapfb_unlock(fbdev);
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct omapfb2_device *fbdev = platform_get_drvdata(pdev);
-+ int idx;
-+ int enable, width, height;
++ int enable;
++ struct omap_video_timings old_timings;
++ struct omap_video_timings new_timings;
+ enum omap_dss_update_mode mode;
+ struct omap_display *display = NULL;
+ int r;
-+ char displayname[10];
+ int te;
++ char str[128];
++ char *s, *tok;
+
-+ idx = 0;
-+ while (idx < count && buf[idx] != ' ')
-+ ++idx;
-+
-+ if (idx == count)
++ if (strlen(buf) > sizeof(str) - 1)
+ return -EINVAL;
+
-+ if (idx >= sizeof(displayname))
-+ return -EINVAL;
++ strcpy(str, buf);
+
-+ strncpy(displayname, buf, idx);
-+ displayname[idx] = 0;
-+ idx++;
++ /* remove trailing linefeeds */
++ s = str + strlen(str) - 1;
++ while (s >= str && *s == '\n') {
++ *s = 0;
++ s--;
++ }
++
++ s = str;
++
++ if ((tok = strsep(&s, " ")) == 0)
++ return -EINVAL;
+
+ omapfb_lock(fbdev);
+
-+ display = find_display_by_name(fbdev, displayname);
++ display = find_display_by_name(fbdev, tok);
+
+ if (!display) {
+ dev_err(dev, "display not found\n");
+ goto err;
+ }
+
-+ width = display->x_res;
-+ height = display->y_res;
+ enable = display->state != OMAP_DSS_DISPLAY_DISABLED;
+ if (display->get_update_mode)
+ mode = display->get_update_mode(display);
+ else
+ te = 0;
+
-+ while (idx < count) {
-+ char c;
-+ int val;
-+ int len;
++ if (display->get_timings)
++ display->get_timings(display, &old_timings);
++ else
++ memset(&old_timings, 0, sizeof(old_timings));
+
-+ r = sscanf(buf + idx, "%c:%d%n", &c, &val, &len);
++ memcpy(&new_timings, &old_timings, sizeof(new_timings));
+
-+ if (r != 2) {
-+ dev_err(dev, "sscanf failed, aborting\n");
++ while ((tok = strsep(&s, " "))) {
++ char c, *o;
++
++ if (strlen(tok) < 3 || tok[1] != ':') {
++ dev_err(dev, "illegal option\n");
+ r = -EINVAL;
+ goto err;
+ }
+
++ c = tok[0];
++ o = tok + 2;
++
+ switch (c) {
-+ case 'w':
-+ width = val;
++ case 'e':
++ enable = simple_strtoul(o, NULL, 0);
+ break;
+
-+ case 'h':
-+ height = val;
++ case 'u':
++ mode = simple_strtoul(o, NULL, 0);
+ break;
+
-+ case 'e':
-+ enable = val;
++ case 't':
++ te = simple_strtoul(o, NULL, 0);
+ break;
+
-+ case 'u':
-+ mode = val;
++ case 'm': {
++ unsigned bpp;
++ if (omapfb_mode_to_timings(o, &new_timings, &bpp) != 0)
++ memset(&new_timings, 0, sizeof(new_timings));
++
+ break;
++ }
+
-+ case 't':
-+ te = val;
++ case 'h': {
++ unsigned xres, hfp, hbp, hsw;
++
++ if (sscanf(o, "%u/%u/%u/%u",
++ &xres, &hfp, &hbp, &hsw) != 4) {
++ dev_err(dev, "illegal horizontal timings\n");
++ r = -EINVAL;
++ goto err;
++ }
++
++ new_timings.x_res = xres;
++ new_timings.hfp = hfp;
++ new_timings.hbp = hbp;
++ new_timings.hsw = hsw;
++ break;
++ }
++
++ case 'v': {
++ unsigned yres, vfp, vbp, vsw;
++
++ if (sscanf(o, "%u/%u/%u/%u",
++ &yres, &vfp, &vbp, &vsw) != 4) {
++ dev_err(dev, "illegal vertical timings\n");
++ r = -EINVAL;
++ goto err;
++ }
++
++ new_timings.y_res = yres;
++ new_timings.vfp = vfp;
++ new_timings.vbp = vbp;
++ new_timings.vsw = vsw;
++ break;
++ }
++
++ case 'p':
++ new_timings.pixel_clock = simple_strtoul(o, NULL, 0);
+ break;
+
+ default:
+ r = -EINVAL;
+ goto err;
+ }
++ }
+
-+ idx += len + 1;
++ if (memcmp(&new_timings, &old_timings, sizeof(new_timings)) != 0) {
++ if (display->set_timings)
++ display->set_timings(display, &new_timings);
++
++ /* sigh, bpp is not a setting of the display, but
++ * the overlay. */
++ //def_display->panel->bpp = bpp;
+ }
+
-+ /* XXX: setmode */
+ if (enable != (display->state != OMAP_DSS_DISPLAY_DISABLED)) {
+ if (enable) {
+ r = display->enable(display);
+ display->enable_te(display, te);
+ }
+
-+ omapfb_unlock(fbdev);
-+ return count;
-+
++ r = count;
+err:
+ omapfb_unlock(fbdev);
+ return r;
+
diff --git a/drivers/video/omap2/omapfb.h b/drivers/video/omap2/omapfb.h
new file mode 100644
-index 0000000..60352da
+index 0000000..9ba4f1b
--- /dev/null
+++ b/drivers/video/omap2/omapfb.h
-@@ -0,0 +1,109 @@
+@@ -0,0 +1,115 @@
+/*
+ * linux/drivers/video/omap2/omapfb.h
+ *
+#endif
+
+#ifdef DEBUG
-+#define DBG(format, ...) printk(KERN_DEBUG "OMAPFB: " format, ## __VA_ARGS__)
++extern unsigned int omapfb_debug;
++#define DBG(format, ...) \
++ if (omapfb_debug) \
++ printk(KERN_DEBUG "OMAPFB: " format, ## __VA_ARGS__)
+#else
+#define DBG(format, ...)
+#endif
+
+int omapfb_ioctl(struct fb_info *fbi, unsigned int cmd, unsigned long arg);
+
++int omapfb_mode_to_timings(const char *mode_str,
++ struct omap_video_timings *timings, unsigned *bpp);
++
+/* find the display connected to this fb, if any */
+static inline struct omap_display *fb2display(struct fb_info *fbi)
+{
--- /dev/null
+From e9f476d658fb5c7de57498d54c0acd6429439350 Mon Sep 17 00:00:00 2001
+From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
+Date: Mon, 5 Jan 2009 15:06:40 +0200
+Subject: [PATCH] DSS: Add generic DVI panel
+
+You also need DSI PLL to generate pix clock for 1280x1024.
+
+Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
+---
+ drivers/video/omap2/Kconfig | 5 ++
+ drivers/video/omap2/Makefile | 2 +
+ drivers/video/omap2/panel-generic.c | 97 +++++++++++++++++++++++++++++++++++
+ 3 files changed, 104 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/video/omap2/panel-generic.c
+
+diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig
+index 8be51a3..be00882 100644
+--- a/drivers/video/omap2/Kconfig
++++ b/drivers/video/omap2/Kconfig
+@@ -37,6 +37,11 @@ config FB_OMAP2_NUM_FBS
+ menu "OMAP2/3 Display Device Drivers"
+ depends on OMAP2_DSS
+
++config PANEL_GENERIC
++ tristate "Generic Panel"
++ help
++ Generic panel driver.
++ Used for DVI output for Beagle and OMAP3 SDP.
+
+ endmenu
+
+diff --git a/drivers/video/omap2/Makefile b/drivers/video/omap2/Makefile
+index 51c2e00..f471a2b 100644
+--- a/drivers/video/omap2/Makefile
++++ b/drivers/video/omap2/Makefile
+@@ -1,2 +1,4 @@
+ obj-$(CONFIG_FB_OMAP2) += omapfb.o
+ omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o
++
++obj-$(CONFIG_PANEL_GENERIC) += panel-generic.o
+diff --git a/drivers/video/omap2/panel-generic.c b/drivers/video/omap2/panel-generic.c
+new file mode 100644
+index 0000000..5c8fecd
+--- /dev/null
++++ b/drivers/video/omap2/panel-generic.c
+@@ -0,0 +1,97 @@
++/*
++ * Generic panel support
++ *
++ * Copyright (C) 2008 Nokia Corporation
++ * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program. If not, see <http://www.gnu.org/licenses/>.
++ */
++
++#include <linux/module.h>
++#include <linux/delay.h>
++
++#include <mach/display.h>
++
++static int generic_panel_init(struct omap_display *display)
++{
++ return 0;
++}
++
++static int generic_panel_enable(struct omap_display *display)
++{
++ int r = 0;
++
++ if (display->hw_config.panel_enable)
++ r = display->hw_config.panel_enable(display);
++
++ return r;
++}
++
++static void generic_panel_disable(struct omap_display *display)
++{
++ if (display->hw_config.panel_disable)
++ display->hw_config.panel_disable(display);
++}
++
++static int generic_panel_suspend(struct omap_display *display)
++{
++ generic_panel_disable(display);
++ return 0;
++}
++
++static int generic_panel_resume(struct omap_display *display)
++{
++ return generic_panel_enable(display);
++}
++
++static struct omap_panel generic_panel = {
++ .owner = THIS_MODULE,
++ .name = "panel-generic",
++ .init = generic_panel_init,
++ .enable = generic_panel_enable,
++ .disable = generic_panel_disable,
++ .suspend = generic_panel_suspend,
++ .resume = generic_panel_resume,
++
++ .timings = {
++ /* 640 x 480 @ 60 Hz Reduced blanking VESA CVT 0.31M3-R */
++ .x_res = 640,
++ .y_res = 480,
++ .pixel_clock = 23500,
++ .hfp = 48,
++ .hsw = 32,
++ .hbp = 80,
++ .vfp = 3,
++ .vsw = 4,
++ .vbp = 7,
++ },
++
++ .bpp = 24,
++ .config = OMAP_DSS_LCD_TFT,
++};
++
++
++static int __init generic_panel_drv_init(void)
++{
++ omap_dss_register_panel(&generic_panel);
++ return 0;
++}
++
++static void __exit generic_panel_drv_exit(void)
++{
++ omap_dss_unregister_panel(&generic_panel);
++}
++
++module_init(generic_panel_drv_init);
++module_exit(generic_panel_drv_exit);
++MODULE_LICENSE("GPL");
+--
+1.5.6.3
+
+++ /dev/null
-From 66fad2b53d3427962407b40af79e227635aed780 Mon Sep 17 00:00:00 2001
-From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Tue, 4 Nov 2008 15:08:07 +0200
-Subject: [PATCH] DSS: Documentation for OMAP2/3 display subsystem
-
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
----
- Documentation/arm/OMAP/DSS | 239 ++++++++++++++++++++++++++++++++++++++++++++
- 1 files changed, 239 insertions(+), 0 deletions(-)
- create mode 100644 Documentation/arm/OMAP/DSS
-
-diff --git a/Documentation/arm/OMAP/DSS b/Documentation/arm/OMAP/DSS
-new file mode 100644
-index 0000000..387bb73
---- /dev/null
-+++ b/Documentation/arm/OMAP/DSS
-@@ -0,0 +1,239 @@
-+OMAP2/3 Display Subsystem
-+-------------------------
-+
-+This is an almost total rewrite of the OMAP FB driver in drivers/video/omap
-+(let's call it DSS1). The main differences between DSS1 and DSS2 are DSI,
-+TV-out and multiple display support.
-+
-+The DSS2 driver (omap-dss module) is in arch/arm/plat-omap/dss/, and the FB,
-+panel and controller drivers are in drivers/video/omap2/. DSS1 and DSS2 live
-+currently side by side, you can choose which one to use.
-+
-+Features
-+--------
-+
-+Working and tested features include:
-+
-+- MIPI DPI (parallel) output
-+- MIPI DSI output in command mode
-+- MIPI DBI (RFBI) output (not tested for a while, might've gotten broken)
-+- SDI output
-+- TV output
-+- All pieces can be compiled as a module or inside kernel
-+- Use DISPC to update any of the outputs
-+- Use CPU to update RFBI or DSI output
-+- OMAP DISPC planes
-+- RGB16, RGB24 packed, RGB24 unpacked
-+- YUV2, UYVY
-+- Scaling
-+- Adjusting DSS FCK to find a good pixel clock
-+- Use DSI DPLL to create DSS FCK
-+
-+omap-dss driver
-+------------
-+
-+The DSS driver does not itself have any support for Linux framebuffer, V4L or
-+such like the current ones, but it has an internal kernel API that upper level
-+drivers can use.
-+
-+The DSS driver models OMAP's overlays, overlay managers and displays in a
-+flexible way to enable non-common multi-display configuration. In addition to
-+modelling the hardware overlays, omap-dss supports virtual overlays and overlay
-+managers. These can be used when updating a display with CPU or system DMA.
-+
-+Panel and controller drivers
-+----------------------------
-+
-+The drivers implement panel or controller specific functionality and are not
-+visible to users except through omapfb driver. They register themselves to the
-+DSS driver.
-+
-+omapfb driver
-+-------------
-+
-+The omapfb driver implements arbitrary number of standard linux framebuffers.
-+These framebuffers can be routed flexibly to any overlays, thus allowing very
-+dynamic display architecture.
-+
-+The driver exports some omapfb specific ioctls, which are compatible with the
-+ioctls in the old driver.
-+
-+The rest of the non standard features are exported via sysfs. Whether the final
-+implementation will use sysfs, or ioctls, is still open.
-+
-+V4L2 drivers
-+------------
-+
-+Currently there are no V4L2 display drivers planned, but it is possible to
-+implement such either to omapfb driver, or as a separate one. From omap-dss
-+point of view the V4L2 drivers should be similar to framebuffer driver.
-+
-+Architecture
-+--------------------
-+
-+Some clarification what the different components do:
-+
-+ - Framebuffer is a memory area inside OMAP's SDRAM that contains the pixel
-+ data for the image. Framebuffer has width and height and color depth.
-+ - Overlay defines where the pixels are read from and where they go on the
-+ screen. The overlay may be smaller than framebuffer, thus displaying only
-+ part of the framebuffer. The position of the overlay may be changed if
-+ the overlay is smaller than the display.
-+ - Overlay manager combines the overlays in to one image and feeds them to
-+ display.
-+ - Display is the actual physical display device.
-+
-+A framebuffer can be connected to multiple overlays to show the same pixel data
-+on all of the overlays. Note that in this case the overlay input sizes must be
-+the same, but, in case of video overlays, the output size can be different. Any
-+framebuffer can be connected to any overlay.
-+
-+An overlay can be connected to one overlay manager. Also DISPC overlays can be
-+connected only to DISPC overlay managers, and virtual overlays can be only
-+connected to virtual overlays.
-+
-+An overlay manager can be connected to one display. There are certain
-+restrictions which kinds of displays an overlay manager can be connected:
-+
-+ - DISPC TV overlay manager can be only connected to TV display.
-+ - Virtual overlay managers can only be connected to DBI or DSI displays.
-+ - DISPC LCD overlay manager can be connected to all displays, except TV
-+ display.
-+
-+Sysfs
-+-----
-+The sysfs interface is a hack, but works for testing. I don't think sysfs
-+interface is the best for this in the final version, but I don't quite know
-+what would be the best interfaces for these things.
-+
-+In /sys/devices/platform/omapfb we have four files: framebuffers,
-+overlays, managers and displays. You can read them so see the current
-+setup, and change them by writing to it in the form of
-+"<item-id> <opt1>:<val1> <opt2>:<val2>..."
-+
-+"framebuffers" lists all framebuffers. Its format is:
-+ <fb number>
-+ t:<target overlay>
-+
-+"overlays" lists all overlays. Its format is:
-+ <overlay name>
-+ t:<target manager>
-+ x:<xpos>
-+ y:<ypos>
-+ iw:<input width, read only>
-+ ih:<input height, read only>
-+ w:<output width>
-+ h:<output height>
-+ e:<enabled>
-+
-+"managers" lists all overlay managers. Its format is:
-+ <manager name>
-+ t:<target display>
-+
-+"displays" lists all displays. Its format is:
-+ <display name>
-+ w:<width>
-+ h:<height>
-+ e:<enabled>
-+ u:<update mode>
-+ t:<tear sync on/off>
-+
-+There is also a debug sysfs file at /sys/devices/platform/omap-dss/clk which
-+shows how DSS has configured the clocks.
-+
-+Examples
-+--------
-+
-+In the example scripts "omapfb" is a symlink to /sys/devices/platform/omapfb/.
-+
-+Default setup on OMAP3 SDP
-+--------------------------
-+
-+Here's the default setup on OMAP3 SDP board. All planes go to LCD. DVI
-+and TV-out are not in use. The columns from left to right are:
-+framebuffers, overlays, overlay managers, displays. Framebuffers are
-+handled by omapfb, and the rest by the DSS.
-+
-+FB0 --- GFX -\ DVI
-+FB1 --- VID1 --+- LCD ---- LCD
-+FB2 --- VID2 -/ TV ----- TV
-+
-+Switch from LCD to DVI
-+----------------------
-+
-+dviline=`cat omapfb/displays |grep dvi`
-+w=`echo $dviline | cut -d " " -f 2 | cut -d ":" -f 2`
-+h=`echo $dviline | cut -d " " -f 3 | cut -d ":" -f 2`
-+
-+echo "lcd e:0" > omapfb/displays
-+echo "lcd t:none" > omapfb/managers
-+fbset -fb /dev/fb0 -xres $w -yres $h
-+# at this point you have to switch the dvi/lcd dip-switch from the omap board
-+echo "lcd t:dvi" > omapfb/managers
-+echo "dvi e:1" > omapfb/displays
-+
-+After this the configuration looks like:
-+
-+FB0 --- GFX -\ -- DVI
-+FB1 --- VID1 --+- LCD -/ LCD
-+FB2 --- VID2 -/ TV ----- TV
-+
-+Clone GFX overlay to LCD and TV
-+-------------------------------
-+
-+tvline=`cat /sys/devices/platform/omapfb/displays |grep tv`
-+w=`echo $tvline | cut -d " " -f 2 | cut -d ":" -f 2`
-+h=`echo $tvline | cut -d " " -f 3 | cut -d ":" -f 2`
-+
-+echo "1 t:none" > omapfb/framebuffers
-+echo "0 t:gfx,vid1" > omapfb/framebuffers
-+echo "gfx e:1" > omapfb/overlays
-+echo "vid1 t:tv w:$w h:$h e:1" > omapfb/overlays
-+echo "tv e:1" > omapfb/displays
-+
-+After this the configuration looks like (only relevant parts shown):
-+
-+FB0 +-- GFX ---- LCD ---- LCD
-+ \- VID1 ---- TV ---- TV
-+
-+Misc notes
-+----------
-+
-+OMAP FB allocates the framebuffer memory when it starts using
-+dma_alloc_writecombine(). This requires large continuous physical memory areas
-+and you can pre-reserve that area with "Consistent DMA memory size" Kconfig
-+option.
-+
-+Using DSI DPLL to generate pixel clock it is possible produce the pixel clock
-+of 86.5MHz (max possible), and with that you get 1280x1024@57 output from DVI.
-+
-+TODO
-+----
-+
-+OMAP2 not tested for some time
-+- DSS2 did work on OMAP2, but I haven't been able to test it for some time.
-+
-+DSS locking
-+
-+Error checking
-+- Lots of checks are missing or implemented just as BUG()
-+
-+Rotate (external FB)
-+Rotate (VRFB)
-+Rotate (SMS)
-+
-+System DMA update for DSI
-+- Can be used for RGB16 and RGB24P modes. Probably not for RGB24U (how
-+ to skip the empty byte?)
-+
-+Power management
-+- Context saving
-+
-+Resolution change
-+- The x/y res of the framebuffer are not display resolutions, but the size
-+ of the overlay.
-+- The display resolution affects all planes on the display.
-+
-+OMAP1 support
-+- Not sure if needed
-+
---
-1.5.6.3
-
--- /dev/null
+From 76e1700add1c77b614ed11c3e29e8a39bd4e6b8c Mon Sep 17 00:00:00 2001
+From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
+Date: Mon, 29 Sep 2008 17:03:36 +0300
+Subject: [PATCH] DSS: support for Beagle Board
+
+Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
+---
+ arch/arm/configs/dss_omap3_beagle_defconfig | 1437 +++++++++++++++++++++++++++
+ arch/arm/mach-omap2/board-omap3beagle.c | 101 ++-
+ 2 files changed, 1524 insertions(+), 14 deletions(-)
+ create mode 100644 arch/arm/configs/dss_omap3_beagle_defconfig
+
+diff --git a/arch/arm/configs/dss_omap3_beagle_defconfig b/arch/arm/configs/dss_omap3_beagle_defconfig
+new file mode 100644
+index 0000000..f39167f
+--- /dev/null
++++ b/arch/arm/configs/dss_omap3_beagle_defconfig
+@@ -0,0 +1,1437 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.28-omap1
++# Wed Jan 7 15:22:00 2009
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_MMU=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_HAVE_LATENCYTOP_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++CONFIG_LOCALVERSION_AUTO=y
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++CONFIG_BSD_PROCESS_ACCT=y
++# CONFIG_BSD_PROCESS_ACCT_V3 is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_GROUP_SCHED=y
++CONFIG_FAIR_GROUP_SCHED=y
++# CONFIG_RT_GROUP_SCHED is not set
++CONFIG_USER_SCHED=y
++# CONFIG_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_SYSFS_DEPRECATED_V2=y
++# CONFIG_RELAY is not set
++# CONFIG_NAMESPACES is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++CONFIG_UID16=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++CONFIG_KALLSYMS_EXTRA_PASS=y
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_COMPAT_BRK=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++# CONFIG_PROFILING is not set
++# CONFIG_MARKERS is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_KPROBES is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_HAVE_CLK=y
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SRCVERSION_ALL=y
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++CONFIG_DEFAULT_AS=y
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="anticipatory"
++CONFIG_CLASSIC_RCU=y
++# CONFIG_FREEZER is not set
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_KIRKWOOD is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_DAVINCI is not set
++CONFIG_ARCH_OMAP=y
++# CONFIG_ARCH_MSM is not set
++
++#
++# TI OMAP Implementations
++#
++CONFIG_ARCH_OMAP_OTG=y
++# CONFIG_ARCH_OMAP1 is not set
++# CONFIG_ARCH_OMAP2 is not set
++CONFIG_ARCH_OMAP3=y
++
++#
++# OMAP Feature Selections
++#
++# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
++# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
++# CONFIG_OMAP_SMARTREFLEX is not set
++# CONFIG_OMAP_RESET_CLOCKS is not set
++CONFIG_OMAP_BOOT_TAG=y
++CONFIG_OMAP_BOOT_REASON=y
++# CONFIG_OMAP_COMPONENT_VERSION is not set
++# CONFIG_OMAP_GPIO_SWITCH is not set
++# CONFIG_OMAP_MUX is not set
++# CONFIG_OMAP_MCBSP is not set
++# CONFIG_OMAP_MMU_FWK is not set
++# CONFIG_OMAP_MBOX_FWK is not set
++# CONFIG_OMAP_MPU_TIMER is not set
++CONFIG_OMAP_32K_TIMER=y
++CONFIG_OMAP_32K_TIMER_HZ=128
++CONFIG_OMAP_DM_TIMER=y
++# CONFIG_OMAP_LL_DEBUG_UART1 is not set
++# CONFIG_OMAP_LL_DEBUG_UART2 is not set
++CONFIG_OMAP_LL_DEBUG_UART3=y
++CONFIG_OMAP2_DSS=m
++CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y
++# CONFIG_OMAP2_DSS_RFBI is not set
++CONFIG_OMAP2_DSS_VENC=y
++# CONFIG_OMAP2_DSS_SDI is not set
++# CONFIG_OMAP2_DSS_DSI is not set
++# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
++CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
++CONFIG_ARCH_OMAP34XX=y
++CONFIG_ARCH_OMAP3430=y
++
++#
++# OMAP Board Type
++#
++# CONFIG_MACH_OMAP_LDP is not set
++# CONFIG_MACH_OMAP_3430SDP is not set
++# CONFIG_MACH_OMAP3EVM is not set
++CONFIG_MACH_OMAP3_BEAGLE=y
++# CONFIG_MACH_OVERO is not set
++# CONFIG_MACH_OMAP3_PANDORA is not set
++CONFIG_OMAP_TICK_GPTIMER=12
++
++#
++# Boot options
++#
++
++#
++# Power management
++#
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_32v6K=y
++CONFIG_CPU_V7=y
++CONFIG_CPU_32v7=y
++CONFIG_CPU_ABRT_EV7=y
++CONFIG_CPU_PABRT_IFAR=y
++CONFIG_CPU_CACHE_V7=y
++CONFIG_CPU_CACHE_VIPT=y
++CONFIG_CPU_COPY_V6=y
++CONFIG_CPU_TLB_V7=y
++CONFIG_CPU_HAS_ASID=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_ARM_THUMBEE is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_BPREDICT_DISABLE is not set
++CONFIG_HAS_TLS_REG=y
++# CONFIG_OUTER_CACHE is not set
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++CONFIG_VMSPLIT_3G=y
++# CONFIG_VMSPLIT_2G is not set
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0xC0000000
++# CONFIG_PREEMPT is not set
++CONFIG_HZ=128
++CONFIG_AEABI=y
++CONFIG_OABI_COMPAT=y
++CONFIG_ARCH_FLATMEM_HAS_HOLES=y
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_UNEVICTABLE_LRU=y
++# CONFIG_LEDS is not set
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8"
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
++
++#
++# CPU Power Management
++#
++# CONFIG_CPU_FREQ is not set
++# CONFIG_CPU_IDLE is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++CONFIG_VFP=y
++CONFIG_VFPv3=y
++# CONFIG_NEON is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++# CONFIG_BINFMT_AOUT is not set
++CONFIG_BINFMT_MISC=y
++
++#
++# Power management options
++#
++CONFIG_PM=y
++# CONFIG_PM_DEBUG is not set
++# CONFIG_SUSPEND is not set
++# CONFIG_APM_EMULATION is not set
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++# CONFIG_PACKET_MMAP is not set
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++CONFIG_NET_KEY=y
++# CONFIG_NET_KEY_MIGRATE is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_BOOTP=y
++CONFIG_IP_PNP_RARP=y
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_NET_DSA is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++# CONFIG_PHONET is not set
++CONFIG_WIRELESS=y
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_OLD_REGULATORY=y
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++# CONFIG_MTD_CMDLINE_PARTS is not set
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++# CONFIG_MTD_CFI is not set
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++# CONFIG_MTD_NAND_GPIO is not set
++CONFIG_MTD_NAND_OMAP2=y
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=16384
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_MISC_DEVICES is not set
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_IWLWIFI_LEDS is not set
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_WAN is not set
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++# CONFIG_INPUT_MOUSEDEV is not set
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_DEVKMEM=y
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++CONFIG_SERIAL_8250_NR_UARTS=32
++CONFIG_SERIAL_8250_RUNTIME_UARTS=4
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_MANY_PORTS=y
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++CONFIG_SERIAL_8250_DETECT_IRQ=y
++CONFIG_SERIAL_8250_RSA=y
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_NVRAM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=y
++CONFIG_I2C_HELPER_AUTO=y
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_OCORES is not set
++CONFIG_I2C_OMAP=y
++# CONFIG_I2C2_OMAP_BEAGLE is not set
++# CONFIG_I2C_SIMTEC is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_DS1682 is not set
++# CONFIG_AT24 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_PCF8575 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_TPS65010 is not set
++# CONFIG_TWL4030_MADC is not set
++# CONFIG_TWL4030_PWRBUTTON is not set
++# CONFIG_TWL4030_POWEROFF is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_LP5521 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++# CONFIG_SPI is not set
++CONFIG_ARCH_REQUIRE_GPIOLIB=y
++CONFIG_GPIOLIB=y
++# CONFIG_DEBUG_GPIO is not set
++# CONFIG_GPIO_SYSFS is not set
++
++#
++# Memory mapped GPIO expanders:
++#
++
++#
++# I2C GPIO expanders:
++#
++# CONFIG_GPIO_MAX732X is not set
++# CONFIG_GPIO_PCA953X is not set
++# CONFIG_GPIO_PCF857X is not set
++CONFIG_GPIO_TWL4030=y
++
++#
++# PCI GPIO expanders:
++#
++
++#
++# SPI GPIO expanders:
++#
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_THERMAL_HWMON is not set
++# CONFIG_WATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_MFD_ASIC3 is not set
++# CONFIG_HTC_EGPIO is not set
++# CONFIG_HTC_PASIC3 is not set
++CONFIG_TWL4030_CORE=y
++# CONFIG_TWL4030_POWER is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_MFD_T7L66XB is not set
++# CONFIG_MFD_TC6387XB is not set
++# CONFIG_MFD_TC6393XB is not set
++# CONFIG_PMIC_DA903X is not set
++# CONFIG_MFD_WM8400 is not set
++# CONFIG_MFD_WM8350_I2C is not set
++
++#
++# Multimedia devices
++#
++
++#
++# Multimedia core support
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_VIDEO_MEDIA is not set
++
++#
++# Multimedia drivers
++#
++CONFIG_DAB=y
++# CONFIG_USB_DABUSB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++CONFIG_FB_CFB_FILLRECT=m
++CONFIG_FB_CFB_COPYAREA=m
++CONFIG_FB_CFB_IMAGEBLIT=m
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_MB862XX is not set
++CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=4
++CONFIG_FB_OMAP2=m
++# CONFIG_FB_OMAP2_DEBUG is not set
++# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set
++CONFIG_FB_OMAP2_NUM_FBS=3
++
++#
++# OMAP2/3 Display Device Drivers
++#
++CONFIG_PANEL_GENERIC=m
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE is not set
++# CONFIG_LOGO is not set
++# CONFIG_SOUND is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++CONFIG_USB_OTG=y
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++CONFIG_USB_MON=y
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++# CONFIG_USB_EHCI_HCD is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_OHCI_HCD is not set
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++CONFIG_USB_MUSB_HDRC=y
++CONFIG_USB_MUSB_SOC=y
++
++#
++# OMAP 343x high speed USB support
++#
++# CONFIG_USB_MUSB_HOST is not set
++# CONFIG_USB_MUSB_PERIPHERAL is not set
++CONFIG_USB_MUSB_OTG=y
++CONFIG_USB_GADGET_MUSB_HDRC=y
++CONFIG_USB_MUSB_HDRC_HCD=y
++# CONFIG_MUSB_PIO_ONLY is not set
++CONFIG_USB_INVENTRA_DMA=y
++# CONFIG_USB_TI_CPPI_DMA is not set
++# CONFIG_USB_MUSB_DEBUG is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++# CONFIG_USB_PRINTER is not set
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_TMC is not set
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
++#
++
++#
++# see USB_STORAGE Help for more information
++#
++# CONFIG_USB_STORAGE is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB port drivers
++#
++# CONFIG_USB_SERIAL is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_VST is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_VBUS_DRAW=2
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_PXA25X is not set
++# CONFIG_USB_GADGET_PXA27X is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_FSL_QE is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++CONFIG_USB_ETH_RNDIS=y
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++
++#
++# OTG and related infrastructure
++#
++CONFIG_USB_OTG_UTILS=y
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_ISP1301_OMAP is not set
++CONFIG_TWL4030_USB=y
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD/SDIO Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD/SDIO Host Controller Drivers
++#
++# CONFIG_MMC_SDHCI is not set
++CONFIG_MMC_OMAP_HS=y
++# CONFIG_MEMSTICK is not set
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_NEW_LEDS is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++CONFIG_RTC_DRV_TWL4030=y
++# CONFIG_RTC_DRV_S35390A is not set
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++
++#
++# SPI RTC drivers
++#
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++# CONFIG_DMADEVICES is not set
++# CONFIG_REGULATOR is not set
++# CONFIG_UIO is not set
++
++#
++# CBUS support
++#
++# CONFIG_CBUS is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++CONFIG_FILE_LOCKING=y
++# CONFIG_XFS_FS is not set
++# CONFIG_OCFS2_FS is not set
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++CONFIG_QUOTA=y
++# CONFIG_QUOTA_NETLINK_INTERFACE is not set
++CONFIG_PRINT_QUOTA_WARNING=y
++# CONFIG_QFMT_V1 is not set
++CONFIG_QFMT_V2=y
++CONFIG_QUOTACTL=y
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++CONFIG_NFS_V4=y
++CONFIG_ROOT_NFS=y
++# CONFIG_NFSD is not set
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++CONFIG_SUNRPC_GSS=y
++# CONFIG_SUNRPC_REGISTER_V4 is not set
++CONFIG_RPCSEC_GSS_KRB5=y
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_OSF_PARTITION is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_ATARI_PARTITION is not set
++# CONFIG_MAC_PARTITION is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_BSD_DISKLABEL is not set
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_UNIXWARE_DISKLABEL is not set
++# CONFIG_LDM_PARTITION is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_KARMA_PARTITION is not set
++# CONFIG_EFI_PARTITION is not set
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++# CONFIG_NLS_UTF8 is not set
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_OBJECTS is not set
++# CONFIG_DEBUG_SLAB is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++CONFIG_DEBUG_MUTEXES=y
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_WRITECOUNT is not set
++# CONFIG_DEBUG_MEMORY_INIT is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_RCU_CPU_STALL_DETECTOR is not set
++# CONFIG_BACKTRACE_SELF_TEST is not set
++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_LATENCYTOP is not set
++CONFIG_HAVE_FUNCTION_TRACER=y
++
++#
++# Tracers
++#
++# CONFIG_FUNCTION_TRACER is not set
++# CONFIG_IRQSOFF_TRACER is not set
++# CONFIG_SCHED_TRACER is not set
++# CONFIG_CONTEXT_SWITCH_TRACER is not set
++# CONFIG_BOOT_TRACER is not set
++# CONFIG_STACK_TRACER is not set
++# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_KGDB is not set
++CONFIG_DEBUG_USER=y
++CONFIG_DEBUG_ERRORS=y
++# CONFIG_DEBUG_STACK_USAGE is not set
++# CONFIG_DEBUG_LL is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++# CONFIG_CRYPTO_FIPS is not set
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_TEST is not set
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=y
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=m
++# CONFIG_CRYPTO_LRW is not set
++CONFIG_CRYPTO_PCBC=m
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_XCBC is not set
++
++#
++# Digest
++#
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_MD4 is not set
++CONFIG_CRYPTO_MD5=y
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++# CONFIG_CRYPTO_SHA1 is not set
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++# CONFIG_CRYPTO_AES is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++CONFIG_CRYPTO_DES=y
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++
++#
++# Compression
++#
++# CONFIG_CRYPTO_DEFLATE is not set
++# CONFIG_CRYPTO_LZO is not set
++
++#
++# Random Number Generation
++#
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++CONFIG_CRYPTO_HW=y
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=y
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_T10DIF is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index fe97bab..61f0fc9 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
++++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -43,6 +43,8 @@
+ #include <mach/gpmc.h>
+ #include <mach/nand.h>
+ #include <mach/mux.h>
++#include <mach/omapfb.h>
++#include <mach/display.h>
+
+ #include "twl4030-generic-scripts.h"
+ #include "mmc-twl4030.h"
+@@ -238,15 +240,6 @@ static void __init omap3_beagle_init_irq(void)
+ omap_gpio_init();
+ }
+
+-static struct platform_device omap3_beagle_lcd_device = {
+- .name = "omap3beagle_lcd",
+- .id = -1,
+-};
+-
+-static struct omap_lcd_config omap3_beagle_lcd_config __initdata = {
+- .ctrl_name = "internal",
+-};
+-
+ static struct gpio_led gpio_leds[] = {
+ {
+ .name = "beagleboard::usr0",
+@@ -300,13 +293,94 @@ static struct platform_device keys_gpio = {
+ },
+ };
+
++/* DSS */
++
++static int beagle_enable_dvi(struct omap_display *display)
++{
++ if (display->hw_config.panel_reset_gpio != -1)
++ gpio_direction_output(display->hw_config.panel_reset_gpio, 1);
++
++ return 0;
++}
++
++static void beagle_disable_dvi(struct omap_display *display)
++{
++ if (display->hw_config.panel_reset_gpio != -1)
++ gpio_direction_output(display->hw_config.panel_reset_gpio, 0);
++}
++
++static struct omap_display_data beagle_display_data_dvi = {
++ .type = OMAP_DISPLAY_TYPE_DPI,
++ .name = "dvi",
++ .panel_name = "panel-generic",
++ .u.dpi.data_lines = 24,
++ .panel_reset_gpio = 170,
++ .panel_enable = beagle_enable_dvi,
++ .panel_disable = beagle_disable_dvi,
++};
++
++
++static int beagle_panel_enable_tv(struct omap_display *display)
++{
++#define ENABLE_VDAC_DEDICATED 0x03
++#define ENABLE_VDAC_DEV_GRP 0x20
++
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
++ ENABLE_VDAC_DEDICATED,
++ TWL4030_VDAC_DEDICATED);
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
++ ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP);
++
++ return 0;
++}
++
++static void beagle_panel_disable_tv(struct omap_display *display)
++{
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
++ TWL4030_VDAC_DEDICATED);
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
++ TWL4030_VDAC_DEV_GRP);
++}
++
++static struct omap_display_data beagle_display_data_tv = {
++ .type = OMAP_DISPLAY_TYPE_VENC,
++ .name = "tv",
++ .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
++ .panel_enable = beagle_panel_enable_tv,
++ .panel_disable = beagle_panel_disable_tv,
++};
++
++static struct omap_dss_platform_data beagle_dss_data = {
++ .num_displays = 2,
++ .displays = {
++ &beagle_display_data_dvi,
++ &beagle_display_data_tv,
++ }
++};
++
++static struct platform_device beagle_dss_device = {
++ .name = "omap-dss",
++ .id = -1,
++ .dev = {
++ .platform_data = &beagle_dss_data,
++ },
++};
++
++static void __init beagle_display_init(void)
++{
++ int r;
++
++ r = gpio_request(beagle_display_data_dvi.panel_reset_gpio, "DVI reset");
++ if (r < 0)
++ printk(KERN_ERR "Unable to get DVI reset GPIO\n");
++}
++
+ static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
+ { OMAP_TAG_UART, &omap3_beagle_uart_config },
+- { OMAP_TAG_LCD, &omap3_beagle_lcd_config },
+ };
+
+ static struct platform_device *omap3_beagle_devices[] __initdata = {
+- &omap3_beagle_lcd_device,
++ &beagle_dss_device,
+ &leds_gpio,
+ &keys_gpio,
+ };
+@@ -359,18 +433,17 @@ static void __init omap3_beagle_init(void)
+ omap_serial_init();
+
+ omap_cfg_reg(J25_34XX_GPIO170);
+- gpio_request(170, "DVI_nPD");
+- /* REVISIT leave DVI powered down until it's needed ... */
+- gpio_direction_output(170, true);
+
+ usb_musb_init();
+ usb_ehci_init();
+ omap3beagle_flash_init();
++ beagle_display_init();
+ }
+
+ static void __init omap3_beagle_map_io(void)
+ {
+ omap2_set_globals_343x();
++ omap2_set_sdram_vram(1280 * 1024 * 4 * 3, 0);
+ omap2_map_common_io();
+ }
+
+--
+1.5.6.3
+
-From b4718ad31fb4ba43e7f3058b42f3c7c01ee1596a Mon Sep 17 00:00:00 2001
+From b0d997fcd65c4389e3d4a5e375774e51ebe6186a Mon Sep 17 00:00:00 2001
From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Date: Fri, 14 Nov 2008 15:47:19 +0200
Subject: [PATCH] DSS: Sharp LS037V7DW01 LCD Panel driver
---
drivers/video/omap2/Kconfig | 7 ++-
drivers/video/omap2/Makefile | 1 +
- drivers/video/omap2/panel-sharp-ls037v7dw01.c | 108 +++++++++++++++++++++++++
- 3 files changed, 115 insertions(+), 1 deletions(-)
+ drivers/video/omap2/panel-sharp-ls037v7dw01.c | 109 +++++++++++++++++++++++++
+ 3 files changed, 116 insertions(+), 1 deletions(-)
create mode 100644 drivers/video/omap2/panel-sharp-ls037v7dw01.c
diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig
-index ab6a5fc..392f251 100644
+index be00882..b54c955 100644
--- a/drivers/video/omap2/Kconfig
+++ b/drivers/video/omap2/Kconfig
-@@ -57,5 +57,10 @@ config PANEL_DVI_1280X1024
-
- endchoice
+@@ -43,5 +43,10 @@ config PANEL_GENERIC
+ Generic panel driver.
+ Used for DVI output for Beagle and OMAP3 SDP.
-endmenu
+config PANEL_SHARP_LS037V7DW01
+endmenu
diff --git a/drivers/video/omap2/Makefile b/drivers/video/omap2/Makefile
-index 7c75340..b86dd0b 100644
+index f471a2b..fe6858e 100644
--- a/drivers/video/omap2/Makefile
+++ b/drivers/video/omap2/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_FB_OMAP2) += omapfb.o
omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o
- obj-$(CONFIG_PANEL_DVI) += panel-dvi.o
+ obj-$(CONFIG_PANEL_GENERIC) += panel-generic.o
+obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
diff --git a/drivers/video/omap2/panel-sharp-ls037v7dw01.c b/drivers/video/omap2/panel-sharp-ls037v7dw01.c
new file mode 100644
-index 0000000..b4270df
+index 0000000..7d67b6d
--- /dev/null
+++ b/drivers/video/omap2/panel-sharp-ls037v7dw01.c
-@@ -0,0 +1,108 @@
+@@ -0,0 +1,109 @@
+/*
+ * LCD panel driver for Sharp LS037V7DW01
+ *
+ /*.set_mode = sharp_ls_set_mode, */
+
+ .timings = {
++ .x_res = 480,
++ .y_res = 640,
++
+ .pixel_clock = 19200,
+
+ .hsw = 2,
+ .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
+ OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
+
-+ .x_res = 480,
-+ .y_res = 640,
+ .bpp = 16,
+};
+
+++ /dev/null
-From 80146c830e0b14f92db3b7d02a05be315cab12b6 Mon Sep 17 00:00:00 2001
-From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Tue, 11 Nov 2008 13:52:56 +0200
-Subject: [PATCH] DSS: Add generic DVI panel
-
-You also need DSI PLL to generate pix clock for 1280x1024.
-
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
----
- drivers/video/omap2/Kconfig | 23 ++++++
- drivers/video/omap2/Makefile | 2 +
- drivers/video/omap2/panel-dvi.c | 150 +++++++++++++++++++++++++++++++++++++++
- 3 files changed, 175 insertions(+), 0 deletions(-)
- create mode 100644 drivers/video/omap2/panel-dvi.c
-
-diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig
-index bfa1617..ab6a5fc 100644
---- a/drivers/video/omap2/Kconfig
-+++ b/drivers/video/omap2/Kconfig
-@@ -33,6 +33,29 @@ config FB_OMAP2_NUM_FBS
- menu "OMAP2/3 Display Device Drivers"
- depends on OMAP2_DSS
-
-+config PANEL_DVI
-+ tristate "DVI Panel"
-+ help
-+ DVI output, for Beagle and OMAP3 SDP
-+
-+choice
-+ prompt "Default DVI Mode"
-+ depends on PANEL_DVI
-+ default PANEL_DVI_1024X768
-+
-+config PANEL_DVI_640X480
-+ bool "640 x 480 @ 60"
-+
-+config PANEL_DVI_800X600
-+ bool "800 x 600 @ 60"
-+
-+config PANEL_DVI_1024X768
-+ bool "1024 x 768 @ 60"
-+
-+config PANEL_DVI_1280X1024
-+ bool "1280 x 1024 @ 57"
-+
-+endchoice
-
- endmenu
-
-diff --git a/drivers/video/omap2/Makefile b/drivers/video/omap2/Makefile
-index 51c2e00..7c75340 100644
---- a/drivers/video/omap2/Makefile
-+++ b/drivers/video/omap2/Makefile
-@@ -1,2 +1,4 @@
- obj-$(CONFIG_FB_OMAP2) += omapfb.o
- omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o
-+
-+obj-$(CONFIG_PANEL_DVI) += panel-dvi.o
-diff --git a/drivers/video/omap2/panel-dvi.c b/drivers/video/omap2/panel-dvi.c
-new file mode 100644
-index 0000000..7a90773
---- /dev/null
-+++ b/drivers/video/omap2/panel-dvi.c
-@@ -0,0 +1,150 @@
-+/*
-+ * DVI panel support
-+ *
-+ * Copyright (C) 2008 Nokia Corporation
-+ * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program. If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/delay.h>
-+
-+#include <mach/display.h>
-+
-+static int dvi_panel_init(struct omap_display *display)
-+{
-+ return 0;
-+}
-+
-+static int dvi_panel_enable(struct omap_display *display)
-+{
-+ int r = 0;
-+
-+ if (display->hw_config.panel_enable)
-+ r = display->hw_config.panel_enable(display);
-+
-+ return r;
-+}
-+
-+static void dvi_panel_disable(struct omap_display *display)
-+{
-+ if (display->hw_config.panel_disable)
-+ display->hw_config.panel_disable(display);
-+}
-+
-+static int dvi_panel_suspend(struct omap_display *display)
-+{
-+ dvi_panel_disable(display);
-+ return 0;
-+}
-+
-+static int dvi_panel_resume(struct omap_display *display)
-+{
-+ return dvi_panel_enable(display);
-+}
-+
-+static struct omap_panel dvi_panel = {
-+ .owner = THIS_MODULE,
-+ .name = "panel-dvi",
-+ .init = dvi_panel_init,
-+ /*.remove = dvi_cleanup, */
-+ .enable = dvi_panel_enable,
-+ .disable = dvi_panel_disable,
-+ .suspend = dvi_panel_suspend,
-+ .resume = dvi_panel_resume,
-+ /*.set_mode = dvi_set_mode, */
-+
-+#if defined(CONFIG_PANEL_DVI_640X480)
-+ .timings = {
-+ /* 640 x 480 @ 60 hz reduced blanking vesa
-+ * (dunno if these are correct) */
-+ .pixel_clock = 23500,
-+ .hfp = 48,
-+ .hsw = 32,
-+ .hbp = 80,
-+ .vfp = 3,
-+ .vsw = 4,
-+ .vbp = 11,
-+ },
-+
-+ .x_res = 640,
-+ .y_res = 480,
-+ .bpp = 24,
-+#elif defined(CONFIG_PANEL_DVI_800X600)
-+ .timings = {
-+ /* 800 x 600 @ 60 hz reduced blanking vesa cvt 0.48m3-r */
-+ .pixel_clock = 35500,
-+ .hfp = 48,
-+ .hsw = 32,
-+ .hbp = 80,
-+ .vfp = 3,
-+ .vsw = 4,
-+ .vbp = 11,
-+ },
-+
-+ .x_res = 800,
-+ .y_res = 600,
-+ .bpp = 24,
-+#elif defined(CONFIG_PANEL_DVI_1024X768)
-+ .timings = {
-+ /* 1024 x 768 @ 60 Hz Reduced blanking */
-+ .pixel_clock = 56000,
-+ .hfp = 48,
-+ .hsw = 32,
-+ .hbp = 80,
-+ .vfp = 3,
-+ .vsw = 4,
-+ .vbp = 15,
-+ },
-+
-+ .x_res = 1024,
-+ .y_res = 768,
-+ .bpp = 24,
-+#elif defined(CONFIG_PANEL_DVI_1280X1024)
-+ .timings = {
-+ /* 1280 x 1024 @ 57 Hz Reduced blanking */
-+ .pixel_clock = 86500,
-+ .hfp = 48,
-+ .hsw = 32,
-+ .hbp = 80,
-+ .vfp = 3,
-+ .vsw = 4,
-+ .vbp = 15,
-+ },
-+
-+ .x_res = 1280,
-+ .y_res = 1024,
-+ .bpp = 24,
-+#else
-+#error Undefined default mode
-+#endif
-+
-+ .config = OMAP_DSS_LCD_TFT,
-+};
-+
-+
-+static int __init dvi_panel_drv_init(void)
-+{
-+ omap_dss_register_panel(&dvi_panel);
-+ return 0;
-+}
-+
-+static void __exit dvi_panel_drv_exit(void)
-+{
-+ omap_dss_unregister_panel(&dvi_panel);
-+}
-+
-+module_init(dvi_panel_drv_init);
-+module_exit(dvi_panel_drv_exit);
-+MODULE_LICENSE("GPL");
---
-1.5.6.3
-
--- /dev/null
+From 7806a298a80d260473dc488c7cea2a72fe96866f Mon Sep 17 00:00:00 2001
+From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
+Date: Fri, 14 Nov 2008 15:47:55 +0200
+Subject: [PATCH] DSS: Support for OMAP3 SDP board
+
+Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
+---
+ arch/arm/configs/dss_omap_3430sdp_defconfig | 1603 +++++++++++++++++++++++++++
+ arch/arm/mach-omap2/board-3430sdp.c | 215 ++++-
+ 2 files changed, 1809 insertions(+), 9 deletions(-)
+ create mode 100644 arch/arm/configs/dss_omap_3430sdp_defconfig
+
+diff --git a/arch/arm/configs/dss_omap_3430sdp_defconfig b/arch/arm/configs/dss_omap_3430sdp_defconfig
+new file mode 100644
+index 0000000..42d7f5e
+--- /dev/null
++++ b/arch/arm/configs/dss_omap_3430sdp_defconfig
+@@ -0,0 +1,1603 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.28-omap1
++# Wed Jan 7 15:22:34 2009
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_MMU=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_HAVE_LATENCYTOP_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++CONFIG_BSD_PROCESS_ACCT=y
++# CONFIG_BSD_PROCESS_ACCT_V3 is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_GROUP_SCHED=y
++CONFIG_FAIR_GROUP_SCHED=y
++# CONFIG_RT_GROUP_SCHED is not set
++CONFIG_USER_SCHED=y
++# CONFIG_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_SYSFS_DEPRECATED_V2=y
++# CONFIG_RELAY is not set
++# CONFIG_NAMESPACES is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++CONFIG_UID16=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++CONFIG_KALLSYMS_EXTRA_PASS=y
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_COMPAT_BRK=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++# CONFIG_PROFILING is not set
++# CONFIG_MARKERS is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_KPROBES is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_HAVE_CLK=y
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SRCVERSION_ALL=y
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++CONFIG_DEFAULT_AS=y
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="anticipatory"
++CONFIG_CLASSIC_RCU=y
++CONFIG_FREEZER=y
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_KIRKWOOD is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_DAVINCI is not set
++CONFIG_ARCH_OMAP=y
++# CONFIG_ARCH_MSM is not set
++
++#
++# TI OMAP Implementations
++#
++CONFIG_ARCH_OMAP_OTG=y
++# CONFIG_ARCH_OMAP1 is not set
++# CONFIG_ARCH_OMAP2 is not set
++CONFIG_ARCH_OMAP3=y
++
++#
++# OMAP Feature Selections
++#
++# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
++# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
++CONFIG_OMAP_SMARTREFLEX=y
++# CONFIG_OMAP_SMARTREFLEX_TESTING is not set
++CONFIG_OMAP_RESET_CLOCKS=y
++CONFIG_OMAP_BOOT_TAG=y
++CONFIG_OMAP_BOOT_REASON=y
++# CONFIG_OMAP_COMPONENT_VERSION is not set
++# CONFIG_OMAP_GPIO_SWITCH is not set
++CONFIG_OMAP_MUX=y
++CONFIG_OMAP_MUX_DEBUG=y
++CONFIG_OMAP_MUX_WARNINGS=y
++# CONFIG_OMAP_MCBSP is not set
++# CONFIG_OMAP_MMU_FWK is not set
++# CONFIG_OMAP_MBOX_FWK is not set
++# CONFIG_OMAP_MPU_TIMER is not set
++CONFIG_OMAP_32K_TIMER=y
++CONFIG_OMAP_32K_TIMER_HZ=128
++CONFIG_OMAP_DM_TIMER=y
++CONFIG_OMAP_LL_DEBUG_UART1=y
++# CONFIG_OMAP_LL_DEBUG_UART2 is not set
++# CONFIG_OMAP_LL_DEBUG_UART3 is not set
++CONFIG_OMAP_SERIAL_WAKE=y
++CONFIG_OMAP2_DSS=m
++CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y
++# CONFIG_OMAP2_DSS_RFBI is not set
++CONFIG_OMAP2_DSS_VENC=y
++# CONFIG_OMAP2_DSS_SDI is not set
++# CONFIG_OMAP2_DSS_DSI is not set
++# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
++CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
++CONFIG_ARCH_OMAP34XX=y
++CONFIG_ARCH_OMAP3430=y
++
++#
++# OMAP Board Type
++#
++# CONFIG_MACH_OMAP_LDP is not set
++CONFIG_MACH_OMAP_3430SDP=y
++# CONFIG_MACH_OMAP3EVM is not set
++# CONFIG_MACH_OMAP3_BEAGLE is not set
++# CONFIG_MACH_OVERO is not set
++# CONFIG_MACH_OMAP3_PANDORA is not set
++CONFIG_OMAP_TICK_GPTIMER=1
++
++#
++# Boot options
++#
++
++#
++# Power management
++#
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_32v6K=y
++CONFIG_CPU_V7=y
++CONFIG_CPU_32v7=y
++CONFIG_CPU_ABRT_EV7=y
++CONFIG_CPU_PABRT_IFAR=y
++CONFIG_CPU_CACHE_V7=y
++CONFIG_CPU_CACHE_VIPT=y
++CONFIG_CPU_COPY_V6=y
++CONFIG_CPU_TLB_V7=y
++CONFIG_CPU_HAS_ASID=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_ARM_THUMBEE is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_BPREDICT_DISABLE is not set
++CONFIG_HAS_TLS_REG=y
++# CONFIG_OUTER_CACHE is not set
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++CONFIG_VMSPLIT_3G=y
++# CONFIG_VMSPLIT_2G is not set
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0xC0000000
++# CONFIG_PREEMPT is not set
++CONFIG_HZ=128
++CONFIG_AEABI=y
++CONFIG_OABI_COMPAT=y
++CONFIG_ARCH_FLATMEM_HAS_HOLES=y
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_UNEVICTABLE_LRU=y
++# CONFIG_LEDS is not set
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8"
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
++
++#
++# CPU Power Management
++#
++# CONFIG_CPU_FREQ is not set
++# CONFIG_CPU_IDLE is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++CONFIG_VFP=y
++CONFIG_VFPv3=y
++# CONFIG_NEON is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++# CONFIG_BINFMT_AOUT is not set
++CONFIG_BINFMT_MISC=y
++
++#
++# Power management options
++#
++CONFIG_PM=y
++# CONFIG_PM_DEBUG is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++# CONFIG_APM_EMULATION is not set
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++# CONFIG_PACKET_MMAP is not set
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++CONFIG_NET_KEY=y
++# CONFIG_NET_KEY_MIGRATE is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_BOOTP=y
++CONFIG_IP_PNP_RARP=y
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_NET_DSA is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++# CONFIG_PHONET is not set
++CONFIG_WIRELESS=y
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_OLD_REGULATORY=y
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++CONFIG_MTD_CONCAT=y
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_AMDSTD is not set
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PHYSMAP is not set
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++CONFIG_MTD_OMAP_NOR=y
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++CONFIG_MTD_NAND_ECC_SMC=y
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++# CONFIG_MTD_NAND_GPIO is not set
++CONFIG_MTD_NAND_OMAP2=y
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++CONFIG_MTD_ONENAND=y
++CONFIG_MTD_ONENAND_VERIFY_WRITE=y
++# CONFIG_MTD_ONENAND_GENERIC is not set
++CONFIG_MTD_ONENAND_OMAP2=y
++# CONFIG_MTD_ONENAND_OTP is not set
++# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
++# CONFIG_MTD_ONENAND_SIM is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=16384
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_ICS932S401 is not set
++# CONFIG_OMAP_STI is not set
++# CONFIG_ENCLOSURE_SERVICES is not set
++# CONFIG_C2PORT is not set
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++# CONFIG_PHYLIB is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++CONFIG_SMC91X=y
++# CONFIG_DM9000 is not set
++# CONFIG_ENC28J60 is not set
++# CONFIG_SMC911X is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
++# CONFIG_B44 is not set
++CONFIG_NETDEV_1000=y
++CONFIG_NETDEV_10000=y
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_IWLWIFI_LEDS is not set
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_WAN is not set
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++# CONFIG_INPUT_MOUSEDEV is not set
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_TWL4030=y
++# CONFIG_KEYBOARD_LM8323 is not set
++# CONFIG_KEYBOARD_GPIO is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_ADS7846=y
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_INEXIO is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_TSC2005 is not set
++# CONFIG_TOUCHSCREEN_TSC210X is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_DEVKMEM=y
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++CONFIG_SERIAL_8250_NR_UARTS=32
++CONFIG_SERIAL_8250_RUNTIME_UARTS=4
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_MANY_PORTS=y
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++CONFIG_SERIAL_8250_DETECT_IRQ=y
++CONFIG_SERIAL_8250_RSA=y
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_NVRAM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=y
++CONFIG_I2C_HELPER_AUTO=y
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_OCORES is not set
++CONFIG_I2C_OMAP=y
++# CONFIG_I2C_SIMTEC is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_DS1682 is not set
++# CONFIG_AT24 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_PCF8575 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_TPS65010 is not set
++# CONFIG_TWL4030_MADC is not set
++# CONFIG_TWL4030_PWRBUTTON is not set
++# CONFIG_TWL4030_POWEROFF is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_LP5521 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++# CONFIG_SPI_BITBANG is not set
++CONFIG_SPI_OMAP24XX=y
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_TSC210X is not set
++# CONFIG_SPI_TSC2301 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++CONFIG_ARCH_REQUIRE_GPIOLIB=y
++CONFIG_GPIOLIB=y
++# CONFIG_DEBUG_GPIO is not set
++# CONFIG_GPIO_SYSFS is not set
++
++#
++# Memory mapped GPIO expanders:
++#
++
++#
++# I2C GPIO expanders:
++#
++# CONFIG_GPIO_MAX732X is not set
++# CONFIG_GPIO_PCA953X is not set
++# CONFIG_GPIO_PCF857X is not set
++CONFIG_GPIO_TWL4030=y
++
++#
++# PCI GPIO expanders:
++#
++
++#
++# SPI GPIO expanders:
++#
++# CONFIG_GPIO_MAX7301 is not set
++# CONFIG_GPIO_MCP23S08 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_THERMAL_HWMON is not set
++CONFIG_WATCHDOG=y
++CONFIG_WATCHDOG_NOWAYOUT=y
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_OMAP_WATCHDOG=y
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_MFD_ASIC3 is not set
++# CONFIG_HTC_EGPIO is not set
++# CONFIG_HTC_PASIC3 is not set
++CONFIG_TWL4030_CORE=y
++# CONFIG_TWL4030_POWER is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_MFD_T7L66XB is not set
++# CONFIG_MFD_TC6387XB is not set
++# CONFIG_MFD_TC6393XB is not set
++# CONFIG_PMIC_DA903X is not set
++# CONFIG_MFD_WM8400 is not set
++# CONFIG_MFD_WM8350_I2C is not set
++
++#
++# Multimedia devices
++#
++
++#
++# Multimedia core support
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_VIDEO_MEDIA is not set
++
++#
++# Multimedia drivers
++#
++CONFIG_DAB=y
++# CONFIG_USB_DABUSB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++CONFIG_VIDEO_OUTPUT_CONTROL=m
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++CONFIG_FB_CFB_FILLRECT=m
++CONFIG_FB_CFB_COPYAREA=m
++CONFIG_FB_CFB_IMAGEBLIT=m
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_MB862XX is not set
++# CONFIG_FB_OMAP_LCD_VGA is not set
++CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
++CONFIG_FB_OMAP2=m
++CONFIG_FB_OMAP2_DEBUG=y
++# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set
++CONFIG_FB_OMAP2_NUM_FBS=3
++
++#
++# OMAP2/3 Display Device Drivers
++#
++CONFIG_PANEL_GENERIC=m
++CONFIG_PANEL_SHARP_LS037V7DW01=m
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE is not set
++# CONFIG_LOGO is not set
++# CONFIG_SOUND is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_HID_PID is not set
++# CONFIG_USB_HIDDEV is not set
++
++#
++# Special HID drivers
++#
++CONFIG_HID_COMPAT=y
++CONFIG_HID_A4TECH=y
++CONFIG_HID_APPLE=y
++CONFIG_HID_BELKIN=y
++CONFIG_HID_BRIGHT=y
++CONFIG_HID_CHERRY=y
++CONFIG_HID_CHICONY=y
++CONFIG_HID_CYPRESS=y
++CONFIG_HID_DELL=y
++CONFIG_HID_EZKEY=y
++CONFIG_HID_GYRATION=y
++CONFIG_HID_LOGITECH=y
++# CONFIG_LOGITECH_FF is not set
++# CONFIG_LOGIRUMBLEPAD2_FF is not set
++CONFIG_HID_MICROSOFT=y
++CONFIG_HID_MONTEREY=y
++CONFIG_HID_PANTHERLORD=y
++# CONFIG_PANTHERLORD_FF is not set
++CONFIG_HID_PETALYNX=y
++CONFIG_HID_SAMSUNG=y
++CONFIG_HID_SONY=y
++CONFIG_HID_SUNPLUS=y
++# CONFIG_THRUSTMASTER_FF is not set
++# CONFIG_ZEROPLUS_FF is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++CONFIG_USB_DEBUG=y
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++# CONFIG_USB_DEVICE_CLASS is not set
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++CONFIG_USB_OTG=y
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++CONFIG_USB_MON=y
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++CONFIG_USB_EHCI_HCD=m
++CONFIG_OMAP_EHCI_PHY_MODE=y
++# CONFIG_OMAP_EHCI_TLL_MODE is not set
++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_OHCI_HCD is not set
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++CONFIG_USB_MUSB_HDRC=y
++CONFIG_USB_MUSB_SOC=y
++
++#
++# OMAP 343x high speed USB support
++#
++# CONFIG_USB_MUSB_HOST is not set
++# CONFIG_USB_MUSB_PERIPHERAL is not set
++CONFIG_USB_MUSB_OTG=y
++CONFIG_USB_GADGET_MUSB_HDRC=y
++CONFIG_USB_MUSB_HDRC_HCD=y
++# CONFIG_MUSB_PIO_ONLY is not set
++CONFIG_USB_INVENTRA_DMA=y
++# CONFIG_USB_TI_CPPI_DMA is not set
++# CONFIG_USB_MUSB_DEBUG is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++# CONFIG_USB_PRINTER is not set
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_TMC is not set
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
++#
++
++#
++# see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=y
++CONFIG_USB_STORAGE_DEBUG=y
++# CONFIG_USB_STORAGE_DATAFAB is not set
++# CONFIG_USB_STORAGE_FREECOM is not set
++# CONFIG_USB_STORAGE_ISD200 is not set
++# CONFIG_USB_STORAGE_DPCM is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB port drivers
++#
++# CONFIG_USB_SERIAL is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_SISUSBVGA is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++CONFIG_USB_TEST=y
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_VST is not set
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DEBUG=y
++CONFIG_USB_GADGET_DEBUG_FILES=y
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_VBUS_DRAW=2
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_PXA25X is not set
++# CONFIG_USB_GADGET_PXA27X is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_FSL_QE is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++# CONFIG_USB_ZERO_HNPTEST is not set
++# CONFIG_USB_ETH is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++
++#
++# OTG and related infrastructure
++#
++CONFIG_USB_OTG_UTILS=y
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_ISP1301_OMAP is not set
++CONFIG_TWL4030_USB=y
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD/SDIO Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD/SDIO Host Controller Drivers
++#
++# CONFIG_MMC_SDHCI is not set
++CONFIG_MMC_OMAP_HS=m
++# CONFIG_MMC_SPI is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_NEW_LEDS is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++CONFIG_RTC_DRV_TWL4030=y
++# CONFIG_RTC_DRV_S35390A is not set
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_M41T94 is not set
++# CONFIG_RTC_DRV_DS1305 is not set
++# CONFIG_RTC_DRV_DS1390 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++# CONFIG_RTC_DRV_R9701 is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_DS3234 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++# CONFIG_DMADEVICES is not set
++# CONFIG_REGULATOR is not set
++# CONFIG_UIO is not set
++
++#
++# CBUS support
++#
++# CONFIG_CBUS is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++CONFIG_FILE_LOCKING=y
++# CONFIG_XFS_FS is not set
++# CONFIG_OCFS2_FS is not set
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++CONFIG_QUOTA=y
++# CONFIG_QUOTA_NETLINK_INTERFACE is not set
++CONFIG_PRINT_QUOTA_WARNING=y
++# CONFIG_QFMT_V1 is not set
++CONFIG_QFMT_V2=y
++CONFIG_QUOTACTL=y
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++CONFIG_JFFS2_COMPRESSION_OPTIONS=y
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_JFFS2_CMODE_NONE is not set
++CONFIG_JFFS2_CMODE_PRIORITY=y
++# CONFIG_JFFS2_CMODE_SIZE is not set
++# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++CONFIG_NFS_V4=y
++CONFIG_ROOT_NFS=y
++# CONFIG_NFSD is not set
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++CONFIG_SUNRPC_GSS=y
++# CONFIG_SUNRPC_REGISTER_V4 is not set
++CONFIG_RPCSEC_GSS_KRB5=y
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_OSF_PARTITION is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_ATARI_PARTITION is not set
++# CONFIG_MAC_PARTITION is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_BSD_DISKLABEL is not set
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_UNIXWARE_DISKLABEL is not set
++# CONFIG_LDM_PARTITION is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_KARMA_PARTITION is not set
++# CONFIG_EFI_PARTITION is not set
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++# CONFIG_NLS_UTF8 is not set
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_OBJECTS is not set
++# CONFIG_DEBUG_SLAB is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++CONFIG_DEBUG_MUTEXES=y
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_WRITECOUNT is not set
++# CONFIG_DEBUG_MEMORY_INIT is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_RCU_CPU_STALL_DETECTOR is not set
++# CONFIG_BACKTRACE_SELF_TEST is not set
++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_LATENCYTOP is not set
++CONFIG_HAVE_FUNCTION_TRACER=y
++
++#
++# Tracers
++#
++# CONFIG_FUNCTION_TRACER is not set
++# CONFIG_IRQSOFF_TRACER is not set
++# CONFIG_SCHED_TRACER is not set
++# CONFIG_CONTEXT_SWITCH_TRACER is not set
++# CONFIG_BOOT_TRACER is not set
++# CONFIG_STACK_TRACER is not set
++# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_KGDB is not set
++CONFIG_DEBUG_USER=y
++CONFIG_DEBUG_ERRORS=y
++# CONFIG_DEBUG_STACK_USAGE is not set
++# CONFIG_DEBUG_LL is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++# CONFIG_CRYPTO_FIPS is not set
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_TEST is not set
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=y
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=m
++# CONFIG_CRYPTO_LRW is not set
++CONFIG_CRYPTO_PCBC=m
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_XCBC is not set
++
++#
++# Digest
++#
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_MD4 is not set
++CONFIG_CRYPTO_MD5=y
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++# CONFIG_CRYPTO_SHA1 is not set
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++# CONFIG_CRYPTO_AES is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++CONFIG_CRYPTO_DES=y
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++
++#
++# Compression
++#
++# CONFIG_CRYPTO_DEFLATE is not set
++# CONFIG_CRYPTO_LZO is not set
++
++#
++# Random Number Generation
++#
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++CONFIG_CRYPTO_HW=y
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=y
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_T10DIF is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
+index ade186b..529322f 100644
+--- a/arch/arm/mach-omap2/board-3430sdp.c
++++ b/arch/arm/mach-omap2/board-3430sdp.c
+@@ -39,6 +39,7 @@
+ #include <mach/keypad.h>
+ #include <mach/dma.h>
+ #include <mach/gpmc.h>
++#include <mach/display.h>
+
+ #include <asm/io.h>
+ #include <asm/delay.h>
+@@ -238,14 +239,214 @@ static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
+ },
+ };
+
+-static struct platform_device sdp3430_lcd_device = {
+- .name = "sdp2430_lcd",
+- .id = -1,
++
++#define SDP2430_LCD_PANEL_BACKLIGHT_GPIO 91
++#define SDP2430_LCD_PANEL_ENABLE_GPIO 154
++#if 0
++#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 24
++#define SDP3430_LCD_PANEL_ENABLE_GPIO 28
++#else
++#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
++#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
++#endif
++
++#define PM_RECEIVER TWL4030_MODULE_PM_RECEIVER
++#define ENABLE_VAUX2_DEDICATED 0x09
++#define ENABLE_VAUX2_DEV_GRP 0x20
++#define ENABLE_VAUX3_DEDICATED 0x03
++#define ENABLE_VAUX3_DEV_GRP 0x20
++
++#define ENABLE_VPLL2_DEDICATED 0x05
++#define ENABLE_VPLL2_DEV_GRP 0xE0
++#define TWL4030_VPLL2_DEV_GRP 0x33
++#define TWL4030_VPLL2_DEDICATED 0x36
++
++#define t2_out(c, r, v) twl4030_i2c_write_u8(c, r, v)
++
++static unsigned backlight_gpio;
++static unsigned enable_gpio;
++static int lcd_enabled;
++static int dvi_enabled;
++
++static void __init sdp3430_display_init(void)
++{
++ int r;
++
++ enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
++ backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
++
++ r = gpio_request(enable_gpio, "LCD reset");
++ if (r) {
++ printk(KERN_ERR "failed to get LCD reset GPIO\n");
++ goto err0;
++ }
++
++ r = gpio_request(backlight_gpio, "LCD Backlight");
++ if (r) {
++ printk(KERN_ERR "failed to get LCD backlight GPIO\n");
++ goto err1;
++ }
++
++ gpio_direction_output(enable_gpio, 0);
++ gpio_direction_output(backlight_gpio, 0);
++
++ return;
++err1:
++ gpio_free(enable_gpio);
++err0:
++ return;
++}
++
++
++static int sdp3430_panel_enable_lcd(struct omap_display *display)
++{
++ u8 ded_val, ded_reg;
++ u8 grp_val, grp_reg;
++
++ if (dvi_enabled) {
++ printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
++ return -EINVAL;
++ }
++
++ if (omap_rev() > OMAP3430_REV_ES1_0) {
++ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEDICATED,
++ TWL4030_VPLL2_DEDICATED);
++ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEV_GRP,
++ TWL4030_VPLL2_DEV_GRP);
++ }
++
++ ded_reg = TWL4030_VAUX3_DEDICATED;
++ ded_val = ENABLE_VAUX3_DEDICATED;
++ grp_reg = TWL4030_VAUX3_DEV_GRP;
++ grp_val = ENABLE_VAUX3_DEV_GRP;
++
++ gpio_direction_output(enable_gpio, 1);
++ gpio_direction_output(backlight_gpio, 1);
++
++ if (0 != t2_out(PM_RECEIVER, ded_val, ded_reg))
++ return -EIO;
++ if (0 != t2_out(PM_RECEIVER, grp_val, grp_reg))
++ return -EIO;
++
++ lcd_enabled = 1;
++
++ return 0;
++}
++
++static void sdp3430_panel_disable_lcd(struct omap_display *display)
++{
++ lcd_enabled = 0;
++
++ gpio_direction_output(enable_gpio, 0);
++ gpio_direction_output(backlight_gpio, 0);
++
++ if (omap_rev() > OMAP3430_REV_ES1_0) {
++ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEDICATED);
++ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEV_GRP);
++ mdelay(4);
++ }
++}
++
++static struct omap_display_data sdp3430_display_data = {
++ .type = OMAP_DISPLAY_TYPE_DPI,
++ .name = "lcd",
++ .panel_name = "sharp-ls037v7dw01",
++ .u.dpi.data_lines = 16,
++ .panel_enable = sdp3430_panel_enable_lcd,
++ .panel_disable = sdp3430_panel_disable_lcd,
++};
++
++static int sdp3430_panel_enable_dvi(struct omap_display *display)
++{
++ if (lcd_enabled) {
++ printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
++ return -EINVAL;
++ }
++
++ if (omap_rev() > OMAP3430_REV_ES1_0) {
++ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEDICATED,
++ TWL4030_VPLL2_DEDICATED);
++ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEV_GRP,
++ TWL4030_VPLL2_DEV_GRP);
++ }
++
++ dvi_enabled = 1;
++
++ return 0;
++}
++
++static void sdp3430_panel_disable_dvi(struct omap_display *display)
++{
++ dvi_enabled = 0;
++
++ if (omap_rev() > OMAP3430_REV_ES1_0) {
++ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEDICATED);
++ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEV_GRP);
++ mdelay(4);
++ }
++}
++
++
++static struct omap_display_data sdp3430_display_data_dvi = {
++ .type = OMAP_DISPLAY_TYPE_DPI,
++ .name = "dvi",
++ .panel_name = "panel-generic",
++ .u.dpi.data_lines = 24,
++ .panel_enable = sdp3430_panel_enable_dvi,
++ .panel_disable = sdp3430_panel_disable_dvi,
+ };
+
++static int sdp3430_panel_enable_tv(struct omap_display *display)
++{
++#define ENABLE_VDAC_DEDICATED 0x03
++#define ENABLE_VDAC_DEV_GRP 0x20
++
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
++ ENABLE_VDAC_DEDICATED,
++ TWL4030_VDAC_DEDICATED);
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
++ ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP);
++
++ return 0;
++}
++
++static void sdp3430_panel_disable_tv(struct omap_display *display)
++{
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
++ TWL4030_VDAC_DEDICATED);
++ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
++ TWL4030_VDAC_DEV_GRP);
++}
++
++static struct omap_display_data sdp3430_display_data_tv = {
++ .type = OMAP_DISPLAY_TYPE_VENC,
++ .name = "tv",
++ .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
++ .panel_enable = sdp3430_panel_enable_tv,
++ .panel_disable = sdp3430_panel_disable_tv,
++};
++
++static struct omap_dss_platform_data sdp3430_dss_data = {
++ .num_displays = 3,
++ .displays = {
++ &sdp3430_display_data,
++ &sdp3430_display_data_dvi,
++ &sdp3430_display_data_tv,
++ }
++};
++
++static struct platform_device sdp3430_dss_device = {
++ .name = "omap-dss",
++ .id = -1,
++ .dev = {
++ .platform_data = &sdp3430_dss_data,
++ },
++};
++
++
+ static struct platform_device *sdp3430_devices[] __initdata = {
+ &sdp3430_smc91x_device,
+- &sdp3430_lcd_device,
++ &sdp3430_dss_device,
+ };
+
+ static inline void __init sdp3430_init_smc91x(void)
+@@ -292,13 +493,8 @@ static struct omap_uart_config sdp3430_uart_config __initdata = {
+ .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+ };
+
+-static struct omap_lcd_config sdp3430_lcd_config __initdata = {
+- .ctrl_name = "internal",
+-};
+-
+ static struct omap_board_config_kernel sdp3430_config[] __initdata = {
+ { OMAP_TAG_UART, &sdp3430_uart_config },
+- { OMAP_TAG_LCD, &sdp3430_lcd_config },
+ };
+
+ static int sdp3430_batt_table[] = {
+@@ -481,6 +677,7 @@ static void __init omap_3430sdp_init(void)
+ usb_musb_init();
+ usb_ehci_init();
+ twl4030_mmc_init(mmc);
++ sdp3430_display_init();
+ }
+
+ static void __init omap_3430sdp_map_io(void)
+--
+1.5.6.3
+
-From 722267d4a82e6f502f08e252d12563f5ce07a744 Mon Sep 17 00:00:00 2001
+From 98b4c02ad7229074414bc51bae1452fe93ab5111 Mon Sep 17 00:00:00 2001
From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Fri, 14 Nov 2008 16:03:34 +0200
+Date: Mon, 5 Jan 2009 14:57:32 +0200
Subject: [PATCH] DSS: Support for OMAP3 EVM board
Coded by Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
---
- arch/arm/mach-omap2/board-omap3evm.c | 224 ++++++++++++++++++++++++++++++++--
- 1 files changed, 215 insertions(+), 9 deletions(-)
+ arch/arm/mach-omap2/board-omap3evm.c | 203 ++++++++++++++++++++++++++++++++-
+ 1 files changed, 196 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
-index e4e60e2..7756dd8 100644
+index e4e60e2..e7ec9e6 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
-@@ -36,6 +36,8 @@
+@@ -36,6 +36,7 @@
#include <mach/usb-ehci.h>
#include <mach/common.h>
#include <mach/mcspi.h>
-+#include <mach/omapfb.h>
+#include <mach/display.h>
#include "sdram-micron-mt46h32m32lf-6.h"
#include "twl4030-generic-scripts.h"
-@@ -159,14 +161,215 @@ static int __init omap3_evm_i2c_init(void)
- omap_register_i2c_bus(3, 400, NULL, 0);
+@@ -160,13 +161,201 @@ static int __init omap3_evm_i2c_init(void)
return 0;
}
-+static struct omap_fbmem_config evm_fbmem0_config = {
-+ .size = 480*720*4,
-+ .start = OMAPFB_MEMTYPE_SDRAM,
-+};
-static struct platform_device omap3_evm_lcd_device = {
- .name = "omap3evm_lcd",
- .id = -1,
-+static struct omap_fbmem_config evm_fbmem1_config = {
-+ .size = 480*720*4,
-+ .start = OMAPFB_MEMTYPE_SDRAM,
- };
-
--static struct omap_lcd_config omap3_evm_lcd_config __initdata = {
-- .ctrl_name = "internal",
-+static struct omap_fbmem_config evm_fbmem2_config = {
-+ .size = 480*720*4,
-+ .start = OMAPFB_MEMTYPE_SDRAM,
-+};
+#define LCD_PANEL_LR 2
+#define LCD_PANEL_UD 3
+#define LCD_PANEL_INI 152
+static int lcd_enabled;
+static int dvi_enabled;
+
-+static void __init evm_display_init(void)
++static void __init omap3_evm_display_init(void)
+{
+ int r;
+ r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr");
+
+}
+
-+static int evm_panel_enable_lcd(struct omap_display *display)
++static int omap3_evm_panel_enable_lcd(struct omap_display *display)
+{
+ if (dvi_enabled) {
+ printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
+ return 0;
+}
+
-+static void evm_panel_disable_lcd(struct omap_display *display)
++static void omap3_evm_panel_disable_lcd(struct omap_display *display)
+{
+ if (omap_rev() > OMAP3430_REV_ES1_0) {
+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0,
+ lcd_enabled = 0;
+}
+
-+static struct omap_display_data evm_display_data = {
++static struct omap_display_data omap3_evm_display_data = {
+ .type = OMAP_DISPLAY_TYPE_DPI,
+ .name = "lcd",
+ .panel_name = "sharp-ls037v7dw01",
+ .u.dpi.data_lines = 18,
-+ .panel_enable = evm_panel_enable_lcd,
-+ .panel_disable = evm_panel_disable_lcd,
-+};
-+
-+static int evm_panel_enable_tv(struct omap_display *display)
++ .panel_enable = omap3_evm_panel_enable_lcd,
++ .panel_disable = omap3_evm_panel_disable_lcd,
+ };
+
+-static struct omap_lcd_config omap3_evm_lcd_config __initdata = {
+- .ctrl_name = "internal",
++static int omap3_evm_panel_enable_tv(struct omap_display *display)
+{
+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+ ENABLE_VDAC_DEDICATED, TWL4030_VDAC_DEDICATED);
+ return 0;
+}
+
-+static void evm_panel_disable_tv(struct omap_display *display)
++static void omap3_evm_panel_disable_tv(struct omap_display *display)
+{
+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
+ TWL4030_VDAC_DEDICATED);
+ TWL4030_VDAC_DEV_GRP);
+}
+
-+static struct omap_display_data evm_display_data_tv = {
++static struct omap_display_data omap3_evm_display_data_tv = {
+ .type = OMAP_DISPLAY_TYPE_VENC,
+ .name = "tv",
+ .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
-+ .panel_enable = evm_panel_enable_tv,
-+ .panel_disable = evm_panel_disable_tv,
++ .panel_enable = omap3_evm_panel_enable_tv,
++ .panel_disable = omap3_evm_panel_disable_tv,
+};
+
+
-+static int evm_panel_enable_dvi(struct omap_display *display)
++static int omap3_evm_panel_enable_dvi(struct omap_display *display)
+{
+ if (lcd_enabled) {
+ printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
+ return 0;
+}
+
-+static void evm_panel_disable_dvi(struct omap_display *display)
++static void omap3_evm_panel_disable_dvi(struct omap_display *display)
+{
+ twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00,
+ TWL4030_GPIODATA_IN3);
+}
+
+
-+static struct omap_display_data evm_display_data_dvi = {
++static struct omap_display_data omap3_evm_display_data_dvi = {
+ .type = OMAP_DISPLAY_TYPE_DPI,
+ .name = "dvi",
-+ .panel_name = "panel-dvi",
++ .panel_name = "panel-generic",
+ .u.dpi.data_lines = 24,
-+ .panel_enable = evm_panel_enable_dvi,
-+ .panel_disable = evm_panel_disable_dvi,
++ .panel_enable = omap3_evm_panel_enable_dvi,
++ .panel_disable = omap3_evm_panel_disable_dvi,
+};
+
-+static struct omap_dss_platform_data evm_dss_data = {
++static struct omap_dss_platform_data omap3_evm_dss_data = {
+ .num_displays = 3,
+ .displays = {
-+ &evm_display_data,
-+ &evm_display_data_dvi,
-+ &evm_display_data_tv,
++ &omap3_evm_display_data,
++ &omap3_evm_display_data_dvi,
++ &omap3_evm_display_data_tv,
+ }
+};
-+static struct platform_device evm_dss_device = {
++static struct platform_device omap3_evm_dss_device = {
+ .name = "omap-dss",
+ .id = -1,
+ .dev = {
-+ .platform_data = &evm_dss_data,
++ .platform_data = &omap3_evm_dss_data,
+ },
};
static void ads7846_dev_init(void)
-@@ -225,11 +428,13 @@ static void __init omap3_evm_init_irq(void)
+@@ -225,11 +414,10 @@ static void __init omap3_evm_init_irq(void)
static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
{ OMAP_TAG_UART, &omap3_evm_uart_config },
- { OMAP_TAG_LCD, &omap3_evm_lcd_config },
-+ { OMAP_TAG_FBMEM, &evm_fbmem0_config },
-+ { OMAP_TAG_FBMEM, &evm_fbmem1_config },
-+ { OMAP_TAG_FBMEM, &evm_fbmem2_config },
};
static struct platform_device *omap3_evm_devices[] __initdata = {
- &omap3_evm_lcd_device,
-+ &evm_dss_device,
++ &omap3_evm_dss_device,
&omap3evm_smc911x_device,
};
-@@ -248,8 +453,6 @@ static void __init omap3_evm_init(void)
- omap3_evm_i2c_init();
-
- platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
-- omap_board_config = omap3_evm_config;
-- omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
-
- spi_register_board_info(omap3evm_spi_board_info,
- ARRAY_SIZE(omap3evm_spi_board_info));
-@@ -260,10 +463,13 @@ static void __init omap3_evm_init(void)
+@@ -260,6 +448,7 @@ static void __init omap3_evm_init(void)
usb_ehci_init();
omap3evm_flash_init();
ads7846_dev_init();
-+ evm_display_init();
++ omap3_evm_display_init();
}
static void __init omap3_evm_map_io(void)
- {
-+ omap_board_config = omap3_evm_config;
-+ omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
- omap2_set_globals_343x();
- omap2_map_common_io();
- }
--
1.5.6.3
+++ /dev/null
-From f0685afb06fbe2e00d75beb2c997f0367a0fe6ad Mon Sep 17 00:00:00 2001
-From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Mon, 29 Sep 2008 17:03:36 +0300
-Subject: [PATCH] DSS: support for Beagle Board
-
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
----
- arch/arm/mach-omap2/board-omap3beagle.c | 109 +++++++++++++++++++++++++++----
- 1 files changed, 95 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
-index fe97bab..f3ef73e 100644
---- a/arch/arm/mach-omap2/board-omap3beagle.c
-+++ b/arch/arm/mach-omap2/board-omap3beagle.c
-@@ -43,6 +43,8 @@
- #include <mach/gpmc.h>
- #include <mach/nand.h>
- #include <mach/mux.h>
-+#include <mach/omapfb.h>
-+#include <mach/display.h>
-
- #include "twl4030-generic-scripts.h"
- #include "mmc-twl4030.h"
-@@ -238,15 +240,6 @@ static void __init omap3_beagle_init_irq(void)
- omap_gpio_init();
- }
-
--static struct platform_device omap3_beagle_lcd_device = {
-- .name = "omap3beagle_lcd",
-- .id = -1,
--};
--
--static struct omap_lcd_config omap3_beagle_lcd_config __initdata = {
-- .ctrl_name = "internal",
--};
--
- static struct gpio_led gpio_leds[] = {
- {
- .name = "beagleboard::usr0",
-@@ -300,13 +293,94 @@ static struct platform_device keys_gpio = {
- },
- };
-
-+/* DSS */
-+
-+static int beagle_enable_dvi(struct omap_display *display)
-+{
-+ if (display->hw_config.panel_reset_gpio != -1)
-+ gpio_direction_output(display->hw_config.panel_reset_gpio, 1);
-+
-+ return 0;
-+}
-+
-+static void beagle_disable_dvi(struct omap_display *display)
-+{
-+ if (display->hw_config.panel_reset_gpio != -1)
-+ gpio_direction_output(display->hw_config.panel_reset_gpio, 0);
-+}
-+
-+static struct omap_display_data beagle_display_data_dvi = {
-+ .type = OMAP_DISPLAY_TYPE_DPI,
-+ .name = "dvi",
-+ .panel_name = "panel-dvi",
-+ .u.dpi.data_lines = 24,
-+ .panel_reset_gpio = 170,
-+ .panel_enable = beagle_enable_dvi,
-+ .panel_disable = beagle_disable_dvi,
-+};
-+
-+
-+static int beagle_panel_enable_tv(struct omap_display *display)
-+{
-+#define ENABLE_VDAC_DEDICATED 0x03
-+#define ENABLE_VDAC_DEV_GRP 0x20
-+
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
-+ ENABLE_VDAC_DEDICATED,
-+ TWL4030_VDAC_DEDICATED);
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
-+ ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP);
-+
-+ return 0;
-+}
-+
-+static void beagle_panel_disable_tv(struct omap_display *display)
-+{
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
-+ TWL4030_VDAC_DEDICATED);
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
-+ TWL4030_VDAC_DEV_GRP);
-+}
-+
-+static struct omap_display_data beagle_display_data_tv = {
-+ .type = OMAP_DISPLAY_TYPE_VENC,
-+ .name = "tv",
-+ .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
-+ .panel_enable = beagle_panel_enable_tv,
-+ .panel_disable = beagle_panel_disable_tv,
-+};
-+
-+static struct omap_dss_platform_data beagle_dss_data = {
-+ .num_displays = 2,
-+ .displays = {
-+ &beagle_display_data_dvi,
-+ &beagle_display_data_tv,
-+ }
-+};
-+
-+static struct platform_device beagle_dss_device = {
-+ .name = "omap-dss",
-+ .id = -1,
-+ .dev = {
-+ .platform_data = &beagle_dss_data,
-+ },
-+};
-+
-+static void __init beagle_display_init(void)
-+{
-+ int r;
-+
-+ r = gpio_request(beagle_display_data_dvi.panel_reset_gpio, "DVI reset");
-+ if (r < 0)
-+ printk(KERN_ERR "Unable to get DVI reset GPIO\n");
-+}
-+
- static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
- { OMAP_TAG_UART, &omap3_beagle_uart_config },
-- { OMAP_TAG_LCD, &omap3_beagle_lcd_config },
- };
-
- static struct platform_device *omap3_beagle_devices[] __initdata = {
-- &omap3_beagle_lcd_device,
-+ &beagle_dss_device,
- &leds_gpio,
- &keys_gpio,
- };
-@@ -359,18 +433,25 @@ static void __init omap3_beagle_init(void)
- omap_serial_init();
-
- omap_cfg_reg(J25_34XX_GPIO170);
-- gpio_request(170, "DVI_nPD");
-- /* REVISIT leave DVI powered down until it's needed ... */
-- gpio_direction_output(170, true);
-
- usb_musb_init();
- usb_ehci_init();
- omap3beagle_flash_init();
-+ beagle_display_init();
- }
-
-+static struct omap_fbmem_config omap3_beagle_vram_config[] = {
-+ {
-+ .size = 1280 * 1024 * 4 * 3,
-+ .start = OMAPFB_MEMTYPE_SDRAM,
-+ },
-+};
-+
- static void __init omap3_beagle_map_io(void)
- {
- omap2_set_globals_343x();
-+ omapfb_set_vram_config(omap3_beagle_vram_config,
-+ ARRAY_SIZE(omap3_beagle_vram_config));
- omap2_map_common_io();
- }
-
---
-1.5.6.3
-
+++ /dev/null
-From 285a7d392dcbc9b60c7523eb6f5c2b064cf52cc6 Mon Sep 17 00:00:00 2001
-From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Fri, 7 Nov 2008 16:54:01 +0200
-Subject: [PATCH] DSS: BEAGLE: Enable DSS in beagle defconfig
-
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
----
- arch/arm/configs/omap3_beagle_defconfig | 149 +++++++++++++++++++++----------
- 1 files changed, 102 insertions(+), 47 deletions(-)
-
-diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig
-index df67296..aa3ee12 100644
---- a/arch/arm/configs/omap3_beagle_defconfig
-+++ b/arch/arm/configs/omap3_beagle_defconfig
-@@ -1,7 +1,7 @@
- #
- # Automatically generated make config: don't edit
--# Linux kernel version: 2.6.27-omap1
--# Fri Oct 17 14:05:39 2008
-+# Linux kernel version: 2.6.28-rc4-omap1
-+# Thu Nov 13 15:51:03 2008
- #
- CONFIG_ARM=y
- CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-@@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
- # CONFIG_ARCH_HAS_ILOG2_U64 is not set
- CONFIG_GENERIC_HWEIGHT=y
- CONFIG_GENERIC_CALIBRATE_DELAY=y
--CONFIG_ARCH_SUPPORTS_AOUT=y
--CONFIG_ZONE_DMA=y
- CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
- CONFIG_VECTORS_BASE=0xffff0000
- CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-@@ -79,6 +77,7 @@ CONFIG_SIGNALFD=y
- CONFIG_TIMERFD=y
- CONFIG_EVENTFD=y
- CONFIG_SHMEM=y
-+CONFIG_AIO=y
- CONFIG_VM_EVENT_COUNTERS=y
- CONFIG_SLAB=y
- # CONFIG_SLUB is not set
-@@ -87,15 +86,9 @@ CONFIG_SLAB=y
- # CONFIG_MARKERS is not set
- CONFIG_HAVE_OPROFILE=y
- # CONFIG_KPROBES is not set
--# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
--# CONFIG_HAVE_IOREMAP_PROT is not set
- CONFIG_HAVE_KPROBES=y
- CONFIG_HAVE_KRETPROBES=y
--# CONFIG_HAVE_ARCH_TRACEHOOK is not set
--# CONFIG_HAVE_DMA_ATTRS is not set
--# CONFIG_USE_GENERIC_SMP_HELPERS is not set
- CONFIG_HAVE_CLK=y
--CONFIG_PROC_PAGE_MONITOR=y
- CONFIG_HAVE_GENERIC_DMA_COHERENT=y
- CONFIG_SLABINFO=y
- CONFIG_RT_MUTEXES=y
-@@ -128,6 +121,7 @@ CONFIG_DEFAULT_AS=y
- # CONFIG_DEFAULT_NOOP is not set
- CONFIG_DEFAULT_IOSCHED="anticipatory"
- CONFIG_CLASSIC_RCU=y
-+# CONFIG_FREEZER is not set
-
- #
- # System Type
-@@ -168,7 +162,7 @@ CONFIG_CLASSIC_RCU=y
- # CONFIG_ARCH_LH7A40X is not set
- # CONFIG_ARCH_DAVINCI is not set
- CONFIG_ARCH_OMAP=y
--# CONFIG_ARCH_MSM7X00A is not set
-+# CONFIG_ARCH_MSM is not set
-
- #
- # TI OMAP Implementations
-@@ -200,6 +194,14 @@ CONFIG_OMAP_DM_TIMER=y
- # CONFIG_OMAP_LL_DEBUG_UART1 is not set
- # CONFIG_OMAP_LL_DEBUG_UART2 is not set
- CONFIG_OMAP_LL_DEBUG_UART3=y
-+CONFIG_OMAP2_DSS=y
-+# CONFIG_OMAP2_DSS_DEBUG is not set
-+# CONFIG_OMAP2_DSS_RFBI is not set
-+CONFIG_OMAP2_DSS_VENC=y
-+# CONFIG_OMAP2_DSS_SDI is not set
-+# CONFIG_OMAP2_DSS_DSI is not set
-+# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
-+CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
- CONFIG_ARCH_OMAP34XX=y
- CONFIG_ARCH_OMAP3430=y
-
-@@ -211,6 +213,7 @@ CONFIG_ARCH_OMAP3430=y
- # CONFIG_MACH_OMAP3EVM is not set
- CONFIG_MACH_OMAP3_BEAGLE=y
- # CONFIG_MACH_OVERO is not set
-+# CONFIG_MACH_OMAP3_PANDORA is not set
- CONFIG_OMAP_TICK_GPTIMER=12
-
- #
-@@ -263,26 +266,30 @@ CONFIG_TICK_ONESHOT=y
- CONFIG_NO_HZ=y
- CONFIG_HIGH_RES_TIMERS=y
- CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-+CONFIG_VMSPLIT_3G=y
-+# CONFIG_VMSPLIT_2G is not set
-+# CONFIG_VMSPLIT_1G is not set
-+CONFIG_PAGE_OFFSET=0xC0000000
- # CONFIG_PREEMPT is not set
- CONFIG_HZ=128
- CONFIG_AEABI=y
- CONFIG_OABI_COMPAT=y
- CONFIG_ARCH_FLATMEM_HAS_HOLES=y
--# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
- CONFIG_SELECT_MEMORY_MODEL=y
- CONFIG_FLATMEM_MANUAL=y
- # CONFIG_DISCONTIGMEM_MANUAL is not set
- # CONFIG_SPARSEMEM_MANUAL is not set
- CONFIG_FLATMEM=y
- CONFIG_FLAT_NODE_MEM_MAP=y
--# CONFIG_SPARSEMEM_STATIC is not set
--# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
- CONFIG_PAGEFLAGS_EXTENDED=y
- CONFIG_SPLIT_PTLOCK_CPUS=4
- # CONFIG_RESOURCES_64BIT is not set
--CONFIG_ZONE_DMA_FLAG=1
--CONFIG_BOUNCE=y
-+# CONFIG_PHYS_ADDR_T_64BIT is not set
-+CONFIG_ZONE_DMA_FLAG=0
- CONFIG_VIRT_TO_BUS=y
-+CONFIG_UNEVICTABLE_LRU=y
- # CONFIG_LEDS is not set
- CONFIG_ALIGNMENT_TRAP=y
-
-@@ -296,9 +303,10 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.16
- # CONFIG_KEXEC is not set
-
- #
--# CPU Frequency scaling
-+# CPU Power Management
- #
- # CONFIG_CPU_FREQ is not set
-+# CONFIG_CPU_IDLE is not set
-
- #
- # Floating point emulation
-@@ -318,6 +326,8 @@ CONFIG_VFPv3=y
- # Userspace binary formats
- #
- CONFIG_BINFMT_ELF=y
-+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-+CONFIG_HAVE_AOUT=y
- # CONFIG_BINFMT_AOUT is not set
- CONFIG_BINFMT_MISC=y
-
-@@ -379,6 +389,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
- # CONFIG_TIPC is not set
- # CONFIG_ATM is not set
- # CONFIG_BRIDGE is not set
-+# CONFIG_NET_DSA is not set
- # CONFIG_VLAN_8021Q is not set
- # CONFIG_DECNET is not set
- # CONFIG_LLC2 is not set
-@@ -399,11 +410,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
- # CONFIG_IRDA is not set
- # CONFIG_BT is not set
- # CONFIG_AF_RXRPC is not set
--
--#
--# Wireless
--#
-+# CONFIG_PHONET is not set
-+CONFIG_WIRELESS=y
- # CONFIG_CFG80211 is not set
-+CONFIG_WIRELESS_OLD_REGULATORY=y
- # CONFIG_WIRELESS_EXT is not set
- # CONFIG_MAC80211 is not set
- # CONFIG_IEEE80211 is not set
-@@ -490,6 +500,7 @@ CONFIG_MTD_NAND=y
- # CONFIG_MTD_NAND_VERIFY_WRITE is not set
- # CONFIG_MTD_NAND_ECC_SMC is not set
- # CONFIG_MTD_NAND_MUSEUM_IDS is not set
-+# CONFIG_MTD_NAND_GPIO is not set
- CONFIG_MTD_NAND_OMAP2=y
- CONFIG_MTD_NAND_IDS=y
- # CONFIG_MTD_NAND_DISKONCHIP is not set
-@@ -743,6 +754,8 @@ CONFIG_GPIO_TWL4030=y
- # CONFIG_W1 is not set
- # CONFIG_POWER_SUPPLY is not set
- # CONFIG_HWMON is not set
-+# CONFIG_THERMAL is not set
-+# CONFIG_THERMAL_HWMON is not set
- # CONFIG_WATCHDOG is not set
-
- #
-@@ -760,10 +773,14 @@ CONFIG_SSB_POSSIBLE=y
- # CONFIG_HTC_EGPIO is not set
- # CONFIG_HTC_PASIC3 is not set
- CONFIG_TWL4030_CORE=y
-+# CONFIG_TWL4030_POWER is not set
- # CONFIG_MFD_TMIO is not set
- # CONFIG_MFD_T7L66XB is not set
- # CONFIG_MFD_TC6387XB is not set
- # CONFIG_MFD_TC6393XB is not set
-+# CONFIG_PMIC_DA903X is not set
-+# CONFIG_MFD_WM8400 is not set
-+# CONFIG_MFD_WM8350_I2C is not set
-
- #
- # Multimedia devices
-@@ -790,6 +807,7 @@ CONFIG_DAB=y
- CONFIG_FB=y
- # CONFIG_FIRMWARE_EDID is not set
- # CONFIG_FB_DDC is not set
-+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
- CONFIG_FB_CFB_FILLRECT=y
- CONFIG_FB_CFB_COPYAREA=y
- CONFIG_FB_CFB_IMAGEBLIT=y
-@@ -810,10 +828,22 @@ CONFIG_FB_CFB_IMAGEBLIT=y
- #
- # CONFIG_FB_S1D13XXX is not set
- # CONFIG_FB_VIRTUAL is not set
--CONFIG_FB_OMAP=y
--# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set
--# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
--CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=4
-+# CONFIG_FB_METRONOME is not set
-+# CONFIG_FB_MB862XX is not set
-+CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=14
-+CONFIG_FB_OMAP2=y
-+# CONFIG_FB_OMAP2_DEBUG is not set
-+# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set
-+
-+#
-+# OMAP2/3 Display Device Drivers
-+#
-+CONFIG_PANEL_DVI=y
-+# CONFIG_PANEL_DVI_LOWLOWRES is not set
-+# CONFIG_PANEL_DVI_LOWRES is not set
-+CONFIG_PANEL_DVI_HIGHRES=y
-+# CONFIG_PANEL_DVI_VERYHIGHRES is not set
-+# CONFIG_PANEL_SDP3430 is not set
- # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
- #
-@@ -862,6 +892,8 @@ CONFIG_USB_OTG=y
- # CONFIG_USB_OTG_WHITELIST is not set
- # CONFIG_USB_OTG_BLACKLIST_HUB is not set
- CONFIG_USB_MON=y
-+# CONFIG_USB_WUSB is not set
-+# CONFIG_USB_WUSB_CBAF is not set
-
- #
- # USB Host Controller Drivers
-@@ -873,6 +905,7 @@ CONFIG_USB_MON=y
- # CONFIG_USB_OHCI_HCD is not set
- # CONFIG_USB_SL811_HCD is not set
- # CONFIG_USB_R8A66597_HCD is not set
-+# CONFIG_USB_HWA_HCD is not set
- CONFIG_USB_MUSB_HDRC=y
- CONFIG_USB_MUSB_SOC=y
-
-@@ -895,6 +928,7 @@ CONFIG_USB_INVENTRA_DMA=y
- # CONFIG_USB_ACM is not set
- # CONFIG_USB_PRINTER is not set
- # CONFIG_USB_WDM is not set
-+# CONFIG_USB_TMC is not set
-
- #
- # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-@@ -923,6 +957,7 @@ CONFIG_USB_INVENTRA_DMA=y
- # CONFIG_USB_EMI62 is not set
- # CONFIG_USB_EMI26 is not set
- # CONFIG_USB_ADUTUX is not set
-+# CONFIG_USB_SEVSEG is not set
- # CONFIG_USB_RIO500 is not set
- # CONFIG_USB_LEGOTOWER is not set
- # CONFIG_USB_LCD is not set
-@@ -939,22 +974,25 @@ CONFIG_USB_INVENTRA_DMA=y
- # CONFIG_USB_IOWARRIOR is not set
- # CONFIG_USB_TEST is not set
- # CONFIG_USB_ISIGHTFW is not set
-+# CONFIG_USB_VST is not set
- CONFIG_USB_GADGET=y
- # CONFIG_USB_GADGET_DEBUG is not set
- # CONFIG_USB_GADGET_DEBUG_FILES is not set
-+CONFIG_USB_GADGET_VBUS_DRAW=2
- CONFIG_USB_GADGET_SELECTED=y
--# CONFIG_USB_GADGET_AMD5536UDC is not set
-+# CONFIG_USB_GADGET_AT91 is not set
- # CONFIG_USB_GADGET_ATMEL_USBA is not set
- # CONFIG_USB_GADGET_FSL_USB2 is not set
--# CONFIG_USB_GADGET_NET2280 is not set
--# CONFIG_USB_GADGET_PXA25X is not set
--# CONFIG_USB_GADGET_M66592 is not set
--# CONFIG_USB_GADGET_PXA27X is not set
--# CONFIG_USB_GADGET_GOKU is not set
- # CONFIG_USB_GADGET_LH7A40X is not set
- # CONFIG_USB_GADGET_OMAP is not set
-+# CONFIG_USB_GADGET_PXA25X is not set
-+# CONFIG_USB_GADGET_PXA27X is not set
- # CONFIG_USB_GADGET_S3C2410 is not set
--# CONFIG_USB_GADGET_AT91 is not set
-+# CONFIG_USB_GADGET_M66592 is not set
-+# CONFIG_USB_GADGET_AMD5536UDC is not set
-+# CONFIG_USB_GADGET_FSL_QE is not set
-+# CONFIG_USB_GADGET_NET2280 is not set
-+# CONFIG_USB_GADGET_GOKU is not set
- # CONFIG_USB_GADGET_DUMMY_HCD is not set
- CONFIG_USB_GADGET_DUALSPEED=y
- # CONFIG_USB_ZERO is not set
-@@ -971,7 +1009,7 @@ CONFIG_MMC=y
- # CONFIG_MMC_UNSAFE_RESUME is not set
-
- #
--# MMC/SD Card Drivers
-+# MMC/SD/SDIO Card Drivers
- #
- CONFIG_MMC_BLOCK=y
- CONFIG_MMC_BLOCK_BOUNCE=y
-@@ -979,10 +1017,12 @@ CONFIG_MMC_BLOCK_BOUNCE=y
- # CONFIG_MMC_TEST is not set
-
- #
--# MMC/SD Host Controller Drivers
-+# MMC/SD/SDIO Host Controller Drivers
- #
- # CONFIG_MMC_SDHCI is not set
- CONFIG_MMC_OMAP_HS=y
-+# CONFIG_MEMSTICK is not set
-+# CONFIG_ACCESSIBILITY is not set
- # CONFIG_NEW_LEDS is not set
- CONFIG_RTC_LIB=y
- CONFIG_RTC_CLASS=y
-@@ -1024,26 +1064,22 @@ CONFIG_RTC_DRV_TWL4030=y
- # Platform RTC drivers
- #
- # CONFIG_RTC_DRV_CMOS is not set
-+# CONFIG_RTC_DRV_DS1286 is not set
- # CONFIG_RTC_DRV_DS1511 is not set
- # CONFIG_RTC_DRV_DS1553 is not set
- # CONFIG_RTC_DRV_DS1742 is not set
- # CONFIG_RTC_DRV_STK17TA8 is not set
- # CONFIG_RTC_DRV_M48T86 is not set
-+# CONFIG_RTC_DRV_M48T35 is not set
- # CONFIG_RTC_DRV_M48T59 is not set
-+# CONFIG_RTC_DRV_BQ4802 is not set
- # CONFIG_RTC_DRV_V3020 is not set
-
- #
- # on-CPU RTC drivers
- #
- # CONFIG_DMADEVICES is not set
--
--#
--# Voltage and Current regulators
--#
- # CONFIG_REGULATOR is not set
--# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
--# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
--# CONFIG_REGULATOR_BQ24022 is not set
- # CONFIG_UIO is not set
-
- #
-@@ -1059,11 +1095,12 @@ CONFIG_EXT2_FS=y
- # CONFIG_EXT2_FS_XIP is not set
- CONFIG_EXT3_FS=y
- # CONFIG_EXT3_FS_XATTR is not set
--# CONFIG_EXT4DEV_FS is not set
-+# CONFIG_EXT4_FS is not set
- CONFIG_JBD=y
- # CONFIG_REISERFS_FS is not set
- # CONFIG_JFS_FS is not set
- # CONFIG_FS_POSIX_ACL is not set
-+CONFIG_FILE_LOCKING=y
- # CONFIG_XFS_FS is not set
- # CONFIG_OCFS2_FS is not set
- CONFIG_DNOTIFY=y
-@@ -1100,6 +1137,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
- #
- CONFIG_PROC_FS=y
- CONFIG_PROC_SYSCTL=y
-+CONFIG_PROC_PAGE_MONITOR=y
- CONFIG_SYSFS=y
- CONFIG_TMPFS=y
- # CONFIG_TMPFS_POSIX_ACL is not set
-@@ -1148,6 +1186,7 @@ CONFIG_LOCKD_V4=y
- CONFIG_NFS_COMMON=y
- CONFIG_SUNRPC=y
- CONFIG_SUNRPC_GSS=y
-+# CONFIG_SUNRPC_REGISTER_V4 is not set
- CONFIG_RPCSEC_GSS_KRB5=y
- # CONFIG_RPCSEC_GSS_SPKM3 is not set
- # CONFIG_SMB_FS is not set
-@@ -1260,15 +1299,23 @@ CONFIG_DEBUG_INFO=y
- CONFIG_FRAME_POINTER=y
- # CONFIG_BOOT_PRINTK_DELAY is not set
- # CONFIG_RCU_TORTURE_TEST is not set
-+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
- # CONFIG_BACKTRACE_SELF_TEST is not set
-+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
- # CONFIG_FAULT_INJECTION is not set
- # CONFIG_LATENCYTOP is not set
--CONFIG_HAVE_FTRACE=y
--CONFIG_HAVE_DYNAMIC_FTRACE=y
--# CONFIG_FTRACE is not set
-+CONFIG_HAVE_FUNCTION_TRACER=y
-+
-+#
-+# Tracers
-+#
-+# CONFIG_FUNCTION_TRACER is not set
- # CONFIG_IRQSOFF_TRACER is not set
- # CONFIG_SCHED_TRACER is not set
- # CONFIG_CONTEXT_SWITCH_TRACER is not set
-+# CONFIG_BOOT_TRACER is not set
-+# CONFIG_STACK_TRACER is not set
-+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
- # CONFIG_SAMPLES is not set
- CONFIG_HAVE_ARCH_KGDB=y
- # CONFIG_KGDB is not set
-@@ -1282,14 +1329,19 @@ CONFIG_HAVE_ARCH_KGDB=y
- #
- # CONFIG_KEYS is not set
- # CONFIG_SECURITY is not set
-+# CONFIG_SECURITYFS is not set
- # CONFIG_SECURITY_FILE_CAPABILITIES is not set
- CONFIG_CRYPTO=y
-
- #
- # Crypto core or helper
- #
-+# CONFIG_CRYPTO_FIPS is not set
- CONFIG_CRYPTO_ALGAPI=y
-+CONFIG_CRYPTO_AEAD=y
- CONFIG_CRYPTO_BLKCIPHER=y
-+CONFIG_CRYPTO_HASH=y
-+CONFIG_CRYPTO_RNG=y
- CONFIG_CRYPTO_MANAGER=y
- # CONFIG_CRYPTO_GF128MUL is not set
- # CONFIG_CRYPTO_NULL is not set
-@@ -1362,14 +1414,17 @@ CONFIG_CRYPTO_DES=y
- #
- # CONFIG_CRYPTO_DEFLATE is not set
- # CONFIG_CRYPTO_LZO is not set
-+
-+#
-+# Random Number Generation
-+#
-+# CONFIG_CRYPTO_ANSI_CPRNG is not set
- CONFIG_CRYPTO_HW=y
-
- #
- # Library routines
- #
- CONFIG_BITREVERSE=y
--# CONFIG_GENERIC_FIND_FIRST_BIT is not set
--# CONFIG_GENERIC_FIND_NEXT_BIT is not set
- CONFIG_CRC_CCITT=y
- # CONFIG_CRC16 is not set
- # CONFIG_CRC_T10DIF is not set
---
-1.5.6.3
-
--- /dev/null
+From a36dfe9ce6faa6a13bb82b3039856d8aa1528dc2 Mon Sep 17 00:00:00 2001
+From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
+Date: Thu, 18 Dec 2008 15:37:42 +0200
+Subject: [PATCH] DSS: Hacked N810 support
+
+---
+ arch/arm/mach-omap2/board-n800.c | 214 ++++++++++++++---
+ drivers/video/omap2/Kconfig | 10 +
+ drivers/video/omap2/Makefile | 3 +
+ drivers/video/omap2/ctrl-blizzard.c | 279 ++++++++++++++++++++++
+ drivers/video/omap2/panel-n800.c | 437 +++++++++++++++++++++++++++++++++++
+ 5 files changed, 905 insertions(+), 38 deletions(-)
+ create mode 100644 drivers/video/omap2/ctrl-blizzard.c
+ create mode 100644 drivers/video/omap2/panel-n800.c
+
+diff --git a/arch/arm/mach-omap2/board-n800.c b/arch/arm/mach-omap2/board-n800.c
+index b38b295..ffa5aad 100644
+--- a/arch/arm/mach-omap2/board-n800.c
++++ b/arch/arm/mach-omap2/board-n800.c
+@@ -40,6 +40,7 @@
+ #include <mach/gpio-switch.h>
+ #include <mach/omapfb.h>
+ #include <mach/blizzard.h>
++#include <mach/display.h>
+
+ #include <../drivers/cbus/tahvo.h>
+ #include <../drivers/media/video/tcm825x.h>
+@@ -156,23 +157,175 @@ static struct omap_uart_config n800_uart_config __initdata = {
+
+ #include "../../../drivers/cbus/retu.h"
+
+-static struct omap_fbmem_config n800_fbmem0_config __initdata = {
+- .size = 752 * 1024,
++static struct omap_tmp105_config n800_tmp105_config __initdata = {
++ .tmp105_irq_pin = 125,
++ .set_power = n800_tmp105_set_power,
+ };
+
+-static struct omap_fbmem_config n800_fbmem1_config __initdata = {
+- .size = 752 * 1024,
+-};
+
+-static struct omap_fbmem_config n800_fbmem2_config __initdata = {
+- .size = 752 * 1024,
++
++
++/* DISPLAY */
++static struct {
++ struct clk *sys_ck;
++} blizzard;
++
++static int blizzard_get_clocks(void)
++{
++ blizzard.sys_ck = clk_get(0, "osc_ck");
++ if (IS_ERR(blizzard.sys_ck)) {
++ printk(KERN_ERR "can't get Blizzard clock\n");
++ return PTR_ERR(blizzard.sys_ck);
++ }
++ return 0;
++}
++
++static unsigned long blizzard_get_clock_rate(void)
++{
++ return clk_get_rate(blizzard.sys_ck);
++}
++
++static int n800_pn800_enable(struct omap_display *display)
++{
++ if (display->hw_config.panel_reset_gpio != -1) {
++ printk("enabling panel gpio\n");
++ gpio_direction_output(display->hw_config.panel_reset_gpio, 1);
++ }
++
++ return 0;
++}
++
++static void n800_pn800_disable(struct omap_display *display)
++{
++ if (display->hw_config.panel_reset_gpio != -1) {
++ printk("disabling panel gpio\n");
++ gpio_direction_output(display->hw_config.panel_reset_gpio, 0);
++ msleep(120);
++ }
++}
++
++static int n800_blizzard_enable(struct omap_display *display)
++{
++ printk("enabling bliz powers\n");
++
++ /* Vcore to 1.475V */
++ tahvo_set_clear_reg_bits(0x07, 0, 0xf);
++ msleep(10);
++
++ clk_enable(blizzard.sys_ck);
++
++ if (display->hw_config.ctrl_reset_gpio != -1)
++ gpio_direction_output(display->hw_config.ctrl_reset_gpio, 1);
++
++ printk("osc_ck %lu\n", blizzard_get_clock_rate());
++
++ return 0;
++}
++
++static void n800_blizzard_disable(struct omap_display *display)
++{
++ printk("disabling bliz powers\n");
++
++ if (display->hw_config.ctrl_reset_gpio != -1)
++ gpio_direction_output(display->hw_config.ctrl_reset_gpio, 0);
++
++ clk_disable(blizzard.sys_ck);
++
++ /* Vcore to 1.005V */
++ tahvo_set_clear_reg_bits(0x07, 0xf, 0);
++}
++
++static int n800_set_backlight_level(struct omap_display *display, int level)
++{
++ return 0;
++}
++
++static struct omap_display_data n800_dsi_display_data = {
++ .type = OMAP_DISPLAY_TYPE_DBI,
++ .name = "lcd",
++ .ctrl_name = "ctrl-blizzard",
++ .panel_name = "panel-pn800",
++ .panel_reset_gpio = -1,
++ .ctrl_reset_gpio = N800_BLIZZARD_POWERDOWN_GPIO,
++ .panel_enable = n800_pn800_enable,
++ .panel_disable = n800_pn800_disable,
++ .ctrl_enable = n800_blizzard_enable,
++ .ctrl_disable = n800_blizzard_disable,
++ .set_backlight = n800_set_backlight_level,
++ .u.rfbi = {
++ .channel = 0,
++ /* 8 for cmd mode, 16 for pixel data. ctrl-blizzard handles switching */
++ .data_lines = 8,
++ },
++ .priv = 0, // XXX used for panel datalines
++};
++static struct omap_dss_platform_data n800_dss_data = {
++ .num_displays = 1,
++ .displays = {
++ &n800_dsi_display_data,
++ },
+ };
+
+-static struct omap_tmp105_config n800_tmp105_config __initdata = {
+- .tmp105_irq_pin = 125,
+- .set_power = n800_tmp105_set_power,
++static struct platform_device n800_dss_device = {
++ .name = "omap-dss",
++ .id = -1,
++ .dev = {
++ .platform_data = &n800_dss_data,
++ },
+ };
+
++static void __init n800_display_init(void)
++{
++ int r;
++ const struct omap_lcd_config *conf;
++
++ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
++ if (conf != NULL) {
++ n800_dsi_display_data.panel_reset_gpio = conf->nreset_gpio;
++ n800_dsi_display_data.priv = (void*)(u32)conf->data_lines; // XXX
++ //printk("\n\nTULI %d\n\n", conf->data_lines);
++ } else {
++ printk("\n\nEI TULLU MIOTÄÄÄ\n\n");
++ }
++
++ blizzard_get_clocks();
++ clk_enable(blizzard.sys_ck); // XXX always enable
++
++ //omapfb_set_ctrl_platform_data(&n800_blizzard_data);
++ //
++ if (n800_dsi_display_data.ctrl_reset_gpio != -1) {
++ r = gpio_request(n800_dsi_display_data.ctrl_reset_gpio,
++ "Blizzard pd");
++ if (r < 0) {
++ n800_dsi_display_data.ctrl_reset_gpio = -1;
++ printk(KERN_ERR "Unable to get Blizzard GPIO\n");
++ } else {
++ gpio_direction_output(n800_dsi_display_data.ctrl_reset_gpio,
++ 1);
++ // XXX always enable
++ }
++ }
++
++ if (n800_dsi_display_data.panel_reset_gpio != -1) {
++ r = gpio_request(n800_dsi_display_data.panel_reset_gpio,
++ "panel reset");
++ if (r < 0) {
++ n800_dsi_display_data.panel_reset_gpio = -1;
++ printk(KERN_ERR "Unable to get pn800 GPIO\n");
++ } else {
++ gpio_direction_output(n800_dsi_display_data.panel_reset_gpio,
++ 1);
++ // XXX always enable
++ }
++ }
++}
++
++/* DISPLAY END */
++
++
++
++
++
+ static void mipid_shutdown(struct mipid_platform_data *pdata)
+ {
+ if (pdata->nreset_gpio != -1) {
+@@ -186,6 +339,7 @@ static struct mipid_platform_data n800_mipid_platform_data = {
+ .shutdown = mipid_shutdown,
+ };
+
++#if 0
+ static void __init mipid_dev_init(void)
+ {
+ const struct omap_lcd_config *conf;
+@@ -196,26 +350,9 @@ static void __init mipid_dev_init(void)
+ n800_mipid_platform_data.data_lines = conf->data_lines;
+ }
+ }
++#endif
+
+-static struct {
+- struct clk *sys_ck;
+-} blizzard;
+-
+-static int blizzard_get_clocks(void)
+-{
+- blizzard.sys_ck = clk_get(0, "osc_ck");
+- if (IS_ERR(blizzard.sys_ck)) {
+- printk(KERN_ERR "can't get Blizzard clock\n");
+- return PTR_ERR(blizzard.sys_ck);
+- }
+- return 0;
+-}
+-
+-static unsigned long blizzard_get_clock_rate(struct device *dev)
+-{
+- return clk_get_rate(blizzard.sys_ck);
+-}
+-
++#if 0
+ static void blizzard_enable_clocks(int enable)
+ {
+ if (enable)
+@@ -260,14 +397,12 @@ static void __init blizzard_dev_init(void)
+ gpio_direction_output(N800_BLIZZARD_POWERDOWN_GPIO, 1);
+
+ blizzard_get_clocks();
+- omapfb_set_ctrl_platform_data(&n800_blizzard_data);
++ //omapfb_set_ctrl_platform_data(&n800_blizzard_data);
+ }
++#endif
+
+ static struct omap_board_config_kernel n800_config[] __initdata = {
+ { OMAP_TAG_UART, &n800_uart_config },
+- { OMAP_TAG_FBMEM, &n800_fbmem0_config },
+- { OMAP_TAG_FBMEM, &n800_fbmem1_config },
+- { OMAP_TAG_FBMEM, &n800_fbmem2_config },
+ { OMAP_TAG_TMP105, &n800_tmp105_config },
+ };
+
+@@ -374,7 +509,7 @@ static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
+
+ static struct spi_board_info n800_spi_board_info[] __initdata = {
+ {
+- .modalias = "lcd_mipid",
++ .modalias = "panel-n800",
+ .bus_num = 1,
+ .chip_select = 1,
+ .max_speed_hz = 4000000,
+@@ -399,7 +534,7 @@ static struct spi_board_info n800_spi_board_info[] __initdata = {
+
+ static struct spi_board_info n810_spi_board_info[] __initdata = {
+ {
+- .modalias = "lcd_mipid",
++ .modalias = "panel-n800",
+ .bus_num = 1,
+ .chip_select = 1,
+ .max_speed_hz = 4000000,
+@@ -567,6 +702,7 @@ static struct platform_device *n800_devices[] __initdata = {
+ #if defined(CONFIG_CBUS_RETU) && defined(CONFIG_LEDS_OMAP_PWM)
+ &n800_keypad_led_device,
+ #endif
++ &n800_dss_device,
+ };
+
+ #ifdef CONFIG_MENELAUS
+@@ -689,9 +825,10 @@ void __init nokia_n800_common_init(void)
+ if (machine_is_nokia_n810())
+ i2c_register_board_info(2, n810_i2c_board_info_2,
+ ARRAY_SIZE(n810_i2c_board_info_2));
+-
+- mipid_dev_init();
+- blizzard_dev_init();
++
++ //mipid_dev_init();
++ //blizzard_dev_init();
++ n800_display_init();
+ }
+
+ static void __init nokia_n800_init(void)
+@@ -712,6 +849,7 @@ void __init nokia_n800_map_io(void)
+ omap_board_config_size = ARRAY_SIZE(n800_config);
+
+ omap2_set_globals_242x();
++ omap2_set_sdram_vram(800 * 480 * 2 * 3, 0);
+ omap2_map_common_io();
+ }
+
+diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig
+index b54c955..4e9211e 100644
+--- a/drivers/video/omap2/Kconfig
++++ b/drivers/video/omap2/Kconfig
+@@ -49,4 +49,14 @@ config PANEL_SHARP_LS037V7DW01
+ help
+ LCD Panel used in TI's SDP3430 and EVM boards
+
++config PANEL_N800
++ tristate "panel n800"
++ help
++ N800 LCD
++
++config CTRL_BLIZZARD
++ tristate "blizzard ctrl"
++ help
++ Blizzard Ctrl
++
+ endmenu
+diff --git a/drivers/video/omap2/Makefile b/drivers/video/omap2/Makefile
+index fe6858e..7727f9c 100644
+--- a/drivers/video/omap2/Makefile
++++ b/drivers/video/omap2/Makefile
+@@ -3,3 +3,6 @@ omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o
+
+ obj-$(CONFIG_PANEL_GENERIC) += panel-generic.o
+ obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
++
++obj-$(CONFIG_CTRL_BLIZZARD) += ctrl-blizzard.o
++obj-$(CONFIG_PANEL_N800) += panel-n800.o
+diff --git a/drivers/video/omap2/ctrl-blizzard.c b/drivers/video/omap2/ctrl-blizzard.c
+new file mode 100644
+index 0000000..e1e5569
+--- /dev/null
++++ b/drivers/video/omap2/ctrl-blizzard.c
+@@ -0,0 +1,279 @@
++
++//#define DEBUG
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/err.h>
++
++#include <mach/display.h>
++#include <mach/dma.h>
++
++#ifdef DEBUG
++#define DBG(format, ...) printk(KERN_DEBUG "Blizzard: " format, ## __VA_ARGS__)
++#else
++#define DBG(format, ...)
++#endif
++
++#define BLIZZARD_REV_CODE 0x00
++#define BLIZZARD_CONFIG 0x02
++#define BLIZZARD_PLL_DIV 0x04
++#define BLIZZARD_PLL_LOCK_RANGE 0x06
++#define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
++#define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
++#define BLIZZARD_PLL_MODE 0x0c
++#define BLIZZARD_CLK_SRC 0x0e
++#define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
++#define BLIZZARD_MEM_BANK0_STATUS 0x14
++#define BLIZZARD_PANEL_CONFIGURATION 0x28
++#define BLIZZARD_HDISP 0x2a
++#define BLIZZARD_HNDP 0x2c
++#define BLIZZARD_VDISP0 0x2e
++#define BLIZZARD_VDISP1 0x30
++#define BLIZZARD_VNDP 0x32
++#define BLIZZARD_HSW 0x34
++#define BLIZZARD_VSW 0x38
++#define BLIZZARD_DISPLAY_MODE 0x68
++#define BLIZZARD_INPUT_WIN_X_START_0 0x6c
++#define BLIZZARD_DATA_SOURCE_SELECT 0x8e
++#define BLIZZARD_DISP_MEM_DATA_PORT 0x90
++#define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
++#define BLIZZARD_POWER_SAVE 0xE6
++#define BLIZZARD_NDISP_CTRL_STATUS 0xE8
++
++/* Data source select */
++/* For S1D13745 */
++#define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
++#define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
++#define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04
++#define BLIZZARD_SRC_DISABLE_OVERLAY 0x05
++/* For S1D13744 */
++#define BLIZZARD_SRC_WRITE_LCD 0x00
++#define BLIZZARD_SRC_BLT_LCD 0x06
++
++#define BLIZZARD_COLOR_RGB565 0x01
++#define BLIZZARD_COLOR_YUV420 0x09
++
++#define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
++#define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
++
++#define BLIZZARD_AUTO_UPDATE_TIME (HZ / 20)
++
++
++
++static struct {
++ int version;
++} blizzard;
++
++
++static inline void blizzard_cmd(u8 cmd)
++{
++ omap_rfbi_write_command(&cmd, 1);
++}
++
++static inline void blizzard_write(u8 cmd, const u8 *buf, int len)
++{
++ omap_rfbi_write_command(&cmd, 1);
++ omap_rfbi_write_data(buf, len);
++}
++
++static inline void blizzard_read(u8 cmd, u8 *buf, int len)
++{
++ omap_rfbi_write_command(&cmd, 1);
++ omap_rfbi_read_data(buf, len);
++}
++
++static u8 blizzard_read_reg(u8 cmd)
++{
++ u8 data;
++ blizzard_read(cmd, &data, 1);
++ return data;
++}
++
++static int blizzard_ctrl_init(struct omap_display *display)
++{
++ DBG("blizzard_ctrl_init\n");
++
++ return 0;
++}
++
++
++static int blizzard_ctrl_enable(struct omap_display *display)
++{
++ int r = 0;
++ u8 rev, conf;
++
++ DBG("blizzard_ctrl_enable\n");
++
++ if (display->hw_config.ctrl_enable) {
++ r = display->hw_config.ctrl_enable(display);
++ if (r)
++ return r;
++ }
++
++ msleep(100);
++
++ rev = blizzard_read_reg(BLIZZARD_CLK_SRC);
++ printk("CLK_SRC %x\n", rev);
++
++ rev = blizzard_read_reg(BLIZZARD_PLL_DIV);
++ printk("PLLDIV %x\n", rev);
++
++ rev = blizzard_read_reg(BLIZZARD_REV_CODE);
++ conf = blizzard_read_reg(BLIZZARD_CONFIG);
++
++ printk("rev %x, conf %x\n", rev, conf);
++
++ switch (rev & 0xfc) {
++ case 0x9c:
++ blizzard.version = BLIZZARD_VERSION_S1D13744;
++ pr_info("omapfb: s1d13744 LCD controller rev %d "
++ "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
++ break;
++ case 0xa4:
++ blizzard.version = BLIZZARD_VERSION_S1D13745;
++ pr_info("omapfb: s1d13745 LCD controller rev %d "
++ "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
++ break;
++ default:
++ printk("invalid s1d1374x revision %02x\n",
++ rev);
++ r = -ENODEV;
++ }
++
++ return r;
++}
++
++static void blizzard_ctrl_disable(struct omap_display *display)
++{
++ DBG("blizzard_ctrl_disable\n");
++
++ if (display->hw_config.ctrl_disable)
++ display->hw_config.ctrl_disable(display);
++}
++
++int rfbi_configure(int rfbi_module, int bpp, int lines);
++
++static void blizzard_ctrl_setup_update(struct omap_display *display,
++ int x, int y, int w, int h)
++{
++ u8 tmp[18];
++ int x_end, y_end;
++
++ DBG("blizzard_ctrl_setup_update\n");
++
++ x_end = x + w - 1;
++ y_end = y + h - 1;
++
++ tmp[0] = x;
++ tmp[1] = x >> 8;
++ tmp[2] = y;
++ tmp[3] = y >> 8;
++ tmp[4] = x_end;
++ tmp[5] = x_end >> 8;
++ tmp[6] = y_end;
++ tmp[7] = y_end >> 8;
++
++ /* scaling? */
++ tmp[8] = x;
++ tmp[9] = x >> 8;
++ tmp[10] = y;
++ tmp[11] = y >> 8;
++ tmp[12] = x_end;
++ tmp[13] = x_end >> 8;
++ tmp[14] = y_end;
++ tmp[15] = y_end >> 8;
++
++ tmp[16] = BLIZZARD_COLOR_RGB565; //color_mode;
++
++ if (blizzard.version == BLIZZARD_VERSION_S1D13745)
++ tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
++ else
++ tmp[17] = blizzard.version == BLIZZARD_VERSION_S1D13744 ?
++ BLIZZARD_SRC_WRITE_LCD :
++ BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
++
++ rfbi_configure(display->hw_config.u.rfbi.channel,
++ 16,
++ 8);
++
++ blizzard_write(BLIZZARD_INPUT_WIN_X_START_0, tmp, 18);
++
++ rfbi_configure(display->hw_config.u.rfbi.channel,
++ 16,
++ 16);
++}
++
++static int blizzard_ctrl_enable_te(struct omap_display *display, int enable)
++{
++ return 0;
++}
++
++static int blizzard_ctrl_rotate(struct omap_display *display, int rotate)
++{
++ return 0;
++}
++
++static int blizzard_ctrl_mirror(struct omap_display *display, int enable)
++{
++ return 0;
++}
++
++static int blizzard_run_test(struct omap_display *display, int test_num)
++{
++ return 0;
++}
++
++static struct omap_ctrl blizzard_ctrl = {
++ .owner = THIS_MODULE,
++ .name = "ctrl-blizzard",
++ .init = blizzard_ctrl_init,
++ .enable = blizzard_ctrl_enable,
++ .disable = blizzard_ctrl_disable,
++ .setup_update = blizzard_ctrl_setup_update,
++ .enable_te = blizzard_ctrl_enable_te,
++ .rotate = blizzard_ctrl_rotate,
++ .mirror = blizzard_ctrl_mirror,
++ .run_test = blizzard_run_test,
++ .pixel_size = 16,
++
++ .timings = {
++ .cs_on_time = 0,
++
++ .we_on_time = 9000,
++ .we_off_time = 18000,
++ .we_cycle_time = 36000,
++
++ .re_on_time = 9000,
++ .re_off_time = 27000,
++ .re_cycle_time = 36000,
++
++ .access_time = 27000,
++ .cs_off_time = 36000,
++
++ .cs_pulse_width = 0,
++ },
++};
++
++
++static int __init blizzard_init(void)
++{
++ DBG("blizzard_init\n");
++ omap_dss_register_ctrl(&blizzard_ctrl);
++ return 0;
++}
++
++static void __exit blizzard_exit(void)
++{
++ DBG("blizzard_exit\n");
++
++ omap_dss_unregister_ctrl(&blizzard_ctrl);
++}
++
++module_init(blizzard_init);
++module_exit(blizzard_exit);
++
++MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>");
++MODULE_DESCRIPTION("Blizzard Driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/video/omap2/panel-n800.c b/drivers/video/omap2/panel-n800.c
+new file mode 100644
+index 0000000..3ae0a16
+--- /dev/null
++++ b/drivers/video/omap2/panel-n800.c
+@@ -0,0 +1,437 @@
++
++/*#define DEBUG*/
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++#include <linux/spi/spi.h>
++#include <linux/jiffies.h>
++#include <linux/sched.h>
++#include <linux/backlight.h>
++#include <linux/fb.h>
++
++#include <mach/display.h>
++#include <mach/dma.h>
++
++#define MIPID_CMD_READ_DISP_ID 0x04
++#define MIPID_CMD_READ_RED 0x06
++#define MIPID_CMD_READ_GREEN 0x07
++#define MIPID_CMD_READ_BLUE 0x08
++#define MIPID_CMD_READ_DISP_STATUS 0x09
++#define MIPID_CMD_RDDSDR 0x0F
++#define MIPID_CMD_SLEEP_IN 0x10
++#define MIPID_CMD_SLEEP_OUT 0x11
++#define MIPID_CMD_DISP_OFF 0x28
++#define MIPID_CMD_DISP_ON 0x29
++
++#define MIPID_VER_LPH8923 3
++#define MIPID_VER_LS041Y3 4
++
++#define MIPID_ESD_CHECK_PERIOD msecs_to_jiffies(5000)
++
++#ifdef DEBUG
++#define DBG(format, ...) printk(KERN_DEBUG "PN800: " format, ## __VA_ARGS__)
++#else
++#define DBG(format, ...)
++#endif
++
++struct pn800_device {
++ struct backlight_device *bl_dev;
++ int enabled;
++ int model;
++ int revision;
++ u8 display_id[3];
++ unsigned int saved_bklight_level;
++ unsigned long hw_guard_end; /* next value of jiffies
++ when we can issue the
++ next sleep in/out command */
++ unsigned long hw_guard_wait; /* max guard time in jiffies */
++
++ struct spi_device *spi;
++ struct mutex mutex;
++ struct omap_panel panel;
++ struct omap_display *display;
++};
++
++
++static void pn800_transfer(struct pn800_device *md, int cmd,
++ const u8 *wbuf, int wlen, u8 *rbuf, int rlen)
++{
++ struct spi_message m;
++ struct spi_transfer *x, xfer[4];
++ u16 w;
++ int r;
++
++ BUG_ON(md->spi == NULL);
++
++ spi_message_init(&m);
++
++ memset(xfer, 0, sizeof(xfer));
++ x = &xfer[0];
++
++ cmd &= 0xff;
++ x->tx_buf = &cmd;
++ x->bits_per_word = 9;
++ x->len = 2;
++ spi_message_add_tail(x, &m);
++
++ if (wlen) {
++ x++;
++ x->tx_buf = wbuf;
++ x->len = wlen;
++ x->bits_per_word = 9;
++ spi_message_add_tail(x, &m);
++ }
++
++ if (rlen) {
++ x++;
++ x->rx_buf = &w;
++ x->len = 1;
++ spi_message_add_tail(x, &m);
++
++ if (rlen > 1) {
++ /* Arrange for the extra clock before the first
++ * data bit.
++ */
++ x->bits_per_word = 9;
++ x->len = 2;
++
++ x++;
++ x->rx_buf = &rbuf[1];
++ x->len = rlen - 1;
++ spi_message_add_tail(x, &m);
++ }
++ }
++
++ r = spi_sync(md->spi, &m);
++ if (r < 0)
++ dev_dbg(&md->spi->dev, "spi_sync %d\n", r);
++
++ if (rlen)
++ rbuf[0] = w & 0xff;
++}
++
++static inline void pn800_cmd(struct pn800_device *md, int cmd)
++{
++ pn800_transfer(md, cmd, NULL, 0, NULL, 0);
++}
++
++static inline void pn800_write(struct pn800_device *md,
++ int reg, const u8 *buf, int len)
++{
++ pn800_transfer(md, reg, buf, len, NULL, 0);
++}
++
++static inline void pn800_read(struct pn800_device *md,
++ int reg, u8 *buf, int len)
++{
++ pn800_transfer(md, reg, NULL, 0, buf, len);
++}
++
++static void set_data_lines(struct pn800_device *md, int data_lines)
++{
++ u16 par;
++
++ switch (data_lines) {
++ case 16:
++ par = 0x150;
++ break;
++ case 18:
++ par = 0x160;
++ break;
++ case 24:
++ par = 0x170;
++ break;
++ }
++ pn800_write(md, 0x3a, (u8 *)&par, 2);
++}
++
++static void send_init_string(struct pn800_device *md)
++{
++ u16 initpar[] = { 0x0102, 0x0100, 0x0100 };
++ int data_lines;
++
++ pn800_write(md, 0xc2, (u8 *)initpar, sizeof(initpar));
++
++ data_lines = (int)md->display->hw_config.priv; // XXX
++
++ set_data_lines(md, data_lines);
++}
++
++static void hw_guard_start(struct pn800_device *md, int guard_msec)
++{
++ md->hw_guard_wait = msecs_to_jiffies(guard_msec);
++ md->hw_guard_end = jiffies + md->hw_guard_wait;
++}
++
++static void hw_guard_wait(struct pn800_device *md)
++{
++ unsigned long wait = md->hw_guard_end - jiffies;
++
++ if ((long)wait > 0 && wait <= md->hw_guard_wait) {
++ set_current_state(TASK_UNINTERRUPTIBLE);
++ schedule_timeout(wait);
++ }
++}
++
++static void set_sleep_mode(struct pn800_device *md, int on)
++{
++ int cmd, sleep_time = 50;
++
++ if (on)
++ cmd = MIPID_CMD_SLEEP_IN;
++ else
++ cmd = MIPID_CMD_SLEEP_OUT;
++ hw_guard_wait(md);
++ pn800_cmd(md, cmd);
++ hw_guard_start(md, 120);
++ /*
++ * When we enable the panel, it seems we _have_ to sleep
++ * 120 ms before sending the init string. When disabling the
++ * panel we'll sleep for the duration of 2 frames, so that the
++ * controller can still provide the PCLK,HS,VS signals. */
++ if (!on)
++ sleep_time = 120;
++ msleep(sleep_time);
++}
++
++static void set_display_state(struct pn800_device *md, int enabled)
++{
++ int cmd = enabled ? MIPID_CMD_DISP_ON : MIPID_CMD_DISP_OFF;
++
++ pn800_cmd(md, cmd);
++}
++
++static int panel_enabled(struct pn800_device *md)
++{
++ u32 disp_status;
++ int enabled;
++
++ pn800_read(md, MIPID_CMD_READ_DISP_STATUS, (u8 *)&disp_status, 4);
++ disp_status = __be32_to_cpu(disp_status);
++ enabled = (disp_status & (1 << 17)) && (disp_status & (1 << 10));
++ dev_dbg(&md->spi->dev,
++ "LCD panel %s enabled by bootloader (status 0x%04x)\n",
++ enabled ? "" : "not ", disp_status);
++ DBG("status %#08x\n", disp_status);
++ return enabled;
++}
++
++static int panel_detect(struct pn800_device *md)
++{
++ pn800_read(md, MIPID_CMD_READ_DISP_ID, md->display_id, 3);
++ dev_dbg(&md->spi->dev, "MIPI display ID: %02x%02x%02x\n",
++ md->display_id[0], md->display_id[1], md->display_id[2]);
++
++ switch (md->display_id[0]) {
++ case 0x45:
++ md->model = MIPID_VER_LPH8923;
++ md->panel.name = "lph8923";
++ break;
++ case 0x83:
++ md->model = MIPID_VER_LS041Y3;
++ md->panel.name = "ls041y3";
++ //md->esd_check = ls041y3_esd_check;
++ break;
++ default:
++ md->panel.name = "unknown";
++ dev_err(&md->spi->dev, "invalid display ID\n");
++ return -ENODEV;
++ }
++
++ md->revision = md->display_id[1];
++ pr_info("omapfb: %s rev %02x LCD detected\n",
++ md->panel.name, md->revision);
++
++ return 0;
++}
++
++
++
++static int pn800_panel_enable(struct omap_display *display)
++{
++ int r;
++ struct pn800_device *md =
++ (struct pn800_device *)display->panel->priv;
++
++ DBG("pn800_panel_enable\n");
++
++ mutex_lock(&md->mutex);
++
++ if (display->hw_config.panel_enable)
++ display->hw_config.panel_enable(display);
++
++ msleep(50); // wait for power up
++
++ r = panel_detect(md);
++ if (r) {
++ mutex_unlock(&md->mutex);
++ return r;
++ }
++
++ md->enabled = panel_enabled(md);
++
++ if (md->enabled) {
++ DBG("panel already enabled\n");
++ ; /*pn800_esd_start_check(md);*/
++ } else {
++ ; /*md->saved_bklight_level = pn800_get_bklight_level(panel);*/
++ }
++
++
++ if (md->enabled) {
++ mutex_unlock(&md->mutex);
++ return 0;
++ }
++
++ set_sleep_mode(md, 0);
++ md->enabled = 1;
++ send_init_string(md);
++ set_display_state(md, 1);
++ //mipid_set_bklight_level(panel, md->saved_bklight_level);
++ //mipid_esd_start_check(md);
++
++ mutex_unlock(&md->mutex);
++ return 0;
++}
++
++static void pn800_panel_disable(struct omap_display *display)
++{
++ struct pn800_device *md =
++ (struct pn800_device *)display->panel->priv;
++
++ DBG("pn800_panel_disable\n");
++
++ mutex_lock(&md->mutex);
++
++ if (!md->enabled) {
++ mutex_unlock(&md->mutex);
++ return;
++ }
++ /*md->saved_bklight_level = pn800_get_bklight_level(panel);*/
++ /*pn800_set_bklight_level(panel, 0);*/
++
++ set_display_state(md, 0);
++ set_sleep_mode(md, 1);
++ md->enabled = 0;
++
++
++ if (display->hw_config.panel_disable)
++ display->hw_config.panel_disable(display);
++
++ mutex_unlock(&md->mutex);
++}
++
++static int pn800_panel_init(struct omap_display *display)
++{
++ struct pn800_device *md =
++ (struct pn800_device *)display->panel->priv;
++
++ DBG("pn800_panel_init\n");
++
++ mutex_init(&md->mutex);
++ md->display = display;
++
++ return 0;
++}
++
++static int pn800_run_test(struct omap_display *display, int test_num)
++{
++ return 0;
++}
++
++static struct omap_panel pn800_panel = {
++ .owner = THIS_MODULE,
++ .name = "panel-pn800",
++ .init = pn800_panel_init,
++ /*.remove = pn800_cleanup,*/
++ .enable = pn800_panel_enable,
++ .disable = pn800_panel_disable,
++ //.set_mode = pn800_set_mode,
++ .run_test = pn800_run_test,
++
++ .timings = {
++ .x_res = 800,
++ .y_res = 480,
++
++ .pixel_clock = 21940,
++ .hsw = 50,
++ .hfp = 20,
++ .hbp = 15,
++
++ .vsw = 2,
++ .vfp = 1,
++ .vbp = 3,
++ },
++ .config = OMAP_DSS_LCD_TFT,
++
++ .bpp = 16,
++};
++
++static int pn800_spi_probe(struct spi_device *spi)
++{
++ struct pn800_device *md;
++
++ DBG("pn800_spi_probe\n");
++
++ md = kzalloc(sizeof(*md), GFP_KERNEL);
++ if (md == NULL) {
++ dev_err(&spi->dev, "out of memory\n");
++ return -ENOMEM;
++ }
++
++ spi->mode = SPI_MODE_0;
++ md->spi = spi;
++ dev_set_drvdata(&spi->dev, md);
++ md->panel = pn800_panel;
++ pn800_panel.priv = md;
++
++ omap_dss_register_panel(&pn800_panel);
++
++ return 0;
++}
++
++static int pn800_spi_remove(struct spi_device *spi)
++{
++ struct pn800_device *md = dev_get_drvdata(&spi->dev);
++
++ DBG("pn800_spi_remove\n");
++
++ omap_dss_unregister_panel(&pn800_panel);
++
++ /*pn800_disable(&md->panel);*/
++ kfree(md);
++
++ return 0;
++}
++
++static struct spi_driver pn800_spi_driver = {
++ .driver = {
++ .name = "panel-n800",
++ .bus = &spi_bus_type,
++ .owner = THIS_MODULE,
++ },
++ .probe = pn800_spi_probe,
++ .remove = __devexit_p(pn800_spi_remove),
++};
++
++static int __init pn800_init(void)
++{
++ DBG("pn800_init\n");
++ return spi_register_driver(&pn800_spi_driver);
++}
++
++static void __exit pn800_exit(void)
++{
++ DBG("pn800_exit\n");
++ spi_unregister_driver(&pn800_spi_driver);
++}
++
++module_init(pn800_init);
++module_exit(pn800_exit);
++
++MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>");
++MODULE_DESCRIPTION("N800 LCD Driver");
++MODULE_LICENSE("GPL");
+--
+1.5.6.3
+
+++ /dev/null
-From 782177389d60fd3e5444d0a8ecf4f73343ca7e1d Mon Sep 17 00:00:00 2001
-From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Fri, 14 Nov 2008 15:47:55 +0200
-Subject: [PATCH] DSS: Support for OMAP3 SDP board
-
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
----
- arch/arm/mach-omap2/board-3430sdp.c | 210 +++++++++++++++++++++++++++++++++--
- 1 files changed, 201 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
-index ade186b..725b2d9 100644
---- a/arch/arm/mach-omap2/board-3430sdp.c
-+++ b/arch/arm/mach-omap2/board-3430sdp.c
-@@ -39,6 +39,7 @@
- #include <mach/keypad.h>
- #include <mach/dma.h>
- #include <mach/gpmc.h>
-+#include <mach/display.h>
-
- #include <asm/io.h>
- #include <asm/delay.h>
-@@ -238,14 +239,209 @@ static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
- },
- };
-
--static struct platform_device sdp3430_lcd_device = {
-- .name = "sdp2430_lcd",
-- .id = -1,
-+
-+#define SDP2430_LCD_PANEL_BACKLIGHT_GPIO 91
-+#define SDP2430_LCD_PANEL_ENABLE_GPIO 154
-+#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 24
-+#define SDP3430_LCD_PANEL_ENABLE_GPIO 28
-+
-+#define PM_RECEIVER TWL4030_MODULE_PM_RECEIVER
-+#define ENABLE_VAUX2_DEDICATED 0x09
-+#define ENABLE_VAUX2_DEV_GRP 0x20
-+#define ENABLE_VAUX3_DEDICATED 0x03
-+#define ENABLE_VAUX3_DEV_GRP 0x20
-+
-+#define ENABLE_VPLL2_DEDICATED 0x05
-+#define ENABLE_VPLL2_DEV_GRP 0xE0
-+#define TWL4030_VPLL2_DEV_GRP 0x33
-+#define TWL4030_VPLL2_DEDICATED 0x36
-+
-+#define t2_out(c, r, v) twl4030_i2c_write_u8(c, r, v)
-+
-+static unsigned backlight_gpio;
-+static unsigned enable_gpio;
-+static int lcd_enabled;
-+static int dvi_enabled;
-+
-+static void __init sdp3430_display_init(void)
-+{
-+ int r;
-+
-+ enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
-+ backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
-+
-+ r = gpio_request(enable_gpio, "LCD reset");
-+ if (r) {
-+ printk(KERN_ERR "failed to get LCD reset GPIO\n");
-+ goto err0;
-+ }
-+
-+ r = gpio_request(backlight_gpio, "LCD Backlight");
-+ if (r) {
-+ printk(KERN_ERR "failed to get LCD backlight GPIO\n");
-+ goto err1;
-+ }
-+
-+ gpio_direction_output(enable_gpio, 0);
-+ gpio_direction_output(backlight_gpio, 0);
-+
-+ return;
-+err1:
-+ gpio_free(enable_gpio);
-+err0:
-+ return;
-+}
-+
-+
-+static int sdp3430_panel_enable_lcd(struct omap_display *display)
-+{
-+ u8 ded_val, ded_reg;
-+ u8 grp_val, grp_reg;
-+
-+ if (dvi_enabled) {
-+ printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
-+ return -EINVAL;
-+ }
-+
-+ if (omap_rev() > OMAP3430_REV_ES1_0) {
-+ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEDICATED,
-+ TWL4030_VPLL2_DEDICATED);
-+ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEV_GRP,
-+ TWL4030_VPLL2_DEV_GRP);
-+ }
-+
-+ ded_reg = TWL4030_VAUX3_DEDICATED;
-+ ded_val = ENABLE_VAUX3_DEDICATED;
-+ grp_reg = TWL4030_VAUX3_DEV_GRP;
-+ grp_val = ENABLE_VAUX3_DEV_GRP;
-+
-+ gpio_direction_output(enable_gpio, 1);
-+ gpio_direction_output(backlight_gpio, 1);
-+
-+ if (0 != t2_out(PM_RECEIVER, ded_val, ded_reg))
-+ return -EIO;
-+ if (0 != t2_out(PM_RECEIVER, grp_val, grp_reg))
-+ return -EIO;
-+
-+ lcd_enabled = 1;
-+
-+ return 0;
-+}
-+
-+static void sdp3430_panel_disable_lcd(struct omap_display *display)
-+{
-+ lcd_enabled = 0;
-+
-+ gpio_direction_output(enable_gpio, 0);
-+ gpio_direction_output(backlight_gpio, 0);
-+
-+ if (omap_rev() > OMAP3430_REV_ES1_0) {
-+ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEDICATED);
-+ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEV_GRP);
-+ mdelay(4);
-+ }
-+}
-+
-+static struct omap_display_data sdp3430_display_data = {
-+ .type = OMAP_DISPLAY_TYPE_DPI,
-+ .name = "lcd",
-+ .panel_name = "sharp-ls037v7dw01",
-+ .u.dpi.data_lines = 16,
-+ .panel_enable = sdp3430_panel_enable_lcd,
-+ .panel_disable = sdp3430_panel_disable_lcd,
-+};
-+
-+static int sdp3430_panel_enable_dvi(struct omap_display *display)
-+{
-+ if (lcd_enabled) {
-+ printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
-+ return -EINVAL;
-+ }
-+
-+ if (omap_rev() > OMAP3430_REV_ES1_0) {
-+ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEDICATED,
-+ TWL4030_VPLL2_DEDICATED);
-+ t2_out(PM_RECEIVER, ENABLE_VPLL2_DEV_GRP,
-+ TWL4030_VPLL2_DEV_GRP);
-+ }
-+
-+ dvi_enabled = 1;
-+
-+ return 0;
-+}
-+
-+static void sdp3430_panel_disable_dvi(struct omap_display *display)
-+{
-+ dvi_enabled = 0;
-+
-+ if (omap_rev() > OMAP3430_REV_ES1_0) {
-+ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEDICATED);
-+ t2_out(PM_RECEIVER, 0x0, TWL4030_VPLL2_DEV_GRP);
-+ mdelay(4);
-+ }
-+}
-+
-+
-+static struct omap_display_data sdp3430_display_data_dvi = {
-+ .type = OMAP_DISPLAY_TYPE_DPI,
-+ .name = "dvi",
-+ .panel_name = "panel-dvi",
-+ .u.dpi.data_lines = 24,
-+ .panel_enable = sdp3430_panel_enable_dvi,
-+ .panel_disable = sdp3430_panel_disable_dvi,
-+};
-+
-+static int sdp3430_panel_enable_tv(struct omap_display *display)
-+{
-+#define ENABLE_VDAC_DEDICATED 0x03
-+#define ENABLE_VDAC_DEV_GRP 0x20
-+
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
-+ ENABLE_VDAC_DEDICATED,
-+ TWL4030_VDAC_DEDICATED);
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
-+ ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP);
-+
-+ return 0;
-+}
-+
-+static void sdp3430_panel_disable_tv(struct omap_display *display)
-+{
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
-+ TWL4030_VDAC_DEDICATED);
-+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
-+ TWL4030_VDAC_DEV_GRP);
-+}
-+
-+static struct omap_display_data sdp3430_display_data_tv = {
-+ .type = OMAP_DISPLAY_TYPE_VENC,
-+ .name = "tv",
-+ .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
-+ .panel_enable = sdp3430_panel_enable_tv,
-+ .panel_disable = sdp3430_panel_disable_tv,
- };
-
-+static struct omap_dss_platform_data sdp3430_dss_data = {
-+ .num_displays = 3,
-+ .displays = {
-+ &sdp3430_display_data,
-+ &sdp3430_display_data_dvi,
-+ &sdp3430_display_data_tv,
-+ }
-+};
-+
-+static struct platform_device sdp3430_dss_device = {
-+ .name = "omap-dss",
-+ .id = -1,
-+ .dev = {
-+ .platform_data = &sdp3430_dss_data,
-+ },
-+};
-+
-+
- static struct platform_device *sdp3430_devices[] __initdata = {
- &sdp3430_smc91x_device,
-- &sdp3430_lcd_device,
-+ &sdp3430_dss_device,
- };
-
- static inline void __init sdp3430_init_smc91x(void)
-@@ -292,13 +488,8 @@ static struct omap_uart_config sdp3430_uart_config __initdata = {
- .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
- };
-
--static struct omap_lcd_config sdp3430_lcd_config __initdata = {
-- .ctrl_name = "internal",
--};
--
- static struct omap_board_config_kernel sdp3430_config[] __initdata = {
- { OMAP_TAG_UART, &sdp3430_uart_config },
-- { OMAP_TAG_LCD, &sdp3430_lcd_config },
- };
-
- static int sdp3430_batt_table[] = {
-@@ -481,6 +672,7 @@ static void __init omap_3430sdp_init(void)
- usb_musb_init();
- usb_ehci_init();
- twl4030_mmc_init(mmc);
-+ sdp3430_display_init();
- }
-
- static void __init omap_3430sdp_map_io(void)
---
-1.5.6.3
-
+++ /dev/null
-From aebae68fd82a47e5d7c83176cf14720559300e2b Mon Sep 17 00:00:00 2001
-From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
-Date: Mon, 15 Dec 2008 14:33:11 +0200
-Subject: [PATCH] DSS: OMAPFB: PAGE_ALIGN sizes in mem alloc
-
-Sizes in omapfb region struct were not page aligned, and that caused
-mmap to fail.
----
- drivers/video/omap2/omapfb-main.c | 4 ++++
- 1 files changed, 4 insertions(+), 0 deletions(-)
-
-diff --git a/drivers/video/omap2/omapfb-main.c b/drivers/video/omap2/omapfb-main.c
-index 89ad631..bca0e28 100644
---- a/drivers/video/omap2/omapfb-main.c
-+++ b/drivers/video/omap2/omapfb-main.c
-@@ -874,6 +874,8 @@ static int omapfb_alloc_fbmem(struct omapfb2_device *fbdev, int fbnum,
- unsigned long paddr;
- void *vaddr;
-
-+ size = PAGE_ALIGN(size);
-+
- ofbi = FB2OFB(fbdev->fbs[fbnum]);
- rg = &ofbi->region;
- memset(rg, 0, sizeof(*rg));
-@@ -906,6 +908,8 @@ int omapfb_realloc_fbmem(struct omapfb2_device *fbdev, int fbnum,
- unsigned old_size = rg->size;
- int r;
-
-+ size = PAGE_ALIGN(size);
-+
- omapfb_free_fbmem(fbdev, fbnum);
-
- if (size == 0)
---
-1.5.6.3
-
+++ /dev/null
-From 0eb1facf382b7654f28222a2a41c3d029bcd7965 Mon Sep 17 00:00:00 2001
-From: Vaibhav Hiremath <hvaibhav@ti.com>
-Date: Mon, 15 Dec 2008 14:52:08 +0200
-Subject: [PATCH] Refreshed and Cleaned up as per the latest Tomi's DSS2
- code-base -
-
-http://www.bat.org/~tomba/git/linux-omap-dss.git
-
-Tomi,
-
-Can you please merge this patch to your repository, so
-that it will be available as part of your HEAD?
-
-Signed-off-by: Brijesh Jadav <brijesh.j@ti.com>
-Signed-off-by: Hardik Shah <hardik.shah@ti.com>
-Signed-off-by: Manjunath Hadli <mrh@ti.com>
-Signed-off-by: R Sivaraj <sivaraj@ti.com>
-Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
----
- arch/arm/mach-omap2/board-omap3evm.c | 69 +++++++++++++---------------------
- 1 files changed, 26 insertions(+), 43 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
-index 0a722d7..cf0a6b3 100644
---- a/arch/arm/mach-omap2/board-omap3evm.c
-+++ b/arch/arm/mach-omap2/board-omap3evm.c
-@@ -36,7 +36,6 @@
- #include <mach/usb-ehci.h>
- #include <mach/common.h>
- #include <mach/mcspi.h>
--#include <mach/omapfb.h>
- #include <mach/display.h>
-
- #include "sdram-micron-mt46h32m32lf-6.h"
-@@ -161,20 +160,7 @@ static int __init omap3_evm_i2c_init(void)
- omap_register_i2c_bus(3, 400, NULL, 0);
- return 0;
- }
--static struct omap_fbmem_config evm_fbmem0_config = {
-- .size = 480*720*4,
-- .start = OMAPFB_MEMTYPE_SDRAM,
--};
--
--static struct omap_fbmem_config evm_fbmem1_config = {
-- .size = 480*720*4,
-- .start = OMAPFB_MEMTYPE_SDRAM,
--};
-
--static struct omap_fbmem_config evm_fbmem2_config = {
-- .size = 480*720*4,
-- .start = OMAPFB_MEMTYPE_SDRAM,
--};
- #define LCD_PANEL_LR 2
- #define LCD_PANEL_UD 3
- #define LCD_PANEL_INI 152
-@@ -195,7 +181,7 @@ static struct omap_fbmem_config evm_fbmem2_config = {
- static int lcd_enabled;
- static int dvi_enabled;
-
--static void __init evm_display_init(void)
-+static void __init omap3_evm_display_init(void)
- {
- int r;
- r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr");
-@@ -258,7 +244,7 @@ err_1:
-
- }
-
--static int evm_panel_enable_lcd(struct omap_display *display)
-+static int omap3_evm_panel_enable_lcd(struct omap_display *display)
- {
- if (dvi_enabled) {
- printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
-@@ -275,7 +261,7 @@ static int evm_panel_enable_lcd(struct omap_display *display)
- return 0;
- }
-
--static void evm_panel_disable_lcd(struct omap_display *display)
-+static void omap3_evm_panel_disable_lcd(struct omap_display *display)
- {
- if (omap_rev() > OMAP3430_REV_ES1_0) {
- twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0,
-@@ -287,16 +273,16 @@ static void evm_panel_disable_lcd(struct omap_display *display)
- lcd_enabled = 0;
- }
-
--static struct omap_display_data evm_display_data = {
-+static struct omap_display_data omap3_evm_display_data = {
- .type = OMAP_DISPLAY_TYPE_DPI,
- .name = "lcd",
- .panel_name = "sharp-ls037v7dw01",
- .u.dpi.data_lines = 18,
-- .panel_enable = evm_panel_enable_lcd,
-- .panel_disable = evm_panel_disable_lcd,
-+ .panel_enable = omap3_evm_panel_enable_lcd,
-+ .panel_disable = omap3_evm_panel_disable_lcd,
- };
-
--static int evm_panel_enable_tv(struct omap_display *display)
-+static int omap3_evm_panel_enable_tv(struct omap_display *display)
- {
- twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
- ENABLE_VDAC_DEDICATED, TWL4030_VDAC_DEDICATED);
-@@ -305,7 +291,7 @@ static int evm_panel_enable_tv(struct omap_display *display)
- return 0;
- }
-
--static void evm_panel_disable_tv(struct omap_display *display)
-+static void omap3_evm_panel_disable_tv(struct omap_display *display)
- {
- twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
- TWL4030_VDAC_DEDICATED);
-@@ -313,16 +299,16 @@ static void evm_panel_disable_tv(struct omap_display *display)
- TWL4030_VDAC_DEV_GRP);
- }
-
--static struct omap_display_data evm_display_data_tv = {
-+static struct omap_display_data omap3_evm_display_data_tv = {
- .type = OMAP_DISPLAY_TYPE_VENC,
- .name = "tv",
- .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
-- .panel_enable = evm_panel_enable_tv,
-- .panel_disable = evm_panel_disable_tv,
-+ .panel_enable = omap3_evm_panel_enable_tv,
-+ .panel_disable = omap3_evm_panel_disable_tv,
- };
-
-
--static int evm_panel_enable_dvi(struct omap_display *display)
-+static int omap3_evm_panel_enable_dvi(struct omap_display *display)
- {
- if (lcd_enabled) {
- printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
-@@ -337,7 +323,7 @@ static int evm_panel_enable_dvi(struct omap_display *display)
- return 0;
- }
-
--static void evm_panel_disable_dvi(struct omap_display *display)
-+static void omap3_evm_panel_disable_dvi(struct omap_display *display)
- {
- twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00,
- TWL4030_GPIODATA_IN3);
-@@ -347,28 +333,28 @@ static void evm_panel_disable_dvi(struct omap_display *display)
- }
-
-
--static struct omap_display_data evm_display_data_dvi = {
-+static struct omap_display_data omap3_evm_display_data_dvi = {
- .type = OMAP_DISPLAY_TYPE_DPI,
- .name = "dvi",
- .panel_name = "panel-dvi",
- .u.dpi.data_lines = 24,
-- .panel_enable = evm_panel_enable_dvi,
-- .panel_disable = evm_panel_disable_dvi,
-+ .panel_enable = omap3_evm_panel_enable_dvi,
-+ .panel_disable = omap3_evm_panel_disable_dvi,
- };
-
--static struct omap_dss_platform_data evm_dss_data = {
-+static struct omap_dss_platform_data omap3_evm_dss_data = {
- .num_displays = 3,
- .displays = {
-- &evm_display_data,
-- &evm_display_data_dvi,
-- &evm_display_data_tv,
-+ &omap3_evm_display_data,
-+ &omap3_evm_display_data_dvi,
-+ &omap3_evm_display_data_tv,
- }
- };
--static struct platform_device evm_dss_device = {
-+static struct platform_device omap3_evm_dss_device = {
- .name = "omap-dss",
- .id = -1,
- .dev = {
-- .platform_data = &evm_dss_data,
-+ .platform_data = &omap3_evm_dss_data,
- },
- };
-
-@@ -428,13 +414,10 @@ static void __init omap3_evm_init_irq(void)
-
- static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
- { OMAP_TAG_UART, &omap3_evm_uart_config },
-- { OMAP_TAG_FBMEM, &evm_fbmem0_config },
-- { OMAP_TAG_FBMEM, &evm_fbmem1_config },
-- { OMAP_TAG_FBMEM, &evm_fbmem2_config },
- };
-
- static struct platform_device *omap3_evm_devices[] __initdata = {
-- &evm_dss_device,
-+ &omap3_evm_dss_device,
- &omap3evm_smc911x_device,
- };
-
-@@ -453,6 +436,8 @@ static void __init omap3_evm_init(void)
- omap3_evm_i2c_init();
-
- platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
-+ omap_board_config = omap3_evm_config;
-+ omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
-
- spi_register_board_info(omap3evm_spi_board_info,
- ARRAY_SIZE(omap3evm_spi_board_info));
-@@ -463,13 +448,11 @@ static void __init omap3_evm_init(void)
- usb_ehci_init();
- omap3evm_flash_init();
- ads7846_dev_init();
-- evm_display_init();
-+ omap3_evm_display_init();
- }
-
- static void __init omap3_evm_map_io(void)
- {
-- omap_board_config = omap3_evm_config;
-- omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
- omap2_set_globals_343x();
- omap2_map_common_io();
- }
---
-1.5.6.3
-
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.28-omap1
-# Mon Dec 29 17:23:26 2008
+# Wed Jan 7 15:05:28 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_OMAP_LL_DEBUG_UART2 is not set
CONFIG_OMAP_LL_DEBUG_UART3=y
CONFIG_OMAP2_DSS=y
-CONFIG_OMAP2_DSS_DEBUG=y
+CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y
# CONFIG_OMAP2_DSS_RFBI is not set
CONFIG_OMAP2_DSS_VENC=y
# CONFIG_OMAP2_DSS_SDI is not set
CONFIG_OMAP2_DSS_DSI=y
CONFIG_OMAP2_DSS_USE_DSI_PLL=y
-# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
-CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=2
+CONFIG_OMAP2_DSS_FAKE_VSYNC=y
+CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1
CONFIG_ARCH_OMAP34XX=y
CONFIG_ARCH_OMAP3430=y
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-CONFIG_CHR_DEV_SG=m
-# CONFIG_CHR_DEV_SCH is not set
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=m
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_ISCSI_ATTRS is not set
+CONFIG_SCSI_ISCSI_ATTRS=m
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
-# CONFIG_ISCSI_TCP is not set
+CONFIG_ISCSI_TCP=m
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set
#
# OMAP2/3 Display Device Drivers
#
-CONFIG_PANEL_DVI=y
-CONFIG_PANEL_DVI_640X480=y
-# CONFIG_PANEL_DVI_800X600 is not set
-# CONFIG_PANEL_DVI_1024X768 is not set
-# CONFIG_PANEL_DVI_1280X1024 is not set
+CONFIG_PANEL_GENERIC=y
# CONFIG_PANEL_SHARP_LS037V7DW01 is not set
+# CONFIG_PANEL_N800 is not set
+# CONFIG_CTRL_BLIZZARD is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc8-omap1
-# Fri Dec 19 16:27:53 2008
+# Linux kernel version: 2.6.28-omap1
+# Wed Jan 7 14:36:25 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_OMAP_LL_DEBUG_UART2 is not set
# CONFIG_OMAP_LL_DEBUG_UART3 is not set
CONFIG_OMAP2_DSS=y
-CONFIG_OMAP2_DSS_DEBUG=y
+CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y
# CONFIG_OMAP2_DSS_RFBI is not set
CONFIG_OMAP2_DSS_VENC=y
# CONFIG_OMAP2_DSS_SDI is not set
CONFIG_OMAP2_DSS_DSI=y
-# CONFIG_OMAP2_DSS_USE_DSI_PLL is not set
-# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
+CONFIG_OMAP2_DSS_USE_DSI_PLL=y
+CONFIG_OMAP2_DSS_FAKE_VSYNC=y
CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1
CONFIG_ARCH_OMAP34XX=y
CONFIG_ARCH_OMAP3430=y
# CONFIG_FB_MB862XX is not set
CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=14
CONFIG_FB_OMAP2=y
-# CONFIG_FB_OMAP2_DEBUG is not set
+CONFIG_FB_OMAP2_DEBUG=y
# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set
CONFIG_FB_OMAP2_NUM_FBS=3
#
# OMAP2/3 Display Device Drivers
#
-CONFIG_PANEL_DVI=y
-CONFIG_PANEL_DVI_640X480=y
-# CONFIG_PANEL_DVI_800X600 is not set
-#CONFIG_PANEL_DVI_1024X768=n
-# CONFIG_PANEL_DVI_1280X1024 is not set
+CONFIG_PANEL_GENERIC=y
CONFIG_PANEL_SHARP_LS037V7DW01=y
+# CONFIG_PANEL_N800 is not set
+# CONFIG_CTRL_BLIZZARD is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_LTV350QV=y
SRCREV = "401b285465488f515290e0f9111872b94e1cf922"
PV = "2.6.28"
-PR = "r1"
+PR = "r2"
SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git;protocol=git \
file://defconfig"
file://dvb-fix-dma.diff;patch=1 \
file://0001-Removed-resolution-check-that-prevents-scaling-when.patch;patch=1 \
file://0001-Implement-downsampling-with-debugs.patch;patch=1 \
- file://0003-DSS-Documentation-for-OMAP2-3-display-subsystem.patch;patch=1 \
- file://0004-DSS-New-display-subsystem-driver-for-OMAP2-3.patch;patch=1 \
- file://0005-DSS-OMAPFB-fb-driver-for-new-display-subsystem.patch;patch=1 \
- file://0006-DSS-Add-generic-DVI-panel.patch;patch=1 \
- file://0007-DSS-support-for-Beagle-Board.patch;patch=1 \
- file://0008-DSS-BEAGLE-Enable-DSS-in-beagle-defconfig.patch;patch=1 \
- file://0009-DSS-Sharp-LS037V7DW01-LCD-Panel-driver.patch;patch=1 \
- file://0011-DSS-Support-for-OMAP3-EVM-board.patch;patch=1 \
- file://0012-DSS-OMAPFB-PAGE_ALIGN-sizes-in-mem-alloc.patch;patch=1 \
- file://0013-Refreshed-and-Cleaned-up-as-per-the-latest-Tomi-s-DS.patch;patch=1 \
file://twl-asoc-fix-record.diff;patch=1 \
file://tick-schedc-suppress-needless-timer-reprogramming.patch;patch=1 \
+ file://0001-DSS-New-display-subsystem-driver-for-OMAP2-3.patch;patch=1 \
+ file://0002-DSS-OMAPFB-fb-driver-for-new-display-subsystem.patch;patch=1 \
+ file://0003-DSS-Add-generic-DVI-panel.patch;patch=1 \
+ file://0004-DSS-support-for-Beagle-Board.patch;patch=1 \
+ file://0005-DSS-Sharp-LS037V7DW01-LCD-Panel-driver.patch;patch=1 \
+ file://0006-DSS-Support-for-OMAP3-SDP-board.patch;patch=1 \
+ file://0007-DSS-Support-for-OMAP3-EVM-board.patch;patch=1 \
+ file://0008-DSS-Hacked-N810-support.patch;patch=1 \
"
git.openpandora.org / openembedded.git / commitdiff