drm/i915: fix PCH PLL assertion check for 3 pipes
authorJesse Barnes <jbarnes@virtuousgeek.org>
Wed, 12 Oct 2011 16:27:42 +0000 (09:27 -0700)
committerKeith Packard <keithp@keithp.com>
Thu, 20 Oct 2011 22:26:43 +0000 (15:26 -0700)
Add a couple of checks now that we're using the 3rd transcoder:
  1) make sure the transcoder PLL enable bit is set for the transcoder
     in question
  2) when checking actual PLL enable, use the selected PLL number rather
     than the transcoder number (they could be different now)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/intel_display.c

Simple merge