--- /dev/null
+Index: linux-2.6.20.1/drivers/net/Kconfig
+===================================================================
+--- linux-2.6.20.1.orig/drivers/net/Kconfig 2007-02-20 07:34:32.000000000 +0100
++++ linux-2.6.20.1/drivers/net/Kconfig 2007-02-28 20:29:04.000000000 +0100
+@@ -2085,6 +2085,16 @@
+
+ If in doubt, say Y.
+
++config R1000
++ tristate "Realtek 8169 gigabit ethernet support (R1000)"
++ depends on PCI
++ select CRC32
++ ---help---
++ Say Y here if you have a Realtek 8169 PCI Gigabit Ethernet adapter.
++
++ To compile this driver as a module, choose M here: the module
++ will be called r1000_n. This is recommended.
++
+ config SIS190
+ tristate "SiS190/SiS191 gigabit ethernet support"
+ depends on PCI
+Index: linux-2.6.20.1/drivers/net/Makefile
+===================================================================
+--- linux-2.6.20.1.orig/drivers/net/Makefile 2007-02-20 07:34:32.000000000 +0100
++++ linux-2.6.20.1/drivers/net/Makefile 2007-02-28 20:29:04.000000000 +0100
+@@ -188,6 +188,7 @@
+ obj-$(CONFIG_NET_NETX) += netx-eth.o
+ obj-$(CONFIG_DL2K) += dl2k.o
+ obj-$(CONFIG_R8169) += r8169.o
++obj-$(CONFIG_R1000) += r1000_n.o r1000_ioctl.o
+ obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
+ obj-$(CONFIG_IBMVETH) += ibmveth.o
+ obj-$(CONFIG_S2IO) += s2io.o
+Index: linux-2.6.20.1/drivers/net/r1000.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.20.1/drivers/net/r1000.h 2007-02-28 20:29:04.000000000 +0100
+@@ -0,0 +1,390 @@
++#include <linux/module.h>
++#include <linux/pci.h>
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <linux/delay.h>
++#include <linux/version.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++
++#include <linux/timer.h>
++#include <linux/init.h>
++#include <linux/ethtool.h>
++#include <linux/mii.h>
++#include <asm/uaccess.h>
++#include <linux/interrupt.h>
++#include <linux/spinlock.h>
++
++#define R1000_VERSION "1.05"
++#define RELEASE_DATE "2006/10/25"
++#define MODULENAME "r1000"
++#define R1000_DRIVER_NAME MODULENAME R1000_VERSION ", the Linux device driver for Realtek Ethernet Controllers"
++#define PFX MODULENAME ": "
++
++
++#undef R1000_DEBUG
++#undef R1000_JUMBO_FRAME_SUPPORT
++//#undef R1000_HW_FLOW_CONTROL_SUPPORT
++#define R1000_HW_FLOW_CONTROL_SUPPORT
++
++
++#undef R1000_IOCTL_SUPPORT
++#define R1000_USE_IO
++
++#define R1000_BOTTOM_HALVES
++//#undef R1000_BOTTOM_HALVES
++
++#ifdef R1000_DEBUG
++ #define assert(expr) \
++ if(!(expr)) { printk( "Assertion failed! %s,%s,%s,line=%d\n", #expr,__FILE__,__FUNCTION__,__LINE__); }
++ #define DBG_PRINT( fmt, args...) printk("r1000: " fmt, ## args);
++#else
++ #define assert(expr) do {} while (0)
++ #define DBG_PRINT( fmt, args...) ;
++#endif // end of #ifdef R1000_DEBUG
++
++/* media options */
++#define MAX_UNITS 8
++
++#define OPTION_UNSET -1
++#define OPTION_DISABLED 0
++#define OPTION_ENABLED 1
++
++/* MAC address length*/
++#define MAC_ADDR_LEN 6
++
++#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
++#define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
++#define TX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
++#define ETTh 0x3F /* 0x3F means NO threshold */
++
++#define ETH_HDR_LEN 14
++#define DEFAULT_MTU 1500
++#define DEFAULT_RX_BUF_LEN 1536
++
++
++#ifdef R1000_JUMBO_FRAME_SUPPORT
++#define MAX_JUMBO_FRAME_MTU ( 10000 )
++#define MAX_RX_SKBDATA_SIZE ( MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN )
++#else
++//#define MAX_RX_SKBDATA_SIZE 1600
++#define MAX_RX_SKBDATA_SIZE 1608
++#endif //end #ifdef R1000_JUMBO_FRAME_SUPPORT
++
++
++#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
++
++#define NUM_TX_DESC 1024 /* Number of Tx descriptor registers*/
++#define NUM_RX_DESC 1024 /* Number of Rx descriptor registers*/
++
++#define RTL_MIN_IO_SIZE 0x80
++#define TX_TIMEOUT (6*HZ)
++#define R1000_TIMER_EXPIRE_TIME 100 //100
++
++#ifdef R1000_USE_IO
++#define RTL_W8(reg, val8) outb ((val8), ioaddr + (reg))
++#define RTL_W16(reg, val16) outw ((val16), ioaddr + (reg))
++#define RTL_W32(reg, val32) outl ((val32), ioaddr + (reg))
++#define RTL_R8(reg) inb (ioaddr + (reg))
++#define RTL_R16(reg) inw (ioaddr + (reg))
++#define RTL_R32(reg) ((unsigned long) inl (ioaddr + (reg)))
++#else //R1000_USE_IO
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,6)
++/* write/read MMIO register for Linux kernel 2.4.x*/
++#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
++#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
++#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
++#define RTL_R8(reg) readb (ioaddr + (reg))
++#define RTL_R16(reg) readw (ioaddr + (reg))
++#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
++#else
++/* write/read MMIO register for Linux kernel 2.6.x*/
++#define RTL_W8(reg, val8) iowrite8 ((val8), (void *)(ioaddr + (reg)))
++#define RTL_W16(reg, val16) iowrite16 ((val16), (void *)(ioaddr + (reg)))
++#define RTL_W32(reg, val32) iowrite32 ((val32), (void *)(ioaddr + (reg)))
++#define RTL_R8(reg) ioread8 ((void *)(ioaddr + (reg)))
++#define RTL_R16(reg) ioread16 ((void *)(ioaddr + (reg)))
++#define RTL_R32(reg) ((unsigned long) ioread32 ((void *)(ioaddr + (reg))))
++#endif
++#endif //R1000_USE_IO
++
++#define MCFG_METHOD_1 0x01
++#define MCFG_METHOD_2 0x02
++#define MCFG_METHOD_3 0x03
++#define MCFG_METHOD_4 0x04
++#define MCFG_METHOD_5 0x05
++#define MCFG_METHOD_11 0x0B
++#define MCFG_METHOD_12 0x0C
++#define MCFG_METHOD_13 0x0D
++#define MCFG_METHOD_14 0x0E
++#define MCFG_METHOD_15 0x0F
++
++#define PCFG_METHOD_1 0x01 //PHY Reg 0x03 bit0-3 == 0x0000
++#define PCFG_METHOD_2 0x02 //PHY Reg 0x03 bit0-3 == 0x0001
++#define PCFG_METHOD_3 0x03 //PHY Reg 0x03 bit0-3 == 0x0002
++
++enum pci_config_header_registers {
++ VID = 0x00,
++ DID = 0x02,
++ Command = 0x04,
++ Status = 0x06,
++ Rev_ID = 0x08,
++ Class_Code = 0x09,
++ Cache_Line_Size = 0x0C,
++ Latency_Timer = 0x0D,
++ Header_type = 0x0E,
++ BIST = 0x0F,
++ IOAR = 0x10,
++ MEMAR = 0x14,
++ CIS_Pointer = 0x28,
++ Sub_VID = 0x2C,
++ Sub_DID = 0x2E,
++ BMAR = 0x30,
++ Interrupt_Line = 0x3C,
++ Interrutp_Pin = 0x3D,
++ Min_Gnt = 0x3E,
++ Max_Lat = 0x3F,
++};
++
++enum r1000_registers {
++ MAC0 = 0x00,
++ MAR0 = 0x08,
++ TxDescStartAddr = 0x20,
++ TxHDescStartAddr = 0x28,
++ FLASH = 0x30,
++ ERSR = 0x36,
++ ChipCmd = 0x37,
++ TxPoll = 0x38,
++ IntrMask = 0x3C,
++ IntrStatus = 0x3E,
++ TxConfig = 0x40,
++ RxConfig = 0x44,
++ TCTR = 0x48,
++ RxMissed = 0x4C,
++ Cfg9346 = 0x50,
++ Config0 = 0x51,
++ Config1 = 0x52,
++ Config2 = 0x53,
++ Config3 = 0x54,
++ Config4 = 0x55,
++ Config5 = 0x56,
++ TimerInt = 0x58,
++ MultiIntr = 0x5C,
++ PHYAR = 0x60,
++ TBICSR = 0x64,
++ TBI_ANAR = 0x68,
++ TBI_LPAR = 0x6A,
++ PHYstatus = 0x6C,
++ Off7Ch = 0x7C,
++ RxMaxSize = 0xDA,
++ CPlusCmd = 0xE0,
++ RxDescStartAddr = 0xE4,
++ ETThReg = 0xEC,
++ FuncEvent = 0xF0,
++ FuncEventMask = 0xF4,
++ FuncPresetState = 0xF8,
++ FuncForceEvent = 0xFC,
++};
++
++enum r1000_register_content {
++ /*InterruptStatusBits*/
++ SYSErr = 0x8000,
++ PCSTimeout = 0x4000,
++ SWInt = 0x0100,
++ TxDescUnavail = 0x80,
++ RxFIFOOver = 0x40,
++ LinkChg = 0x20,
++ RxDescUnavail = 0x10,
++ TxErr = 0x08,
++ TxOK = 0x04,
++ RxErr = 0x02,
++ RxOK = 0x01,
++
++ //TCTR/TimerInt contetn
++ CLK_tick = 0x1770, //for PCI clock=33MHz 0x1770=200usec
++
++ /*RxStatusDesc*/
++ RxRES = 0x00200000,
++ RxCRC = 0x00080000,
++ RxRUNT = 0x00100000,
++ RxRWT = 0x00400000,
++
++ /*ChipCmdBits*/
++ CmdReset = 0x10,
++ CmdRxEnb = 0x08,
++ CmdTxEnb = 0x04,
++ RxBufEmpty = 0x01,
++
++ /*Cfg9346Bits*/
++ Cfg9346_Lock = 0x00,
++ Cfg9346_Unlock = 0xC0,
++
++ /*rx_mode_bits*/
++ AcceptErr = 0x20,
++ AcceptRunt = 0x10,
++ AcceptBroadcast = 0x08,
++ AcceptMulticast = 0x04,
++ AcceptMyPhys = 0x02,
++ AcceptAllPhys = 0x01,
++
++ /*RxConfigBits*/
++ RxCfgFIFOShift = 13,
++ RxCfgDMAShift = 8,
++
++ /*TxConfigBits*/
++ TxInterFrameGapShift = 24,
++ TxDMAShift = 8,
++
++ //C+ Command Register
++ CPCR_MulRW_Enable = 0x0008,
++
++ /*rtl8169_PHYstatus (MAC offset 0x6C)*/
++ TBI_Enable = 0x80,
++ TxFlowCtrl = 0x40,
++ RxFlowCtrl = 0x20,
++ _1000Mbps = 0x10,
++ _100Mbps = 0x08,
++ _10Mbps = 0x04,
++ LinkStatus = 0x02,
++ FullDup = 0x01,
++
++ /*GIGABIT_PHY_registers*/
++ PHY_CTRL_REG = 0,
++ PHY_STAT_REG = 1,
++ PHY_AUTO_NEGO_REG = 4,
++ PHY_1000_CTRL_REG = 9,
++
++ /*GIGABIT_PHY_REG_BIT*/
++ PHY_Restart_Auto_Nego = 0x0200,
++ PHY_Enable_Auto_Nego = 0x1000,
++
++ //PHY_STAT_REG = 1;
++ PHY_Auto_Neco_Comp = 0x0020,
++
++ //PHY_AUTO_NEGO_REG = 4;
++ PHY_Cap_10_Half = 0x0020,
++ PHY_Cap_10_Full = 0x0040,
++ PHY_Cap_100_Half = 0x0080,
++ PHY_Cap_100_Full = 0x0100,
++
++ //PHY_1000_CTRL_REG = 9;
++ PHY_Cap_1000_Full = 0x0200,
++ PHY_Cap_1000_Half = 0x0100,
++
++ PHY_Cap_PAUSE = 0x0400,
++ PHY_Cap_ASYM_PAUSE = 0x0800,
++
++ PHY_Cap_Null = 0x0,
++
++ /*_MediaType*/
++ _10_Half = 0x01,
++ _10_Full = 0x02,
++ _100_Half = 0x04,
++ _100_Full = 0x08,
++ _1000_Full = 0x10,
++
++ /*_TBICSRBit*/
++ TBILinkOK = 0x02000000,
++};
++
++
++
++enum _DescStatusBit {
++ OWNbit = 0x80000000,
++ EORbit = 0x40000000,
++ FSbit = 0x20000000,
++ LSbit = 0x10000000,
++};
++
++
++struct TxDesc {
++ u32 status;
++ u32 vlan_tag;
++ u32 buf_addr;
++ u32 buf_Haddr;
++};
++
++struct RxDesc {
++ u32 status;
++ u32 vlan_tag;
++ u32 buf_addr;
++ u32 buf_Haddr;
++};
++
++#define r1000_request_timer( timer, timer_expires, timer_func, timer_data ) \
++{ \
++ init_timer(timer); \
++ timer->expires = (unsigned long)(jiffies + timer_expires); \
++ timer->data = (unsigned long)(timer_data); \
++ timer->function = (void *)(timer_func); \
++ add_timer(timer); \
++ DBG_PRINT("request_timer at 0x%08lx\n", (unsigned long)timer); \
++}
++
++#define r1000_delete_timer( del_timer_t ) \
++{ \
++ del_timer(del_timer_t); \
++ DBG_PRINT("delete_timer at 0x%08lx\n", (unsigned long)del_timer_t); \
++}
++
++#define r1000_mod_timer( timer, timer_expires ) \
++{ \
++ mod_timer( timer, jiffies + timer_expires ); \
++}
++
++typedef struct timer_list rt_timer_t;
++
++struct r1000_private {
++ unsigned long ioaddr; /* memory map physical address*/
++ struct pci_dev *pci_dev; /* Index of PCI device */
++ struct net_device_stats stats; /* statistics of net device */
++ spinlock_t lock; /* spin lock flag */
++ spinlock_t tx_lock; /* tx spin lock flag */
++ spinlock_t rx_lock; /* rx spin lock flag */
++ int chipset;
++ int mcfg;
++ int pcfg;
++ rt_timer_t r1000_timer;
++ unsigned long expire_time;
++
++#ifdef R1000_BOTTOM_HALVES
++ struct tasklet_struct r1000_rx_tasklet;
++ struct tasklet_struct r1000_tx_tasklet;
++#endif //R1000_BOTTOM_HALVES
++
++ unsigned int tx_cnt;
++
++ unsigned long phy_link_down_cnt;
++ unsigned long cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
++ unsigned long cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
++ unsigned long dirty_tx;
++ struct TxDesc *TxDescArray; /* Index of 256-alignment Tx Descriptor buffer */
++ struct RxDesc *RxDescArray; /* Index of 256-alignment Rx Descriptor buffer */
++ struct sk_buff *Tx_skbuff[NUM_TX_DESC];/* Index of Transmit data buffer */
++ struct sk_buff *Rx_skbuff[NUM_RX_DESC];/* Receive data buffer */
++ unsigned char drvinit_fail;
++
++ dma_addr_t txdesc_array_dma_addr[NUM_TX_DESC];
++ dma_addr_t rxdesc_array_dma_addr[NUM_RX_DESC];
++ dma_addr_t rx_skbuff_dma_addr[NUM_RX_DESC];
++
++ void *txdesc_space;
++ dma_addr_t txdesc_phy_dma_addr;
++ int sizeof_txdesc_space;
++
++ void *rxdesc_space;
++ dma_addr_t rxdesc_phy_dma_addr;
++ int sizeof_rxdesc_space;
++
++ int curr_mtu_size;
++ int tx_pkt_len;
++ int rx_pkt_len;
++
++ int hw_rx_pkt_len;
++
++ u16 speed;
++ u8 duplex;
++ u8 autoneg;
++};
++
++
+Index: linux-2.6.20.1/drivers/net/r1000_ioctl.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.20.1/drivers/net/r1000_ioctl.c 2007-02-28 20:29:04.000000000 +0100
+@@ -0,0 +1,129 @@
++#include "r1000.h"
++
++extern int R1000_READ_GMII_REG(unsigned long ioaddr, int RegAddr);
++extern int R1000_WRITE_GMII_REG(unsigned long ioaddr, int RegAddr, int value);
++extern int r1000_set_medium(struct net_device *netdev,u16 speed,u8 duplex,u8 autoneg);
++
++static int ethtool_get_settings(struct net_device *netdev,struct ethtool_cmd *ecmd){
++ struct r1000_private *priv = (struct r1000_private *)(netdev->priv);
++ unsigned long ioaddr = priv->ioaddr;
++ unsigned int bmcr = R1000_READ_GMII_REG(ioaddr,PHY_STAT_REG);
++ unsigned int bmsr = R1000_READ_GMII_REG(ioaddr,PHY_AUTO_NEGO_REG);
++ unsigned int gbcr = R1000_READ_GMII_REG(ioaddr,PHY_1000_CTRL_REG);
++
++ ecmd->supported = (SUPPORTED_10baseT_Half|
++ SUPPORTED_10baseT_Full|
++ SUPPORTED_100baseT_Half|
++ SUPPORTED_100baseT_Full|
++ SUPPORTED_1000baseT_Full|
++ SUPPORTED_Autoneg|
++ SUPPORTED_TP);
++
++ ecmd->advertising = ADVERTISED_TP;
++
++ if(bmsr&ADVERTISE_10HALF)
++ ecmd->advertising |= ADVERTISED_10baseT_Half;
++ if(bmsr&ADVERTISE_10FULL)
++ ecmd->advertising |= ADVERTISED_10baseT_Full;
++ if(bmsr&ADVERTISE_100HALF)
++ ecmd->advertising |= ADVERTISED_100baseT_Half;
++ if(bmsr&ADVERTISE_100FULL)
++ ecmd->advertising |= ADVERTISED_100baseT_Full;
++ if(gbcr&PHY_Cap_1000_Full)
++ ecmd->advertising |= ADVERTISED_1000baseT_Full;
++ if(bmcr&PHY_Enable_Auto_Nego)
++ ecmd->advertising |= ADVERTISED_Autoneg;
++
++ ecmd->port = PORT_TP;
++
++ if(priv->mcfg == MCFG_METHOD_1)
++ ecmd->transceiver = XCVR_EXTERNAL;
++ else
++ ecmd->transceiver = XCVR_INTERNAL;
++
++ if(RTL_R8(PHYstatus)&LinkStatus){
++ if(RTL_R8(PHYstatus)&_1000Mbps)
++ ecmd->speed = SPEED_1000;
++ else if(RTL_R8(PHYstatus)&_100Mbps)
++ ecmd->speed = SPEED_100;
++ else if(RTL_R8(PHYstatus)&_10Mbps)
++ ecmd->speed = SPEED_10;
++
++ if(RTL_R8(PHYstatus)&FullDup)
++ ecmd->duplex = DUPLEX_FULL;
++ else
++ ecmd->duplex = DUPLEX_HALF;
++
++ }else{
++ ecmd->speed = -1;
++ ecmd->duplex = -1;
++ }
++ ecmd->autoneg = AUTONEG_ENABLE;
++ return 0;
++}
++
++static int ethtool_set_settings(struct net_device *netdev,struct ethtool_cmd *ecmd){
++ return r1000_set_medium(netdev,ecmd->speed,ecmd->duplex,ecmd->autoneg);
++}
++
++static void ethtool_get_drvinfo(struct net_device *netdev,struct ethtool_drvinfo *drvinfo){
++ struct r1000_private *priv = netdev_priv(netdev);
++
++ strncpy(drvinfo->driver, MODULENAME,32);
++ strncpy(drvinfo->version, R1000_VERSION,32);
++ strncpy(drvinfo->fw_version, "N/A", 32);
++ strncpy(drvinfo->bus_info, pci_name(priv->pci_dev), 32);
++}
++
++static int ethtool_nway_reset(struct net_device *netdev){
++// struct r1000_private *priv = netdev_priv(netdev);
++
++ if(netif_running(netdev)){
++ }
++
++ return 0;
++}
++
++uint32_t ethtool_get_link(struct net_device *netdev){
++ return netif_carrier_ok(netdev) ? 1 : 0;
++}
++
++int ethtool_ioctl(struct ifreq *ifr){
++ struct net_device *netdev=__dev_get_by_name(ifr->ifr_name);
++ void *useraddr=(void *)ifr->ifr_data;
++ uint32_t ethcmd;
++
++ if(!capable(CAP_NET_ADMIN))
++ return -EPERM;
++
++ if(!netdev || !netif_device_present(netdev))
++ return -ENODEV;
++ if(copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
++ return -EFAULT;
++
++ switch (ethcmd){
++ case ETHTOOL_GSET:
++ return ethtool_get_settings(netdev,useraddr);
++ case ETHTOOL_SSET:
++ return ethtool_set_settings(netdev,useraddr);
++ case ETHTOOL_GDRVINFO:
++ ethtool_get_drvinfo(netdev,useraddr);
++ case ETHTOOL_NWAY_RST:
++ return ethtool_nway_reset(netdev);
++ case ETHTOOL_GLINK:
++ return ethtool_get_link(netdev);
++ default:
++ return -EOPNOTSUPP;
++ }
++ return -EOPNOTSUPP;
++}
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++struct ethtool_ops r1000_ethtool_ops = {
++ .get_settings = ethtool_get_settings,
++ .set_settings = ethtool_set_settings,
++ .get_drvinfo = ethtool_get_drvinfo,
++ .nway_reset = ethtool_nway_reset,
++ .get_link = ethtool_get_link,
++};
++#endif
+Index: linux-2.6.20.1/drivers/net/r1000_n.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.20.1/drivers/net/r1000_n.c 2007-02-28 20:29:04.000000000 +0100
+@@ -0,0 +1,1767 @@
++//=========================================================================\r
++//Realtek Ethernet driver for Linux kernel 2.4.x. and 2.6.x\r
++//=========================================================================\r
++\r
++#include "r1000.h"\r
++\r
++#ifdef MODULE_PARM\r
++static int speed[MAX_UNITS] = {-1,-1,-1,-1,-1,-1,-1,-1};\r
++\r
++static int duplex[MAX_UNITS] = {-1,-1,-1,-1,-1,-1,-1,-1};\r
++\r
++static int autoneg[MAX_UNITS] = {-1,-1,-1,-1,-1,-1,-1,-1};\r
++#endif //MODULE_PARM\r
++\r
++/* Maximum events (Rx packets, etc.) to handle at each interrupt. */\r
++static int max_interrupt_work = 20;\r
++\r
++/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).\r
++ The RTL chips use a 64 element hash table based on the Ethernet CRC. */\r
++static int multicast_filter_limit = 32;\r
++\r
++const static struct {\r
++ const char *name;\r
++ u8 mcfg; /* depend on documents of Realtek */\r
++ u32 RxConfigMask; /* should clear the bits supported by this chip */\r
++} rtl_chip_info[] = {\r
++ { "RTL8169", MCFG_METHOD_1, 0xff7e1880 },\r
++ { "RTL8169S/8110S", MCFG_METHOD_2, 0xff7e1880 },\r
++ { "RTL8169S/8110S", MCFG_METHOD_3, 0xff7e1880 },\r
++ { "RTL8169SB/8110SB", MCFG_METHOD_4, 0xff7e1880 },\r
++ { "RTL8110SC", MCFG_METHOD_5, 0xff7e1880 },\r
++ { "RTL8168B/8111B", MCFG_METHOD_11, 0xff7e1880 },\r
++ { "RTL8168B/8111B", MCFG_METHOD_12, 0xff7e1880 },\r
++ { "RTL8101E", MCFG_METHOD_13, 0xff7e1880 },\r
++ { "RTL8100E", MCFG_METHOD_14, 0xff7e1880 },\r
++ { "RTL8100E", MCFG_METHOD_15, 0xff7e1880 },\r
++ { 0 }\r
++};\r
++\r
++\r
++static struct pci_device_id r1000_pci_tbl[] __devinitdata = {\r
++ { 0x10ec, 0x8169, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },\r
++ { 0x10ec, 0x8167, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },\r
++ { 0x10ec, 0x8168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },\r
++ { 0x10ec, 0x8136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },\r
++ {0,}\r
++};\r
++\r
++\r
++MODULE_DEVICE_TABLE (pci, r1000_pci_tbl);\r
++MODULE_AUTHOR ("Realtek");\r
++MODULE_DESCRIPTION ("Linux device driver for Realtek Ethernet Controllers");\r
++\r
++#ifdef MODULE_PARM\r
++MODULE_PARM (speed, "1-" __MODULE_STRING(MAX_UNITS) "i");\r
++MODULE_PARM_DESC(speed,"Link speed");\r
++MODULE_PARM (duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");\r
++MODULE_PARM_DESC(duplex,"Link duplex");\r
++MODULE_PARM (autoneg, "1-" __MODULE_STRING(MAX_UNITS) "i");\r
++MODULE_PARM_DESC(autoneg,"Autonegotiation");\r
++#else //MODULE_PARM\r
++/* Module Parameters are always initialized to -1, so that the driver\r
++ * can tell the difference between no user specified value or the\r
++ * user asking for the default value.\r
++ * The true default values are loaded in when e1000_check_options is called.\r
++ *\r
++ * This is a GCC extension to ANSI C.\r
++ * See the item "Labeled Elements in Initializers" in the section\r
++ * "Extensions to the C Language Family" of the GCC documentation.\r
++ */\r
++#define R1000_PARAM_INIT { [0 ... MAX_UNITS] = OPTION_UNSET }\r
++/* All parameters are treated the same, as an integer array of values.\r
++ * This macro just reduces the need to repeat the same declaration code\r
++ * over and over (plus this helps to avoid typo bugs).\r
++ */\r
++#define R1000_PARAM(X, S) \\r
++ static int __devinitdata X[MAX_UNITS+1] = R1000_PARAM_INIT; \\r
++ static int num_##X = 0; \\r
++ module_param_array(X, int, &num_##X, 0); \\r
++ MODULE_PARM_DESC(X, S);\r
++/* Link Speed\r
++ * Valid Values: 10Mbps, 100Mbps, and 1000Mbps\r
++ * Defaule value: 100Mbps \r
++ */\r
++R1000_PARAM(speed, "Link speed");\r
++/* Link duplex\r
++ * Valid Values: half duplex and full duplex\r
++ * Defaule value: full duplex\r
++ */\r
++R1000_PARAM(duplex, "Link duplex");\r
++/* Autonegotiation\r
++ * Valid Values: enable and disable\r
++ * Defaule value: enable\r
++ */\r
++R1000_PARAM(autoneg, "Autonegotiation");\r
++#endif //MODULE_PARM\r
++\r
++MODULE_LICENSE("GPL");\r
++\r
++\r
++static int r1000_open (struct net_device *netdev);\r
++static int r1000_start_xmit (struct sk_buff *skb, struct net_device *netdev);\r
++\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)\r
++//typedef int irqreturn_t;\r
++#define IRQ_NONE 0\r
++#define IRQ_HANDLED 1\r
++static void r1000_interrupt (int irq, void *dev_instance, struct pt_regs *regs);\r
++#else\r
++static irqreturn_t r1000_interrupt (int irq, void *dev_instance, struct pt_regs *regs);\r
++#endif\r
++\r
++static void r1000_init_ring (struct net_device *netdev);\r
++static void r1000_hw_start (struct net_device *netdev);\r
++static int r1000_close (struct net_device *netdev);\r
++static inline u32 ether_crc (int length, unsigned char *data);\r
++static void r1000_set_rx_mode (struct net_device *netdev);\r
++static void r1000_tx_timeout (struct net_device *netdev);\r
++static struct net_device_stats *r1000_get_stats(struct net_device *netdev);\r
++\r
++#ifdef R1000_JUMBO_FRAME_SUPPORT\r
++static int r1000_change_mtu(struct net_device *netdev, int new_mtu);\r
++#endif //end #ifdef R1000_JUMBO_FRAME_SUPPORT\r
++\r
++static void r1000_hw_PHY_config (struct net_device *netdev);\r
++static void r1000_hw_PHY_reset(struct net_device *netdev);\r
++//static const u16 r1000_intr_mask=LinkChg|RxDescUnavail|RxFIFOOver|TxErr|TxOK|RxErr|RxOK;\r
++static const u16 r1000_intr_mask=LinkChg|RxDescUnavail|TxErr|TxOK|RxErr|RxOK;\r
++static const unsigned int r1000_rx_config=(RX_FIFO_THRESH<<RxCfgFIFOShift)|(RX_DMA_BURST<<RxCfgDMAShift)|0x0000000E;\r
++\r
++static int r1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);\r
++extern int ethtool_ioctl(struct ifreq *ifr);\r
++extern struct ethtool_ops r1000_ethtool_ops;\r
++static int r1000_set_speed_duplex(unsigned long ioaddr, unsigned int anar, unsigned int gbcr, unsigned int bmcr);\r
++\r
++static void r1000_rx_action(struct net_device *netdev);\r
++static void r1000_tx_action(struct net_device *netdev);\r
++\r
++#ifdef R1000_BOTTOM_HALVES\r
++static void r1000_rx_interrupt(unsigned long ndev);\r
++static void r1000_tx_interrupt(unsigned long ndev);\r
++#else\r
++static void r1000_rx_interrupt(struct net_device *netdev, struct r1000_private *priv, unsigned long ioaddr);\r
++static void r1000_tx_interrupt (struct net_device *netdev, struct r1000_private *priv, unsigned long ioaddr);\r
++#endif //R1000_BOTTOM_HALVES\r
++\r
++\r
++\r
++#ifdef R1000_DEBUG\r
++unsigned alloc_rxskb_cnt = 0;\r
++#define R1000_ALLOC_RXSKB(bufsize) dev_alloc_skb(bufsize); alloc_rxskb_cnt ++ ;\r
++#define R1000_FREE_RXSKB(skb) kfree_skb(skb); alloc_rxskb_cnt -- ;\r
++#define R1000_NETIF_RX(skb) netif_rx(skb); alloc_rxskb_cnt -- ;\r
++#else\r
++#define R1000_ALLOC_RXSKB(bufsize) dev_alloc_skb(bufsize);\r
++#define R1000_FREE_RXSKB(skb) kfree_skb(skb);\r
++#define R1000_NETIF_RX(skb) netif_rx(skb);\r
++#endif //end #ifdef R1000_DEBUG\r
++\r
++\r
++//=================================================================\r
++// PHYAR\r
++// bit Symbol\r
++// 31 Flag\r
++// 30-21 reserved\r
++// 20-16 5-bit GMII/MII register address\r
++// 15-0 16-bit GMII/MII register data\r
++//=================================================================\r
++void R1000_WRITE_GMII_REG( unsigned long ioaddr, int RegAddr, int value )\r
++{\r
++ int i;\r
++\r
++ RTL_W32 ( PHYAR, 0x80000000 | (RegAddr&0xFF)<<16 | value);\r
++ udelay(1000);\r
++\r
++ for( i = 2000; i > 0 ; i -- ){\r
++ // Check if the RTL8169 has completed writing to the specified MII register\r
++ if( ! (RTL_R32(PHYAR)&0x80000000) ){\r
++ break;\r
++ }\r
++ else{\r
++ udelay(100);\r
++ }// end of if( ! (RTL_R32(PHYAR)&0x80000000) )\r
++ }// end of for() loop\r
++}\r
++//=================================================================\r
++int R1000_READ_GMII_REG( unsigned long ioaddr, int RegAddr )\r
++{\r
++ int i, value = -1;\r
++\r
++ RTL_W32 ( PHYAR, 0x0 | (RegAddr&0xFF)<<16 );\r
++ udelay(1000);\r
++\r
++ for( i = 2000; i > 0 ; i -- ){\r
++ // Check if the RTL8169 has completed retrieving data from the specified MII register\r
++ if( RTL_R32(PHYAR) & 0x80000000 ){\r
++ value = (int)( RTL_R32(PHYAR)&0xFFFF );\r
++ break;\r
++ }\r
++ else{\r
++ udelay(100);\r
++ }// end of if( RTL_R32(PHYAR) & 0x80000000 )\r
++ }// end of for() loop\r
++ return value;\r
++}\r
++\r
++void r1000_phy_timer_t_handler( void *timer_data )\r
++{\r
++ struct net_device *netdev = (struct net_device *)timer_data;\r
++ struct r1000_private *priv = (struct r1000_private *) (netdev->priv);\r
++ unsigned long ioaddr = priv->ioaddr;\r
++\r
++ assert( priv->mcfg > MCFG_METHOD_1 );\r
++ assert( priv->pcfg < PCFG_METHOD_3 );\r
++\r
++ if( RTL_R8(PHYstatus) & LinkStatus ){\r
++ priv->phy_link_down_cnt = 0 ;\r
++ }\r
++ else{\r
++ priv->phy_link_down_cnt ++ ;\r
++ if( priv->phy_link_down_cnt >= 12 ){\r
++ // If link on 1000, perform phy reset.\r
++ if( R1000_READ_GMII_REG( ioaddr, PHY_1000_CTRL_REG ) & PHY_Cap_1000_Full )\r
++ {\r
++ DBG_PRINT("r1000_hw_PHY_reset\n");\r
++ r1000_hw_PHY_reset(netdev);\r
++ }\r
++\r
++ priv->phy_link_down_cnt = 0 ;\r
++ }\r
++ }\r
++\r
++ //---------------------------------------------------------------------------\r
++ //mod_timer is a more efficient way to update the expire field of an active timer.\r
++ //---------------------------------------------------------------------------\r
++// r1000_mod_timer( (&priv->phy_timer_t), 100 );\r
++}\r
++\r
++void r1000_timer_handler( void *timer_data )\r
++{\r
++ struct net_device *netdev = (struct net_device *)timer_data;\r
++ struct r1000_private *priv = (struct r1000_private *) (netdev->priv);\r
++\r
++ if( (priv->mcfg > MCFG_METHOD_1) && (priv->pcfg < PCFG_METHOD_3) ){\r
++ DBG_PRINT("FIX PCS -> r1000_phy_timer_t_handler\n");\r
++ priv->phy_link_down_cnt = 0;\r
++ r1000_phy_timer_t_handler( timer_data );\r
++ }\r
++\r
++ r1000_mod_timer( (&priv->r1000_timer), priv->expire_time );\r
++}\r
++\r
++static int r1000_set_speed_duplex(unsigned long ioaddr, unsigned int anar, unsigned int gbcr, unsigned int bmcr){\r
++ unsigned int i = 0;\r
++ unsigned int bmsr;\r
++\r
++ R1000_WRITE_GMII_REG(ioaddr,PHY_AUTO_NEGO_REG,anar);\r
++ R1000_WRITE_GMII_REG(ioaddr,PHY_1000_CTRL_REG,gbcr);\r
++ R1000_WRITE_GMII_REG(ioaddr,PHY_CTRL_REG,bmcr);\r
++\r
++ for(i=0;i<10000;i++){\r
++ bmsr = R1000_READ_GMII_REG(ioaddr,PHY_STAT_REG);\r
++ if(bmsr&PHY_Auto_Neco_Comp)\r
++ return 0;\r
++ }\r
++ return -1; \r
++}\r
++\r
++static int __devinit r1000_init_board ( struct pci_dev *pdev, struct net_device **netdev_out, unsigned long *ioaddr_out)\r
++{\r
++ unsigned long ioaddr = 0;\r
++ struct net_device *netdev;\r
++ struct r1000_private *priv;\r
++ int rc, i;\r
++#ifndef R1000_USE_IO\r
++ unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;\r
++#endif\r
++\r
++ assert (pdev != NULL);\r
++ assert (ioaddr_out != NULL);\r
++\r
++ *ioaddr_out = 0;\r
++ *netdev_out = NULL;\r
++\r
++ // dev zeroed in init_etherdev\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)\r
++ netdev = init_etherdev (NULL, sizeof (*priv));\r
++#else\r
++ netdev = alloc_etherdev (sizeof (*priv));\r
++#endif\r
++\r
++ if (netdev == NULL) {\r
++ printk (KERN_ERR PFX "unable to alloc new ethernet\n");\r
++ return -ENOMEM;\r
++ }\r
++\r
++ SET_MODULE_OWNER(netdev);\r
++\r
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)\r
++ SET_NETDEV_DEV(netdev, &pdev->dev);\r
++#endif\r
++\r
++ priv = netdev->priv;\r
++\r
++ // enable device (incl. PCI PM wakeup and hotplug setup)\r
++ rc = pci_enable_device (pdev);\r
++ if (rc)\r
++ goto err_out;\r
++\r
++#ifndef R1000_USE_IO\r
++ mmio_start = pci_resource_start (pdev, 1);\r
++ mmio_end = pci_resource_end (pdev, 1);\r
++ mmio_flags = pci_resource_flags (pdev, 1);\r
++ mmio_len = pci_resource_len (pdev, 1);\r
++\r
++ // make sure PCI base addr 1 is MMIO\r
++ if (!(mmio_flags & IORESOURCE_MEM)) {\r
++ printk (KERN_ERR PFX "region #1 not an MMIO resource, aborting\n");\r
++ rc = -ENODEV;\r
++ goto err_out;\r
++ }\r
++\r
++ // check for weird/broken PCI region reporting\r
++ if ( mmio_len < RTL_MIN_IO_SIZE ) {\r
++ printk (KERN_ERR PFX "Invalid PCI region size(s), aborting\n");\r
++ rc = -ENODEV;\r
++ goto err_out;\r
++ }\r
++#endif\r
++\r
++ rc = pci_request_regions (pdev, netdev->name);\r
++ if (rc)\r
++ goto err_out;\r
++\r
++ // enable PCI bus-mastering\r
++ pci_set_master (pdev);\r
++\r
++#ifdef R1000_USE_IO\r
++ ioaddr = pci_resource_start(pdev, 0);\r
++#else\r
++ // ioremap MMIO region\r
++ ioaddr = (unsigned long)ioremap (mmio_start, mmio_len);\r
++ if (ioaddr == 0) {\r
++ printk (KERN_ERR PFX "cannot remap MMIO, aborting\n");\r
++ rc = -EIO;\r
++ goto err_out_free_res;\r
++ }\r
++#endif\r
++\r
++ // Soft reset the chip.\r
++ RTL_W8 ( ChipCmd, CmdReset);\r
++\r
++ // Check that the chip has finished the reset.\r
++ for (i = 1000; i > 0; i--){\r
++ if ( (RTL_R8(ChipCmd) & CmdReset) == 0){\r
++ break;\r
++ }\r
++ else{\r
++ udelay (10);\r
++ }\r
++ }\r
++\r
++ // identify config method\r
++ {\r
++ unsigned long val32 = (RTL_R32(TxConfig)&0x7c800000);\r
++\r
++ if( val32 == 0x38800000)\r
++ priv->mcfg = MCFG_METHOD_15;\r
++ else if( val32 == 0x30800000)\r
++ priv->mcfg = MCFG_METHOD_14;\r
++ else if( val32 == 0x34000000)\r
++ priv->mcfg = MCFG_METHOD_13;\r
++ else if( val32 == 0x38000000)\r
++ priv->mcfg = MCFG_METHOD_12;\r
++ else if( val32 == 0x30000000)\r
++ priv->mcfg = MCFG_METHOD_11;\r
++ else if( val32 == 0x18000000)\r
++ priv->mcfg = MCFG_METHOD_5;\r
++ else if( val32 == 0x10000000 )\r
++ priv->mcfg = MCFG_METHOD_4;\r
++ else if( val32 == 0x04000000 )\r
++ priv->mcfg = MCFG_METHOD_3;\r
++ else if( val32 == 0x00800000 )\r
++ priv->mcfg = MCFG_METHOD_2;\r
++ else if( val32 == 0x00000000 )\r
++ priv->mcfg = MCFG_METHOD_1;\r
++ else\r
++ priv->mcfg = MCFG_METHOD_1;\r
++ }\r
++ {\r
++ unsigned char val8 = (unsigned char)(R1000_READ_GMII_REG(ioaddr,3)&0x000f);\r
++ if( val8 == 0x00 ){\r
++ priv->pcfg = PCFG_METHOD_1;\r
++ }\r
++ else if( val8 == 0x01 ){\r
++ priv->pcfg = PCFG_METHOD_2;\r
++ }\r
++ else if( val8 == 0x02 ){\r
++ priv->pcfg = PCFG_METHOD_3;\r
++ }\r
++ else{\r
++ priv->pcfg = PCFG_METHOD_3;\r
++ }\r
++ }\r
++\r
++\r
++ for (i = ARRAY_SIZE (rtl_chip_info) - 1; i >= 0; i--){\r
++ if (priv->mcfg == rtl_chip_info[i].mcfg) {\r
++ priv->chipset = i;\r
++ goto match;\r
++ }\r
++ }\r
++\r
++ //if unknown chip, assume array element #0, original RTL-8169 in this case\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)\r
++ printk (KERN_DEBUG PFX "PCI device %s: unknown chip version, assuming RTL-8169\n", pdev->slot_name);\r
++#endif\r
++ priv->chipset = 0;\r
++\r
++match:\r
++ *ioaddr_out = ioaddr;\r
++ *netdev_out = netdev;\r
++ return 0;\r
++\r
++#ifndef R1000_USE_IO\r
++err_out_free_res:\r
++ pci_release_regions (pdev);\r
++#endif\r
++\r
++err_out:\r
++ unregister_netdev(netdev);\r
++ kfree(netdev);\r
++ return rc;\r
++}\r
++\r
++int r1000_set_medium(struct net_device *netdev,u16 speed,u8 duplex,u8 autoneg){\r
++ struct r1000_private *priv = (struct r1000_private *)(netdev->priv);\r
++ unsigned long ioaddr = priv->ioaddr;\r
++ unsigned int anar=0,gbcr=0,bmcr=0,ret=0,val=0;\r
++\r
++ val = R1000_READ_GMII_REG( ioaddr, PHY_AUTO_NEGO_REG );\r
++#ifdef R1000_HW_FLOW_CONTROL_SUPPORT\r
++ val |= PHY_Cap_PAUSE | PHY_Cap_ASYM_PAUSE ;\r
++#endif //end #define R1000_HW_FLOW_CONTROL_SUPPORT\r
++\r
++ bmcr = PHY_Restart_Auto_Nego|PHY_Enable_Auto_Nego;\r
++\r
++ if(autoneg==AUTONEG_ENABLE){\r
++ priv->autoneg = AUTONEG_ENABLE;\r
++ anar = PHY_Cap_10_Half|PHY_Cap_10_Full|PHY_Cap_100_Half|PHY_Cap_100_Full;\r
++ gbcr = PHY_Cap_1000_Half|PHY_Cap_1000_Full;\r
++ }else{\r
++ priv->autoneg = AUTONEG_DISABLE;\r
++ if(speed==SPEED_1000){\r
++ priv->speed = SPEED_1000;\r
++ priv->duplex = DUPLEX_FULL;\r
++\r
++ anar = PHY_Cap_10_Half|PHY_Cap_10_Full|PHY_Cap_100_Half|PHY_Cap_100_Full;\r
++ if((priv->mcfg==MCFG_METHOD_13)||(priv->mcfg==MCFG_METHOD_14)||(priv->mcfg==MCFG_METHOD_15))\r
++ gbcr = PHY_Cap_Null;\r
++ else\r
++ gbcr = PHY_Cap_1000_Half|PHY_Cap_1000_Full;\r
++ }else if((speed==SPEED_100)&&(duplex==DUPLEX_FULL)){\r
++ priv->speed = SPEED_100;\r
++ priv->duplex = DUPLEX_FULL;\r
++\r
++ anar = PHY_Cap_10_Half|PHY_Cap_10_Full|PHY_Cap_100_Half|PHY_Cap_100_Full;\r
++ gbcr = PHY_Cap_Null;\r
++ }else if((speed==SPEED_100)&&(duplex==DUPLEX_HALF)){\r
++ priv->speed = SPEED_100;\r
++ priv->duplex = DUPLEX_HALF;\r
++\r
++ anar = PHY_Cap_10_Half|PHY_Cap_10_Full|PHY_Cap_100_Half;\r
++ gbcr = PHY_Cap_Null;\r
++ }else if((speed==SPEED_10)&&(duplex==DUPLEX_FULL)){\r
++ priv->speed = SPEED_10;\r
++ priv->duplex = DUPLEX_FULL;\r
++\r
++ anar = PHY_Cap_10_Half|PHY_Cap_10_Full;\r
++ gbcr = PHY_Cap_Null;\r
++ }else if((speed==SPEED_10)&&(duplex==DUPLEX_HALF)){\r
++ priv->speed = SPEED_10;\r
++ priv->duplex = DUPLEX_HALF;\r
++\r
++ anar = PHY_Cap_10_Half;\r
++ gbcr = PHY_Cap_Null;\r
++ }else{\r
++ priv->speed = SPEED_100;\r
++ priv->duplex = DUPLEX_FULL;\r
++\r
++ anar = PHY_Cap_10_Half|PHY_Cap_10_Full|PHY_Cap_100_Half|PHY_Cap_100_Full;\r
++ gbcr = PHY_Cap_Null;\r
++ }\r
++ }\r
++\r
++ //enable flow control\r
++ anar |= val&0xC1F;\r
++\r
++ ret = r1000_set_speed_duplex(ioaddr,anar,gbcr,bmcr);\r
++ \r
++ return ret;\r
++}\r
++\r
++\r
++static int r1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd){\r
++\r
++ if(!netif_running(netdev))\r
++ return -EINVAL;\r
++\r
++ switch(cmd){\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)\r
++ case SIOCETHTOOL:\r
++ return ethtool_ioctl(ifr);\r
++#endif\r
++ default:\r
++ return -EOPNOTSUPP;\r
++ }\r
++}\r
++\r
++\r
++\r
++\r
++\r
++//======================================================================================================\r
++static int __devinit r1000_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)\r
++{\r
++ struct net_device *netdev = NULL;\r
++ struct r1000_private *priv = NULL;\r
++ unsigned long ioaddr = 0;\r
++ static int board_idx = -1;\r
++ int i,rc;\r
++// int val=0;\r
++ int speed_opt = SPEED_100;\r
++ int duplex_opt = DUPLEX_FULL;\r
++ int autoneg_opt = AUTONEG_ENABLE;\r
++\r
++\r
++ assert (pdev != NULL);\r
++ assert (ent != NULL);\r
++\r
++ board_idx++;\r
++\r
++\r
++ i = r1000_init_board (pdev, &netdev, &ioaddr);\r
++ if (i < 0) {\r
++ return i;\r
++ }\r
++\r
++ priv = netdev->priv;\r
++\r
++ assert (ioaddr != NULL);\r
++ assert (netdev != NULL);\r
++ assert (priv != NULL);\r
++\r
++ // Get MAC address //\r
++ for (i = 0; i < MAC_ADDR_LEN ; i++){\r
++ netdev->dev_addr[i] = RTL_R8( MAC0 + i );\r
++ }\r
++\r
++ netdev->open = r1000_open;\r
++ netdev->hard_start_xmit = r1000_start_xmit;\r
++ netdev->get_stats = r1000_get_stats;\r
++ netdev->stop = r1000_close;\r
++ netdev->tx_timeout = r1000_tx_timeout;\r
++ netdev->set_multicast_list = r1000_set_rx_mode;\r
++ netdev->watchdog_timeo = TX_TIMEOUT;\r
++ netdev->irq = pdev->irq;\r
++ netdev->base_addr = (unsigned long) ioaddr;\r
++\r
++#ifdef R1000_JUMBO_FRAME_SUPPORT\r
++ netdev->change_mtu = r1000_change_mtu;\r
++#endif //end #ifdef R1000_JUMBO_FRAME_SUPPORT\r
++\r
++ netdev->do_ioctl = r1000_ioctl;\r
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)\r
++ netdev->ethtool_ops = &r1000_ethtool_ops;\r
++#endif\r
++\r
++#ifdef R1000_BOTTOM_HALVES\r
++ tasklet_init(&priv->r1000_rx_tasklet,r1000_rx_interrupt,(unsigned long)netdev);\r
++ tasklet_init(&priv->r1000_tx_tasklet,r1000_tx_interrupt,(unsigned long)netdev);\r
++#endif //R1000_BOTTOM_HALVES\r
++\r
++\r
++ priv = netdev->priv; // private data //\r
++ priv->pci_dev = pdev;\r
++ priv->ioaddr = ioaddr;\r
++\r
++//#ifdef R1000_JUMBO_FRAME_SUPPORT\r
++ priv->curr_mtu_size = netdev->mtu;\r
++ priv->tx_pkt_len = netdev->mtu + ETH_HDR_LEN;\r
++ priv->rx_pkt_len = netdev->mtu + ETH_HDR_LEN;\r
++ priv->hw_rx_pkt_len = priv->rx_pkt_len + 8;\r
++//#endif //end #ifdef R1000_JUMBO_FRAME_SUPPORT\r
++\r
++ DBG_PRINT("-------------------------- \n");\r
++ DBG_PRINT("netdev->mtu = %d \n", netdev->mtu);\r
++ DBG_PRINT("priv->curr_mtu_size = %d \n", priv->curr_mtu_size);\r
++ DBG_PRINT("priv->tx_pkt_len = %d \n", priv->tx_pkt_len);\r
++ DBG_PRINT("priv->rx_pkt_len = %d \n", priv->rx_pkt_len);\r
++ DBG_PRINT("priv->hw_rx_pkt_len = %d \n", priv->hw_rx_pkt_len);\r
++ DBG_PRINT("-------------------------- \n");\r
++\r
++ spin_lock_init(&priv->lock);\r
++ spin_lock_init(&priv->tx_lock);\r
++ spin_lock_init(&priv->rx_lock);\r
++\r
++ rc = register_netdev(netdev);\r
++ if(rc){\r
++#ifndef R1000_USE_IO\r
++ iounmap ((void *)(netdev->base_addr));\r
++#endif\r
++ pci_release_regions(pdev);\r
++ pci_disable_device(pdev);\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)\r
++ kfree(netdev);\r
++#else\r
++ free_netdev(netdev);\r
++#endif\r
++ return rc;\r
++ }\r
++\r
++ pci_set_drvdata(pdev,netdev); // pdev->driver_data = data;\r
++\r
++\r
++ printk (KERN_DEBUG "%s: Identified chip type is '%s'.\n",netdev->name,rtl_chip_info[priv->chipset].name);\r
++ printk (KERN_INFO "%s: %s at 0x%lx, "\r
++ "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "\r
++ "IRQ %d\n",\r
++ netdev->name,\r
++ R1000_DRIVER_NAME,\r
++ netdev->base_addr,\r
++ netdev->dev_addr[0],netdev->dev_addr[1],\r
++ netdev->dev_addr[2],netdev->dev_addr[3],\r
++ netdev->dev_addr[4],netdev->dev_addr[5],\r
++ netdev->irq);\r
++\r
++\r
++ // Config PHY\r
++ r1000_hw_PHY_config(netdev);\r
++\r
++ DBG_PRINT("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");\r
++ RTL_W8( 0x82, 0x01 );\r
++\r
++ if( priv->mcfg < MCFG_METHOD_3 ){\r
++ DBG_PRINT("Set PCI Latency=0x40\n");\r
++ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);\r
++ }\r
++\r
++ if( priv->mcfg == MCFG_METHOD_2 ){\r
++ DBG_PRINT("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");\r
++ RTL_W8( 0x82, 0x01 );\r
++ DBG_PRINT("Set PHY Reg 0x0bh = 0x00h\n");\r
++ R1000_WRITE_GMII_REG( ioaddr, 0x0b, 0x0000 ); //w 0x0b 15 0 0\r
++ }\r
++\r
++ // if TBI is not endbled\r
++ if( !(RTL_R8(PHYstatus) & TBI_Enable) ){\r
++// val = R1000_READ_GMII_REG( ioaddr, PHY_AUTO_NEGO_REG );\r
++\r
++//#ifdef R1000_HW_FLOW_CONTROL_SUPPORT\r
++// val |= PHY_Cap_PAUSE | PHY_Cap_ASYM_PAUSE ;\r
++//#endif //end #define R1000_HW_FLOW_CONTROL_SUPPORT\r
++\r
++ if(speed[board_idx] == -1)\r
++ speed[board_idx] = SPEED_1000;\r
++\r
++ if((duplex[board_idx] == -1) || ((duplex[board_idx] == DUPLEX_HALF) && (speed[board_idx] == SPEED_1000)))\r
++ duplex[board_idx] = DUPLEX_FULL;\r
++\r
++ if(autoneg[board_idx] == -1)\r
++ autoneg[board_idx] = AUTONEG_ENABLE;\r
++\r
++ speed_opt = (board_idx >= MAX_UNITS) ? -1 : speed[board_idx];\r
++ duplex_opt = (board_idx >= MAX_UNITS) ? -1 : duplex[board_idx];\r
++ autoneg_opt = (board_idx >= MAX_UNITS) ? -1 : autoneg[board_idx];\r
++\r
++ r1000_set_medium(netdev,speed_opt,duplex_opt,autoneg_opt);\r
++ }// end of TBI is not enabled\r
++ else{\r
++ udelay(100);\r
++ DBG_PRINT("1000Mbps Full-duplex operation, TBI Link %s!\n",(RTL_R32(TBICSR) & TBILinkOK) ? "OK" : "Failed" );\r
++ }// end of TBI is not enabled\r
++\r
++ //show some information after the driver is inserted\r
++ if(( priv->mcfg == MCFG_METHOD_11 )||( priv->mcfg == MCFG_METHOD_12 ))\r
++ printk("Realtek RTL8168/8111 Family PCI-E Gigabit Ethernet Network Adapter\n");\r
++ else if((priv->mcfg==MCFG_METHOD_13)||(priv->mcfg==MCFG_METHOD_14)||(priv->mcfg==MCFG_METHOD_15))\r
++ printk("Realtek RTL8139/810x Family Fast Ethernet Network Adapter\n");\r
++ else\r
++ printk("Realtek RTL8169/8110 Family Gigabit Ethernet Network Adapter\n");\r
++\r
++ printk("Driver version:%s\n",R1000_VERSION);\r
++ printk("Released date:%s\n",RELEASE_DATE);\r
++ if(RTL_R8(PHYstatus) & LinkStatus){\r
++ printk("Link Status:%s\n","Linked");\r
++\r
++ if(RTL_R8(PHYstatus) & _1000Mbps)\r
++ printk("Link Speed:1000Mbps\n");\r
++ else if(RTL_R8(PHYstatus) & _100Mbps)\r
++ printk("Link Speed:100Mbps\n");\r
++ else if(RTL_R8(PHYstatus) & _10Mbps)\r
++ printk("Link Speed:10Mbps\n");\r
++\r
++ printk("Duplex mode:%s\n",RTL_R8(PHYstatus)&FullDup?"Full-Duplex":"Half-Duplex");\r
++ }else{\r
++ printk("Link Status:%s\n","Not Linked");\r
++ }\r
++#ifdef R1000_USE_IO\r
++ printk("I/O Base:0x%X(I/O port)\n",(unsigned int)(priv->ioaddr));\r
++#else\r
++ printk("I/O Base:0x%X(I/O memory)\n",(unsigned int)(priv->ioaddr));\r
++#endif //R1000_USE_IO\r
++ printk("IRQ:%d\n",netdev->irq);\r
++\r
++ return 0;\r
++}\r
++\r
++static void __devexit r1000_remove_one (struct pci_dev *pdev)\r
++{\r
++ struct net_device *netdev = pci_get_drvdata(pdev);\r
++\r
++ assert (netdev != NULL);\r
++ assert (priv != NULL);\r
++\r
++ unregister_netdev(netdev);\r
++\r
++#ifndef R1000_USE_IO\r
++ iounmap ((void *)(netdev->base_addr));\r
++#endif\r
++ pci_release_regions (pdev);\r
++\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)\r
++ kfree(netdev);\r
++#else\r
++ free_netdev(netdev);\r
++#endif\r
++\r
++ pci_set_drvdata (pdev, NULL);\r
++}\r
++\r
++static int r1000_open (struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ struct pci_dev *pdev = priv->pci_dev;\r
++ int retval;\r
++// u8 diff;\r
++// u32 TxPhyAddr, RxPhyAddr;\r
++\r
++\r
++ if( priv->drvinit_fail == 1 ){\r
++ printk("%s: Gigabit driver open failed.\n", netdev->name );\r
++ return -ENOMEM;\r
++ }\r
++\r
++ retval = request_irq (netdev->irq, r1000_interrupt, SA_SHIRQ, netdev->name, netdev);\r
++ if (retval) {\r
++ return retval;\r
++ }\r
++\r
++ //2004-05-11\r
++ // Allocate tx/rx descriptor space\r
++ priv->sizeof_txdesc_space = NUM_TX_DESC * sizeof(struct TxDesc)+256;\r
++ priv->txdesc_space = pci_alloc_consistent( pdev, priv->sizeof_txdesc_space, &priv->txdesc_phy_dma_addr );\r
++ if( priv->txdesc_space == NULL ){\r
++ printk("%s: Gigabit driver alloc txdesc_space failed.\n", netdev->name );\r
++ return -ENOMEM;\r
++ }\r
++ priv->sizeof_rxdesc_space = NUM_RX_DESC * sizeof(struct RxDesc)+256;\r
++ priv->rxdesc_space = pci_alloc_consistent( pdev, priv->sizeof_rxdesc_space, &priv->rxdesc_phy_dma_addr );\r
++ if( priv->rxdesc_space == NULL ){\r
++ printk("%s: Gigabit driver alloc rxdesc_space failed.\n", netdev->name );\r
++ return -ENOMEM;\r
++ }\r
++\r
++ if(priv->txdesc_phy_dma_addr & 0xff){\r
++ printk("%s: Gigabit driver txdesc_phy_dma_addr is not 256-bytes-aligned.\n", netdev->name );\r
++ }\r
++ if(priv->rxdesc_phy_dma_addr & 0xff){\r
++ printk("%s: Gigabit driver rxdesc_phy_dma_addr is not 256-bytes-aligned.\n", netdev->name );\r
++ }\r
++ // Set tx/rx descriptor space\r
++ priv->TxDescArray = (struct TxDesc *)priv->txdesc_space;\r
++ priv->RxDescArray = (struct RxDesc *)priv->rxdesc_space;\r
++\r
++ {\r
++ int i;\r
++ struct sk_buff *skb = NULL;\r
++\r
++ for(i=0;i<NUM_RX_DESC;i++){\r
++ skb = R1000_ALLOC_RXSKB(MAX_RX_SKBDATA_SIZE);\r
++ if( skb != NULL ) {\r
++ skb_reserve (skb, 8); // 16 byte align the IP fields. //\r
++ priv->Rx_skbuff[i] = skb;\r
++ }\r
++ else{\r
++ printk("%s: Gigabit driver failed to allocate skbuff.\n", netdev->name);\r
++ priv->drvinit_fail = 1;\r
++ }\r
++ }\r
++ }\r
++\r
++\r
++ //////////////////////////////////////////////////////////////////////////////\r
++ r1000_init_ring(netdev);\r
++ r1000_hw_start(netdev);\r
++\r
++\r
++ // ------------------------------------------------------\r
++ DBG_PRINT("FIX PCS -> r1000_request_timer\n");\r
++ priv->expire_time = R1000_TIMER_EXPIRE_TIME;\r
++ r1000_request_timer( (&priv->r1000_timer), priv->expire_time, r1000_timer_handler, ((void *)netdev) ); //in open()\r
++\r
++\r
++ DBG_PRINT("%s: %s() alloc_rxskb_cnt = %d\n", netdev->name, __FUNCTION__, alloc_rxskb_cnt );\r
++\r
++ return 0;\r
++\r
++}//end of r1000_open (struct net_device *netdev)\r
++\r
++static void r1000_hw_PHY_reset(struct net_device *netdev)\r
++{\r
++ int val, phy_reset_expiretime = 50;\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++\r
++ DBG_PRINT("%s: Reset RTL8169s PHY\n", netdev->name);\r
++\r
++ val = ( R1000_READ_GMII_REG( ioaddr, 0 ) | 0x8000 ) & 0xffff;\r
++ R1000_WRITE_GMII_REG( ioaddr, 0, val );\r
++\r
++ do //waiting for phy reset\r
++ {\r
++ if( R1000_READ_GMII_REG( ioaddr, 0 ) & 0x8000 ){\r
++ phy_reset_expiretime --;\r
++ udelay(100);\r
++ }\r
++ else{\r
++ break;\r
++ }\r
++ }while( phy_reset_expiretime >= 0 );\r
++\r
++ assert( phy_reset_expiretime > 0 );\r
++}\r
++\r
++static void r1000_hw_PHY_config (struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ void *ioaddr = (void*)priv->ioaddr;\r
++\r
++ DBG_PRINT("priv->mcfg=%d, priv->pcfg=%d\n",priv->mcfg,priv->pcfg);\r
++\r
++ if( priv->mcfg == MCFG_METHOD_4 ){\r
++#if 0\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1F, 0x0001 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1b, 0x841e );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x0e, 0x7bfb );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x09, 0x273a );\r
++#endif\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1F, 0x0002 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x90D0 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1F, 0x0000 );\r
++ }else if((priv->mcfg == MCFG_METHOD_2)||(priv->mcfg == MCFG_METHOD_3)){\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1f, 0x0001 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x06, 0x006e );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x08, 0x0708 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x15, 0x4000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x18, 0x65c7 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1f, 0x0001 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0x00a1 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0x0008 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x0120 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x1000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x0800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x0000 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xff41 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xdf60 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x0140 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x0077 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x7800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x7000 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0x802f );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0x4f02 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x0409 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0xf0f9 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x9800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x9000 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xdf01 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xdf20 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0xff95 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0xba00 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xa800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xa000 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xff41 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xdf20 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x0140 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x00bb );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xb800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xb000 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xdf41 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xdc60 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x6340 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x007d );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xd800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xd000 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xdf01 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xdf20 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x100a );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0xa0ff );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xf800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xf000 );\r
++\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1f, 0x0000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x0b, 0x0000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x9200 );\r
++#if 0\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1F, 0x0001 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x15, 0x1000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x18, 0x65C7 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x0000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0x00A1 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0x0008 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x1020 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x1000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x0800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x0000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x7000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xFF41 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xDE60 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x0140 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x0077 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x7800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x7000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xA000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xDF01 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xDF20 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0xFF95 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0xFA00 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xA800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xA000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xB000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xFF41 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xDE20 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0x0140 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0x00BB );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xB800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xB000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xF000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x03, 0xDF01 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x02, 0xDF20 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x01, 0xFF95 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x00, 0xBF00 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xF800 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0xF000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x04, 0x0000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x1F, 0x0000 );\r
++ R1000_WRITE_GMII_REG( (unsigned long)ioaddr, 0x0B, 0x0000 );\r
++#endif\r
++ }\r
++ else{\r
++ DBG_PRINT("priv->mcfg=%d. Discard hw PHY config.\n",priv->mcfg);\r
++ }\r
++}\r
++\r
++static void r1000_hw_start (struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ struct pci_dev *pdev = priv->pci_dev;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++ u32 i;\r
++ u8 i8;\r
++ u16 i16;\r
++\r
++ if((priv->mcfg!=MCFG_METHOD_5)&&(priv->mcfg!=MCFG_METHOD_11)&&\r
++ (priv->mcfg!=MCFG_METHOD_12)&&(priv->mcfg!=MCFG_METHOD_13)&&\r
++ (priv->mcfg!=MCFG_METHOD_14)&&(priv->mcfg!=MCFG_METHOD_15)){\r
++ /* Soft reset the chip. */\r
++ RTL_W8 ( ChipCmd, CmdReset);\r
++\r
++ /* Check that the chip has finished the reset. */\r
++ for (i = 1000; i > 0; i--){\r
++ if ((RTL_R8( ChipCmd ) & CmdReset) == 0) break;\r
++ else udelay (10);\r
++ }\r
++\r
++ RTL_W8 ( Cfg9346, Cfg9346_Unlock);\r
++ RTL_W8 ( ChipCmd, CmdTxEnb | CmdRxEnb);\r
++ RTL_W8 ( ETThReg, ETTh);\r
++\r
++ RTL_W16(CPlusCmd,RTL_R16(CPlusCmd)|CPCR_MulRW_Enable);\r
++ pci_write_config_byte(pdev,Cache_Line_Size,0x08);\r
++\r
++ // For gigabit rtl8169\r
++ RTL_W16 ( RxMaxSize, (unsigned short)priv->hw_rx_pkt_len );\r
++\r
++ // Set Rx Config register\r
++ i = r1000_rx_config | ( RTL_R32( RxConfig ) & rtl_chip_info[priv->chipset].RxConfigMask);\r
++ RTL_W32 ( RxConfig, i);\r
++\r
++\r
++ /* Set DMA burst size and Interframe Gap Time */\r
++ RTL_W32 ( TxConfig, (TX_DMA_BURST << TxDMAShift) | (InterFrameGap << TxInterFrameGapShift) );\r
++\r
++\r
++\r
++ RTL_W16( CPlusCmd, RTL_R16(CPlusCmd) );\r
++\r
++ if(priv->mcfg==MCFG_METHOD_2||priv->mcfg==MCFG_METHOD_3){\r
++ RTL_W16( CPlusCmd, (RTL_R16(CPlusCmd)|(1<<14)|(1<<3)) );\r
++ DBG_PRINT("Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n");\r
++ }else{\r
++ RTL_W16( CPlusCmd, (RTL_R16(CPlusCmd)|(1<<3)) );\r
++ DBG_PRINT("Set MAC Reg C+CR Offset 0xE0: bit-3.\n");\r
++ }\r
++\r
++ {\r
++ RTL_W16(0xE2,0x0000);\r
++ }\r
++\r
++ priv->cur_rx = 0;\r
++\r
++ RTL_W32 ( TxDescStartAddr, priv->txdesc_phy_dma_addr);\r
++ RTL_W32 ( TxDescStartAddr + 4, 0x00);\r
++ RTL_W32 ( RxDescStartAddr, priv->rxdesc_phy_dma_addr);\r
++ RTL_W32 ( RxDescStartAddr + 4, 0x00);\r
++\r
++ RTL_W8 ( Cfg9346, Cfg9346_Lock );\r
++ udelay (10);\r
++\r
++ RTL_W32 ( RxMissed, 0 );\r
++\r
++ r1000_set_rx_mode(netdev);\r
++\r
++ RTL_W16 ( MultiIntr, RTL_R16(MultiIntr) & 0xF000);\r
++\r
++ RTL_W16 ( IntrMask, r1000_intr_mask);\r
++ }else{\r
++ /* Soft reset the chip. */\r
++ RTL_W8 ( ChipCmd, CmdReset);\r
++\r
++ /* Check that the chip has finished the reset. */\r
++ for (i = 1000; i > 0; i--){\r
++ if ((RTL_R8( ChipCmd ) & CmdReset) == 0) break;\r
++ else udelay (10);\r
++ }\r
++\r
++ if(priv->mcfg==MCFG_METHOD_5){\r
++ RTL_W16(CPlusCmd,RTL_R16(CPlusCmd)|CPCR_MulRW_Enable);\r
++ pci_write_config_byte(pdev,Cache_Line_Size,0x08);\r
++ }\r
++\r
++ if( priv->mcfg == MCFG_METHOD_13 ){\r
++ pci_write_config_word(pdev,0x68,0x00);\r
++ pci_write_config_word(pdev,0x69,0x08);\r
++ }\r
++\r
++ if( priv->mcfg == MCFG_METHOD_5 ){\r
++ i8=RTL_R8(Config2);\r
++ i8=i8&0x07;\r
++ if(i8&&0x01)\r
++ RTL_W32(Off7Ch,0x0007FFFF);\r
++ \r
++ i=0x0007FF00;\r
++ RTL_W32(Off7Ch, i);\r
++\r
++ pci_read_config_word(pdev,0x04,&i16);\r
++ i16=i16&0xEF;\r
++ pci_write_config_word(pdev,0x04,i16);\r
++ }\r
++\r
++ RTL_W8 ( Cfg9346, Cfg9346_Unlock);\r
++ RTL_W8 ( ETThReg, ETTh);\r
++\r
++ // For gigabit rtl8169\r
++ RTL_W16 ( RxMaxSize, (unsigned short)priv->hw_rx_pkt_len );\r
++\r
++ RTL_W16( CPlusCmd, RTL_R16(CPlusCmd) );\r
++\r
++ if(priv->mcfg==MCFG_METHOD_2||priv->mcfg==MCFG_METHOD_3){\r
++ RTL_W16( CPlusCmd, (RTL_R16(CPlusCmd)|(1<<14)|(1<<3)) );\r
++ DBG_PRINT("Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n");\r
++ }else{\r
++ RTL_W16( CPlusCmd, (RTL_R16(CPlusCmd)|(1<<3)) );\r
++ DBG_PRINT("Set MAC Reg C+CR Offset 0xE0: bit-3.\n");\r
++ }\r
++\r
++ {\r
++ RTL_W16(0xE2,0x0000);\r
++ }\r
++\r
++ priv->cur_rx = 0;\r
++\r
++ RTL_W32 ( TxDescStartAddr, priv->txdesc_phy_dma_addr);\r
++ RTL_W32 ( TxDescStartAddr + 4, 0x00);\r
++ RTL_W32 ( RxDescStartAddr, priv->rxdesc_phy_dma_addr);\r
++ RTL_W32 ( RxDescStartAddr + 4, 0x00);\r
++ RTL_W8 ( ChipCmd, CmdTxEnb | CmdRxEnb);\r
++ // Set Rx Config register\r
++ i = r1000_rx_config | ( RTL_R32( RxConfig ) & rtl_chip_info[priv->chipset].RxConfigMask);\r
++ RTL_W32 ( RxConfig, i);\r
++\r
++ /* Set DMA burst size and Interframe Gap Time */\r
++ RTL_W32 ( TxConfig, (TX_DMA_BURST << TxDMAShift) | (InterFrameGap << TxInterFrameGapShift) );\r
++\r
++ RTL_W8 ( Cfg9346, Cfg9346_Lock );\r
++ udelay (10);\r
++\r
++ RTL_W32 ( RxMissed, 0 );\r
++\r
++ r1000_set_rx_mode(netdev);\r
++\r
++ RTL_W16 ( MultiIntr, RTL_R16(MultiIntr) & 0xF000);\r
++\r
++ RTL_W16 ( IntrMask, r1000_intr_mask);\r
++ }\r
++\r
++ netif_start_queue(netdev);\r
++\r
++}//end of r1000_hw_start (struct net_device *netdev)\r
++\r
++static void r1000_init_ring (struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ struct pci_dev *pdev = priv->pci_dev;\r
++ int i;\r
++ struct sk_buff *skb;\r
++ \r
++\r
++ priv->cur_rx = 0;\r
++ priv->cur_tx = 0;\r
++ priv->dirty_tx = 0;\r
++ memset(priv->TxDescArray, 0x0, NUM_TX_DESC*sizeof(struct TxDesc));\r
++ memset(priv->RxDescArray, 0x0, NUM_RX_DESC*sizeof(struct RxDesc));\r
++\r
++\r
++ for (i=0 ; i<NUM_TX_DESC ; i++){\r
++ priv->Tx_skbuff[i]=NULL;\r
++ priv->txdesc_array_dma_addr[i] = pci_map_single(pdev, &priv->TxDescArray[i], sizeof(struct TxDesc), PCI_DMA_TODEVICE);\r
++ }\r
++\r
++ for (i=0; i <NUM_RX_DESC; i++) {\r
++ if(i==(NUM_RX_DESC-1)){\r
++ priv->RxDescArray[i].status = cpu_to_le32((OWNbit | EORbit) | (unsigned long)priv->hw_rx_pkt_len);\r
++ }\r
++ else{\r
++ priv->RxDescArray[i].status = cpu_to_le32(OWNbit | (unsigned long)priv->hw_rx_pkt_len);\r
++ }\r
++\r
++ {//-----------------------------------------------------------------------\r
++ skb = priv->Rx_skbuff[i];\r
++ priv->rx_skbuff_dma_addr[i] = pci_map_single(pdev, skb->data, MAX_RX_SKBDATA_SIZE, PCI_DMA_FROMDEVICE);\r
++\r
++ if( skb != NULL ){\r
++ priv->RxDescArray[i].buf_addr = cpu_to_le32(priv->rx_skbuff_dma_addr[i]);\r
++ priv->RxDescArray[i].buf_Haddr = 0;\r
++ }\r
++ else{\r
++ DBG_PRINT("%s: %s() Rx_skbuff == NULL\n", netdev->name, __FUNCTION__);\r
++ priv->drvinit_fail = 1;\r
++ }\r
++ }//-----------------------------------------------------------------------\r
++ priv->rxdesc_array_dma_addr[i] = pci_map_single(pdev, &priv->RxDescArray[i], sizeof(struct RxDesc), PCI_DMA_TODEVICE);\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)\r
++ pci_dma_sync_single(pdev, priv->rxdesc_array_dma_addr[i], sizeof(struct RxDesc), PCI_DMA_TODEVICE);\r
++#endif\r
++ }\r
++}\r
++\r
++static void r1000_tx_clear (struct r1000_private *priv)\r
++{\r
++ int i;\r
++\r
++ priv->cur_tx = 0;\r
++ for ( i = 0 ; i < NUM_TX_DESC ; i++ ){\r
++ if ( priv->Tx_skbuff[i] != NULL ) {\r
++ dev_kfree_skb ( priv->Tx_skbuff[i] );\r
++ priv->Tx_skbuff[i] = NULL;\r
++ priv->stats.tx_dropped++;\r
++ }\r
++ }\r
++}\r
++\r
++static void r1000_tx_timeout (struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++ u8 tmp8;\r
++\r
++ /* disable Tx, if not already */\r
++ tmp8 = RTL_R8(ChipCmd);\r
++ if(tmp8&CmdTxEnb){\r
++ RTL_W8(ChipCmd,tmp8 & ~CmdTxEnb);\r
++ }\r
++\r
++ /* Disable interrupts by clearing the interrupt mask. */\r
++ RTL_W16(IntrMask,0x0000);\r
++\r
++ /* Stop a shared interrupt from scavenging while we are. */\r
++// spin_lock_irq(&priv->lock);\r
++ spin_lock_irq(&priv->tx_lock);\r
++ r1000_tx_clear(priv);\r
++// spin_unlock_irq(&priv->lock);\r
++ spin_unlock_irq(&priv->tx_lock);\r
++\r
++\r
++ r1000_hw_start(netdev);\r
++\r
++ netif_wake_queue(netdev);\r
++}\r
++\r
++static int r1000_start_xmit (struct sk_buff *skb, struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++ struct pci_dev *pdev = priv->pci_dev;\r
++ int entry = priv->cur_tx % NUM_TX_DESC;\r
++ int buf_len = 60;\r
++ dma_addr_t txbuf_dma_addr;\r
++ \r
++// spin_lock_irq(&priv->lock);\r
++ spin_lock(&priv->tx_lock);\r
++ if( (le32_to_cpu(priv->TxDescArray[entry].status) & OWNbit)==0 ){\r
++ priv->Tx_skbuff[entry] = skb;\r
++ txbuf_dma_addr = pci_map_single(pdev, skb->data, skb->len, PCI_DMA_TODEVICE);\r
++ \r
++ priv->TxDescArray[entry].buf_addr = cpu_to_le32(txbuf_dma_addr);\r
++ DBG_PRINT("%s: TX pkt_size = %d\n", __FUNCTION__, skb->len);\r
++ if( skb->len <= priv->tx_pkt_len ){\r
++ buf_len = skb->len;\r
++ }\r
++ else{\r
++ printk("%s: Error -- Tx packet size(%d) > mtu(%d)+14\n", netdev->name, skb->len, netdev->mtu);\r
++ buf_len = priv->tx_pkt_len;\r
++ }\r
++\r
++ if( entry != (NUM_TX_DESC-1) ){\r
++ priv->TxDescArray[entry].status = cpu_to_le32((OWNbit | FSbit | LSbit) | buf_len);\r
++ }\r
++ else{\r
++ priv->TxDescArray[entry].status = cpu_to_le32((OWNbit | EORbit | FSbit | LSbit) | buf_len);\r
++ }\r
++\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)\r
++ pci_dma_sync_single(pdev, priv->txdesc_array_dma_addr[entry], sizeof(struct TxDesc), PCI_DMA_TODEVICE);\r
++#endif\r
++\r
++\r
++ RTL_W8(TxPoll,0x40); //set polling bit\r
++\r
++ netdev->trans_start = jiffies;\r
++\r
++ priv->stats.tx_bytes += ( (skb->len > ETH_ZLEN) ? skb->len : ETH_ZLEN);\r
++ priv->cur_tx++;\r
++ }//end of if( (priv->TxDescArray[entry].status & 0x80000000)==0 )\r
++\r
++// spin_unlock_irq(&priv->lock);\r
++\r
++ if ( (priv->cur_tx - NUM_TX_DESC) == priv->dirty_tx ){\r
++ netif_stop_queue(netdev);\r
++ }\r
++ else{\r
++ if (netif_queue_stopped(netdev)){\r
++ netif_wake_queue(netdev);\r
++ }\r
++ }\r
++\r
++ spin_unlock(&priv->tx_lock);\r
++\r
++ return 0;\r
++}\r
++\r
++#ifdef R1000_BOTTOM_HALVES\r
++static void r1000_tx_interrupt(unsigned long ndev){\r
++ struct net_device *netdev = (void *)ndev;\r
++ struct r1000_private *priv = netdev->priv;\r
++#else\r
++static void r1000_tx_interrupt(struct net_device *netdev, struct r1000_private *priv, unsigned long ioaddr){\r
++#endif //R1000_BOTTOM_HALVES\r
++\r
++ unsigned long flags;\r
++\r
++ spin_lock_irqsave(&priv->tx_lock,flags);\r
++ r1000_tx_action(netdev);\r
++ spin_unlock_irqrestore(&priv->tx_lock,flags);\r
++}\r
++\r
++static void FASTCALL (r1000_tx_action(struct net_device *netdev));\r
++static void fastcall r1000_tx_action(struct net_device *netdev){\r
++\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long dirty_tx, tx_left=0;\r
++ int entry = priv->cur_tx % NUM_TX_DESC;\r
++ int txloop_cnt = 0;\r
++\r
++ assert (netdev != NULL);\r
++ assert (priv != NULL);\r
++ assert (ioaddr != NULL);\r
++\r
++ dirty_tx = priv->dirty_tx;\r
++ tx_left = priv->cur_tx - dirty_tx;\r
++\r
++ while( (tx_left > 0) && (txloop_cnt < max_interrupt_work) ){\r
++ if( (le32_to_cpu(priv->TxDescArray[entry].status) & OWNbit) == 0 ){\r
++ dev_kfree_skb_irq( priv->Tx_skbuff[dirty_tx % NUM_TX_DESC] );\r
++ priv->Tx_skbuff[dirty_tx % NUM_TX_DESC] = NULL;\r
++ priv->stats.tx_packets++;\r
++ dirty_tx++;\r
++ tx_left--;\r
++ entry++;\r
++ }\r
++ txloop_cnt ++;\r
++ }\r
++\r
++ if (priv->dirty_tx != dirty_tx) {\r
++ priv->dirty_tx = dirty_tx;\r
++ if (netif_queue_stopped(netdev))\r
++ netif_wake_queue(netdev);\r
++ }\r
++}\r
++\r
++#ifdef R1000_BOTTOM_HALVES\r
++static void r1000_rx_interrupt(unsigned long ndev){\r
++ struct net_device *netdev = (void *)ndev;\r
++ struct r1000_private *priv = netdev->priv;\r
++#else\r
++static void r1000_rx_interrupt(struct net_device *netdev, struct r1000_private *priv, unsigned long ioaddr){\r
++#endif //R1000_BOTTOM_HALVES\r
++\r
++ unsigned long flags;\r
++\r
++ spin_lock_irqsave(&priv->rx_lock,flags);\r
++ r1000_rx_action(netdev);\r
++ spin_unlock_irqrestore(&priv->rx_lock,flags);\r
++}\r
++\r
++static void FASTCALL (r1000_rx_action(struct net_device *netdev));\r
++static void fastcall r1000_rx_action(struct net_device *netdev){\r
++\r
++ struct r1000_private *priv = netdev->priv;\r
++ struct pci_dev *pdev = priv->pci_dev;\r
++ int cur_rx;\r
++ int pkt_size = 0 ;\r
++ int rxdesc_cnt = 0;\r
++ int ret;\r
++ struct sk_buff *n_skb = NULL;\r
++ struct sk_buff *cur_skb;\r
++ struct sk_buff *rx_skb;\r
++ struct RxDesc *rxdesc;\r
++\r
++ assert(netdev != NULL);\r
++ assert (priv != NULL);\r
++ assert (ioaddr != NULL);\r
++\r
++ cur_rx = priv->cur_rx;\r
++\r
++ rxdesc = &priv->RxDescArray[cur_rx];\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)\r
++ pci_dma_sync_single(pdev, priv->rxdesc_array_dma_addr[cur_rx], sizeof(struct RxDesc), PCI_DMA_FROMDEVICE);\r
++#endif\r
++\r
++ while (((le32_to_cpu(rxdesc->status) & OWNbit)== 0) && (rxdesc_cnt < max_interrupt_work)){\r
++\r
++ rxdesc_cnt++;\r
++\r
++ if( le32_to_cpu(rxdesc->status) & RxRES ){\r
++ printk(KERN_INFO "%s: Rx ERROR!!!\n", netdev->name);\r
++ priv->stats.rx_errors++;\r
++ if ( le32_to_cpu(rxdesc->status) & (RxRWT|RxRUNT) )\r
++ priv->stats.rx_length_errors++;\r
++ if ( le32_to_cpu(rxdesc->status) & RxCRC)\r
++ priv->stats.rx_crc_errors++;\r
++ }\r
++ else{\r
++ pkt_size=(int)(le32_to_cpu(rxdesc->status) & 0x00001FFF)-4;\r
++\r
++ if( pkt_size > priv->rx_pkt_len ){\r
++ printk("%s: Error -- Rx packet size(%d) > mtu(%d)+14\n", netdev->name, pkt_size, netdev->mtu);\r
++ pkt_size = priv->rx_pkt_len;\r
++ }\r
++\r
++ DBG_PRINT("%s: RX pkt_size = %d\n", __FUNCTION__, pkt_size);\r
++\r
++ {// -----------------------------------------------------\r
++ rx_skb = priv->Rx_skbuff[cur_rx];\r
++ n_skb = R1000_ALLOC_RXSKB(MAX_RX_SKBDATA_SIZE);\r
++ if( n_skb != NULL ) {\r
++ skb_reserve (n_skb, 8); // 16 byte align the IP fields. //\r
++\r
++ // Indicate rx_skb\r
++ if( rx_skb != NULL ){\r
++ rx_skb->dev = netdev;\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)\r
++ pci_dma_sync_single(pdev, priv->rx_skbuff_dma_addr[cur_rx], sizeof(struct RxDesc), PCI_DMA_FROMDEVICE);\r
++#endif\r
++\r
++ skb_put ( rx_skb, pkt_size );\r
++ rx_skb->protocol = eth_type_trans ( rx_skb, netdev );\r
++ ret = R1000_NETIF_RX (rx_skb);\r
++\r
++// netdev->last_rx = jiffies;\r
++ priv->stats.rx_bytes += pkt_size;\r
++ priv->stats.rx_packets++;\r
++\r
++ }//end if( rx_skb != NULL )\r
++\r
++ priv->Rx_skbuff[cur_rx] = n_skb;\r
++ }\r
++ else{\r
++ DBG_PRINT("%s: Allocate n_skb failed!\n",__FUNCTION__ );\r
++ priv->Rx_skbuff[cur_rx] = rx_skb;\r
++ }\r
++\r
++\r
++ // Update rx descriptor\r
++ if( cur_rx == (NUM_RX_DESC-1) ){\r
++ priv->RxDescArray[cur_rx].status = cpu_to_le32((OWNbit | EORbit) | (unsigned long)priv->hw_rx_pkt_len);\r
++ }\r
++ else{\r
++ priv->RxDescArray[cur_rx].status = cpu_to_le32(OWNbit | (unsigned long)priv->hw_rx_pkt_len);\r
++ }\r
++\r
++ cur_skb = priv->Rx_skbuff[cur_rx];\r
++\r
++ if( cur_skb != NULL ){\r
++ priv->rx_skbuff_dma_addr[cur_rx] = pci_map_single(pdev, cur_skb->data, MAX_RX_SKBDATA_SIZE, PCI_DMA_FROMDEVICE);\r
++ rxdesc->buf_addr = cpu_to_le32(priv->rx_skbuff_dma_addr[cur_rx]);\r
++ }\r
++ else{\r
++ DBG_PRINT("%s: %s() cur_skb == NULL\n", netdev->name, __FUNCTION__);\r
++ }\r
++\r
++ }//------------------------------------------------------------\r
++\r
++ }// end of if( priv->RxDescArray[cur_rx].status & RxRES )\r
++\r
++ cur_rx = (cur_rx +1) % NUM_RX_DESC;\r
++ rxdesc = &priv->RxDescArray[cur_rx];\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)\r
++ pci_dma_sync_single(pdev, priv->rxdesc_array_dma_addr[cur_rx], sizeof(struct RxDesc), PCI_DMA_FROMDEVICE);\r
++#endif\r
++\r
++ }// end of while ( (priv->RxDescArray[cur_rx].status & 0x80000000)== 0)\r
++\r
++ if( rxdesc_cnt >= max_interrupt_work ){\r
++ DBG_PRINT("%s: Too much work at Rx interrupt.\n", netdev->name);\r
++ }\r
++\r
++ priv->cur_rx = cur_rx;\r
++}\r
++\r
++/* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)\r
++static void r1000_interrupt (int irq, void *dev_instance, struct pt_regs *regs)\r
++#else\r
++static irqreturn_t r1000_interrupt (int irq, void *dev_instance, struct pt_regs *regs)\r
++#endif\r
++{\r
++ struct net_device *netdev = (struct net_device *) dev_instance;\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++ unsigned int status = 0;\r
++\r
++ unsigned int phy_status = 0;\r
++\r
++ RTL_W16(IntrMask,0x0000);\r
++\r
++ status=RTL_R16(IntrStatus);\r
++\r
++ if(status==0xFFFF){\r
++ RTL_W16(IntrMask,r1000_intr_mask);\r
++ return IRQ_HANDLED;\r
++ }\r
++\r
++ if((status&r1000_intr_mask)==0)\r
++ return IRQ_NONE;\r
++\r
++#if 0\r
++ if(status&(RxOK|TxOK|TxErr)){\r
++#ifdef R1000_BOTTOM_HALVES\r
++ tasklet_schedule(&priv->r1000_rx_tasklet);\r
++ tasklet_schedule(&priv->r1000_tx_tasklet);\r
++#else\r
++ r1000_rx_interrupt(netdev,priv,ioaddr);\r
++ r1000_tx_interrupt(netdev,priv,ioaddr);\r
++#endif //R1000_BOTTOM_HALVES\r
++ RTL_W16(IntrStatus,RxOK|TxOK|TxErr);\r
++ }\r
++#endif\r
++\r
++ if(status&RxOK){\r
++#ifdef R1000_BOTTOM_HALVES\r
++ tasklet_schedule(&priv->r1000_rx_tasklet);\r
++#else\r
++ r1000_rx_interrupt(netdev,priv,ioaddr);\r
++#endif //R1000_BOTTOM_HALVES\r
++ RTL_W16(IntrStatus,RxOK);\r
++ }\r
++\r
++ if(status&(TxOK|TxErr)){\r
++#ifdef R1000_BOTTOM_HALVES\r
++ tasklet_schedule(&priv->r1000_tx_tasklet);\r
++#else\r
++ r1000_tx_interrupt(netdev,priv,ioaddr);\r
++#endif //R1000_BOTTOM_HALVES\r
++ RTL_W16(IntrStatus,TxOK|TxErr);\r
++ }\r
++\r
++ if(status&RxErr){\r
++ RTL_W16(IntrStatus,RxErr);\r
++ }\r
++\r
++ if((status&TxOK)&&(status&TxDescUnavail)){\r
++ RTL_W8(TxPoll,0x40);\r
++ RTL_W16(IntrStatus,TxOK|TxDescUnavail);\r
++ }\r
++\r
++ if(status & LinkChg){\r
++ if(((priv->mcfg==MCFG_METHOD_2)||(priv->mcfg==MCFG_METHOD_3))&&(phy_status&_100Mbps)){\r
++ phy_status = RTL_R8(PHYstatus);\r
++\r
++ if(phy_status & LinkStatus){\r
++ R1000_WRITE_GMII_REG((unsigned long)ioaddr,0x1f,0x0001);\r
++ R1000_WRITE_GMII_REG((unsigned long)ioaddr,0x10,0xf01b);\r
++ R1000_WRITE_GMII_REG((unsigned long)ioaddr,0x1f,0x0000);\r
++ }else{\r
++ R1000_WRITE_GMII_REG((unsigned long)ioaddr,0x1f,0x0001);\r
++ R1000_WRITE_GMII_REG((unsigned long)ioaddr,0x10,0xf41b);\r
++ R1000_WRITE_GMII_REG((unsigned long)ioaddr,0x1f,0x0000);\r
++ }\r
++\r
++ }\r
++ RTL_W16(IntrStatus,LinkChg);\r
++ }\r
++\r
++ RTL_W16 ( IntrMask, r1000_intr_mask);\r
++\r
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)\r
++ return IRQ_HANDLED;\r
++#endif\r
++\r
++}\r
++\r
++static int r1000_close(struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++ int i;\r
++\r
++ // -----------------------------------------\r
++ r1000_delete_timer( &(priv->r1000_timer) );\r
++\r
++ netif_stop_queue(netdev);\r
++\r
++#ifdef R1000_BOTTOM_HALVES\r
++ tasklet_kill(&priv->r1000_rx_tasklet);\r
++ tasklet_kill(&priv->r1000_tx_tasklet);\r
++#endif //R1000_BOTTOM_HALVES\r
++\r
++ spin_lock_irq(&priv->lock);\r
++\r
++ /* Stop the chip's Tx and Rx processes. */\r
++ RTL_W8(ChipCmd,0x00);\r
++\r
++ /* Disable interrupts by clearing the interrupt mask. */\r
++ RTL_W16(IntrMask,0x0000);\r
++\r
++ /* Update the error counts. */\r
++ priv->stats.rx_missed_errors += RTL_R32(RxMissed);\r
++ RTL_W32(RxMissed,0);\r
++\r
++ spin_unlock_irq(&priv->lock);\r
++\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)\r
++ synchronize_irq ();\r
++#else\r
++ synchronize_irq(netdev->irq);\r
++#endif\r
++ free_irq (netdev->irq, netdev);\r
++\r
++ r1000_tx_clear (priv);\r
++ \r
++ //2004-05-11\r
++ if(priv->txdesc_space != NULL){\r
++ pci_free_consistent(\r
++ priv->pci_dev,\r
++ priv->sizeof_txdesc_space,\r
++ priv->txdesc_space,\r
++ priv->txdesc_phy_dma_addr\r
++ );\r
++ priv->txdesc_space = NULL;\r
++ }\r
++\r
++ if(priv->rxdesc_space != NULL){\r
++ pci_free_consistent(\r
++ priv->pci_dev,\r
++ priv->sizeof_rxdesc_space,\r
++ priv->rxdesc_space,\r
++ priv->rxdesc_phy_dma_addr\r
++ );\r
++ priv->rxdesc_space = NULL;\r
++ }\r
++\r
++ priv->TxDescArray = NULL;\r
++ priv->RxDescArray = NULL;\r
++\r
++ {//-----------------------------------------------------------------------------\r
++ for(i=0;i<NUM_RX_DESC;i++){\r
++ if( priv->Rx_skbuff[i] != NULL ) {\r
++ R1000_FREE_RXSKB ( priv->Rx_skbuff[i] );\r
++ }\r
++ }\r
++ }//-----------------------------------------------------------------------------\r
++\r
++ DBG_PRINT("%s: %s() alloc_rxskb_cnt = %d\n", netdev->name, __FUNCTION__, alloc_rxskb_cnt );\r
++\r
++ return 0;\r
++}\r
++\r
++static unsigned const ethernet_polynomial = 0x04c11db7U;\r
++static inline u32 ether_crc (int length, unsigned char *data)\r
++{\r
++ int crc = -1;\r
++\r
++ while (--length >= 0) {\r
++ unsigned char current_octet = *data++;\r
++ int bit;\r
++ for (bit = 0; bit < 8; bit++, current_octet >>= 1)\r
++ crc = (crc << 1) ^ ((crc < 0) ^ (current_octet & 1) ? ethernet_polynomial : 0);\r
++ }\r
++\r
++ return crc;\r
++}\r
++\r
++static void r1000_set_rx_mode (struct net_device *netdev)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++ unsigned long flags;\r
++ u32 mc_filter[2]; /* Multicast hash filter */\r
++ int i, rx_mode;\r
++ u32 tmp=0;\r
++ \r
++\r
++ if (netdev->flags & IFF_PROMISC) {\r
++ /* Unconditionally log net taps. */\r
++ printk (KERN_NOTICE "%s: Promiscuous mode enabled.\n", netdev->name);\r
++ rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys | AcceptAllPhys;\r
++ mc_filter[1] = mc_filter[0] = 0xffffffff;\r
++ } else if ((netdev->mc_count > multicast_filter_limit) || (netdev->flags & IFF_ALLMULTI)) {\r
++ /* Too many to filter perfectly -- accept all multicasts. */\r
++ rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;\r
++ mc_filter[1] = mc_filter[0] = 0xffffffff;\r
++ } else {\r
++ struct dev_mc_list *mclist;\r
++ rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;\r
++ mc_filter[1] = mc_filter[0] = 0;\r
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)\r
++ for (i = 0, mclist = netdev->mc_list; mclist && i < netdev->mc_count; i++, mclist = mclist->next)\r
++ {\r
++ set_bit (ether_crc (ETH_ALEN, mclist->dmi_addr) >> 26, mc_filter);\r
++ } \r
++#else\r
++ for (i = 0, mclist = netdev->mc_list; mclist && i < netdev->mc_count; i++, mclist = mclist->next)\r
++ {\r
++ int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;\r
++ \r
++ mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);\r
++ rx_mode |= AcceptMulticast;\r
++ }\r
++#endif \r
++ }\r
++\r
++// spin_lock_irqsave(&priv->lock,flags);\r
++ spin_lock_irqsave(&priv->rx_lock,flags);\r
++\r
++ tmp = r1000_rx_config | rx_mode | (RTL_R32(RxConfig) & rtl_chip_info[priv->chipset].RxConfigMask);\r
++\r
++ RTL_W32 ( RxConfig, tmp);\r
++ if((priv->mcfg==MCFG_METHOD_11)||(priv->mcfg==MCFG_METHOD_12)||\r
++ (priv->mcfg==MCFG_METHOD_13)||(priv->mcfg==MCFG_METHOD_14)||\r
++ (priv->mcfg==MCFG_METHOD_15)){\r
++ RTL_W32 ( MAR0 + 0, 0xFFFFFFFF);\r
++ RTL_W32 ( MAR0 + 4, 0xFFFFFFFF);\r
++ }else{\r
++ RTL_W32 ( MAR0 + 0, mc_filter[0]);\r
++ RTL_W32 ( MAR0 + 4, mc_filter[1]);\r
++ }\r
++\r
++// spin_unlock_irqrestore(&priv->lock,flags);\r
++ spin_unlock_irqrestore(&priv->rx_lock,flags);\r
++\r
++}//end of r1000_set_rx_mode (struct net_device *netdev)\r
++\r
++struct net_device_stats *r1000_get_stats(struct net_device *netdev)\r
++\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++\r
++ return &priv->stats;\r
++}\r
++\r
++static struct pci_driver r1000_pci_driver = {\r
++ name: MODULENAME,\r
++ id_table: r1000_pci_tbl,\r
++ probe: r1000_init_one,\r
++ remove: __devexit_p(r1000_remove_one),\r
++ suspend: NULL,\r
++ resume: NULL,\r
++};\r
++\r
++static int __init r1000_init_module (void)\r
++{\r
++ return pci_module_init (&r1000_pci_driver); // pci_register_driver (drv)\r
++}\r
++\r
++static void __exit r1000_cleanup_module (void)\r
++{\r
++ pci_unregister_driver (&r1000_pci_driver);\r
++}\r
++\r
++#ifdef R1000_JUMBO_FRAME_SUPPORT\r
++static int r1000_change_mtu(struct net_device *netdev, int new_mtu)\r
++{\r
++ struct r1000_private *priv = netdev->priv;\r
++ unsigned long ioaddr = priv->ioaddr;\r
++\r
++ if( new_mtu > MAX_JUMBO_FRAME_MTU ){\r
++ printk("%s: Error -- new_mtu(%d) > MAX_JUMBO_FRAME_MTU(%d).\n", netdev->name, new_mtu, MAX_JUMBO_FRAME_MTU);\r
++ return -1;\r
++ }\r
++\r
++ netdev->mtu = new_mtu;\r
++\r
++ priv->curr_mtu_size = new_mtu;\r
++ priv->tx_pkt_len = new_mtu + ETH_HDR_LEN;\r
++ priv->rx_pkt_len = new_mtu + ETH_HDR_LEN;\r
++ priv->hw_rx_pkt_len = priv->rx_pkt_len + 8;\r
++\r
++ RTL_W8 ( Cfg9346, Cfg9346_Unlock);\r
++ RTL_W16 ( RxMaxSize, (unsigned short)priv->hw_rx_pkt_len );\r
++ RTL_W8 ( Cfg9346, Cfg9346_Lock);\r
++\r
++ DBG_PRINT("-------------------------- \n");\r
++ DBG_PRINT("netdev->mtu = %d \n", netdev->mtu);\r
++ DBG_PRINT("priv->curr_mtu_size = %d \n", priv->curr_mtu_size);\r
++ DBG_PRINT("priv->rx_pkt_len = %d \n", priv->rx_pkt_len);\r
++ DBG_PRINT("priv->tx_pkt_len = %d \n", priv->tx_pkt_len);\r
++ DBG_PRINT("RTL_W16( RxMaxSize, %d )\n", priv->hw_rx_pkt_len);\r
++ DBG_PRINT("-------------------------- \n");\r
++\r
++ r1000_close(netdev);\r
++ r1000_open(netdev);\r
++\r
++ return 0;\r
++}\r
++#endif //end #ifdef R1000_JUMBO_FRAME_SUPPORT\r
++\r
++module_init(r1000_init_module);\r
++module_exit(r1000_cleanup_module);\r
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.20.1
+# Wed Feb 28 20:58:12 2007
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION="-opents"
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Processor
+#
+CONFIG_6xx=y
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_8xx is not set
+# CONFIG_E200 is not set
+# CONFIG_E500 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_ALTIVEC is not set
+# CONFIG_TAU is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_WANT_EARLY_SERIAL is not set
+CONFIG_PPC_GEN550=y
+CONFIG_PPC_STD_MMU=y
+
+#
+# Platform options
+#
+# CONFIG_PPC_PREP is not set
+# CONFIG_APUS is not set
+# CONFIG_KATANA is not set
+# CONFIG_WILLOW is not set
+# CONFIG_CPCI690 is not set
+# CONFIG_POWERPMC250 is not set
+# CONFIG_CHESTNUT is not set
+# CONFIG_SPRUCE is not set
+# CONFIG_HDPU is not set
+# CONFIG_EV64260 is not set
+# CONFIG_LOPEC is not set
+# CONFIG_MVME5100 is not set
+# CONFIG_PPLUS is not set
+# CONFIG_PRPMC750 is not set
+# CONFIG_PRPMC800 is not set
+CONFIG_SANDPOINT=y
+# CONFIG_RADSTONE_PPC7D is not set
+# CONFIG_PAL4 is not set
+# CONFIG_GEMINI is not set
+# CONFIG_EST8260 is not set
+# CONFIG_SBC82xx is not set
+# CONFIG_SBS8260 is not set
+# CONFIG_RPX8260 is not set
+# CONFIG_TQM8260 is not set
+# CONFIG_ADS8272 is not set
+# CONFIG_PQ2FADS is not set
+# CONFIG_LITE5200 is not set
+# CONFIG_MPC834x_SYS is not set
+# CONFIG_EV64360 is not set
+CONFIG_EPIC_SERIAL_MODE=y
+CONFIG_MPC10X_BRIDGE=y
+CONFIG_MPC10X_OPENPIC=y
+# CONFIG_MPC10X_STORE_GATHERING is not set
+# CONFIG_SANDPOINT_ENABLE_UART1 is not set
+# CONFIG_SMP is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttyS0,115200n8 root=/dev/ram rtc-rs5c372.probe=0,0x32"
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_I8259=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+CONFIG_MTD_ROM=y
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0xFF000000
+CONFIG_MTD_PHYSMAP_LEN=0x01000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=1
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_NAND_CAFE is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=40960
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+CONFIG_ATA_OVER_ETH=m
+
+#
+# Misc devices
+#
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+CONFIG_SCSI_ISCSI_ATTRS=m
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+
+#
+# Serial ATA (prod) and Parallel ATA (experimental) drivers
+#
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_SATA_SIL=y
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+# CONFIG_MAC_EMUMOUSEBTN is not set
+# CONFIG_WINDFARM is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# PHY device support
+#
+
+#
+# Ethernet (10 or 100Mbit)
+#
+# CONFIG_NET_ETHERNET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+CONFIG_R1000=y
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=1
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_S35390A is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# HID Devices
+#
+CONFIG_HID=y
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=y
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_TOUCHSCREEN is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET_MII is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+CONFIG_USB_SERIAL=m
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_AIRPRIME is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP2101 is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+CONFIG_USB_SERIAL_VISOR=m
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+#
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+CONFIG_RTC_DRV_RS5C372=y
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_TEST is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Virtualization
+#
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V1=y
+CONFIG_QFMT_V2=y
+CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+CONFIG_CONFIGFS_FS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_FS_POSIX_ACL=y
+CONFIG_JFFS2_FS_SECURITY=y
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+CONFIG_NFSD_V4=y
+CONFIG_NFSD_TCP=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=y
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=y
+CONFIG_CIFS_STATS=y
+# CONFIG_CIFS_STATS2 is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=y
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=m
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_IOMAP_COPY=y
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_SERIAL_TEXT_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
git.openpandora.org / openembedded.git / commitdiff