riscv: qemu: Enable MTD NOR flash support
authorBin Meng <bmeng.cn@gmail.com>
Sat, 7 Aug 2021 05:00:02 +0000 (13:00 +0800)
committerStefan Roese <sr@denx.de>
Wed, 11 Aug 2021 08:36:10 +0000 (10:36 +0200)
Enable support to the 2 NOR flashes on the QEMU RISC-V virt machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
board/emulation/qemu-riscv/Kconfig
include/configs/qemu-riscv.h

index 0818048..a7de82d 100644 (file)
@@ -64,5 +64,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        imply VIRTIO_PCI
        imply VIRTIO_NET
        imply VIRTIO_BLK
+       imply MTD_NOR_FLASH
+       imply CFI_FLASH
 
 endif
index 5291de8..bbeea96 100644 (file)
@@ -29,6 +29,8 @@
 
 #define CONFIG_STANDALONE_LOAD_ADDR    0x80200000
 
+#define CONFIG_SYS_MAX_FLASH_BANKS     2
+
 #define RISCV_MMODE_TIMERBASE          0x2000000
 #define RISCV_MMODE_TIMER_FREQ         1000000