riscv: dts: k1: add pinctrl property in dts.
authorHuan Zhou <me@per1cycle.org>
Sat, 29 Mar 2025 12:47:59 +0000 (20:47 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Fri, 25 Apr 2025 08:31:29 +0000 (16:31 +0800)
Add pinctrl node in device tree and update
in bananapi f3 dts.

Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/k1-bananapi-f3.dts
arch/riscv/dts/k1-pinctrl.dtsi [new file with mode: 0644]
arch/riscv/dts/k1.dtsi

index d2486f7..6b5b83b 100644 (file)
@@ -5,6 +5,7 @@
 
 #include "k1.dtsi"
 #include "binman.dtsi"
+#include "k1-pinctrl.dtsi"
 
 / {
        model = "Banana Pi BPI-F3";
@@ -21,5 +22,7 @@
 };
 
 &uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_2_cfg>;
        status = "okay";
 };
diff --git a/arch/riscv/dts/k1-pinctrl.dtsi b/arch/riscv/dts/k1-pinctrl.dtsi
new file mode 100644 (file)
index 0000000..14e7096
--- /dev/null
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2022 Spacemit Inc.
+ * Copyright (C) 2025 Yixun Lan <dlan@gentoo.org>
+ */
+
+#define K1_PADCONF(pin, func) (((pin) << 16) | (func))
+
+&pinctrl {
+       uart0_2_cfg: uart0-2-cfg {
+               uart0-2-pins {
+                       pinmux = <K1_PADCONF(68, 2)>,
+                                <K1_PADCONF(69, 2)>;
+
+                       bias-pull-up = <0>;
+                       drive-strength = <32>;
+               };
+       };
+};
index 7c0f1b9..a633e43 100644 (file)
                        #reset-cells = <1>;
                        status = "disabled";
                };
+
+               pinctrl: pinctrl@d401e000 {
+                       compatible = "spacemit,k1-pinctrl", "pinctrl-single";
+                       reg = <0x0 0xd401e000 0x0 0x400>;
+                       pinctrl-single,register-width = <32>;
+               };
        };
-};
\ No newline at end of file
+};