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configs: agilex5: Enable Marvell PHY driver
authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Tue, 18 Mar 2025 02:57:46 +0000 (19:57 -0700)
committerTien Fong Chee <tien.fong.chee@intel.com>
Tue, 22 Apr 2025 03:47:39 +0000 (11:47 +0800)
Enable Marvell Ethernet PHYs support for Agilex5 defconfig

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
configs/socfpga_agilex5_defconfig patch | blob | history

diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig
index 8f327e5..a57c866 100644 (file)
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex5_defconfig
@@ -82,6 +82,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_MARVELL=y
 CONFIG_DWC_ETH_XGMAC=y
 CONFIG_RGMII=y
 CONFIG_SYS_NS16550_MEM32=y
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