arm: socfpga: socfpga_soc64: Enable LMB_ARCH_MEM_MAP

LMB_ARCH_MEM_MAP is enabled, and lmb_arch_add_memory() is introduced to
correctly handle memory reservations for the second and third DDR
memory banks.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 83f6cb6..df373d3 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1138,6 +1138,7 @@ config ARCH_SOCFPGA
        select DM_SERIAL
        select GPIO_EXTRA_HEADER
        select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
+       select LMB_ARCH_MEM_MAP if TARGET_SOCFPGA_SOC64
        select OF_CONTROL
        select SPL_DM_RESET if DM_RESET
        select SPL_DM_SERIAL

diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 27072e5..8506d51 100644 (file)
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -195,3 +195,16 @@ void board_prep_linux(struct bootm_headers *images)
        }
 }
 #endif
+
+#if CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP)
+void lmb_arch_add_memory(void)
+{
+       int i;
+       struct bd_info *bd = gd->bd;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+               if (bd->bi_dram[i].size)
+                       lmb_add(bd->bi_dram[i].start, bd->bi_dram[i].size);
+       }
+}
+#endif