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clk: exynos5420: fix cpll clock register offsets
authorChander Kashyap <chander.kashyap@linaro.org>
Thu, 26 Sep 2013 09:06:35 +0000 (14:36 +0530)
committerMike Turquette <mturquette@linaro.org>
Wed, 4 Dec 2013 18:46:45 +0000 (10:46 -0800)
Fixes cpll control and lock register offset values for Exynos5420 SoC.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

No differences found
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