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ARM: tegra: Pause DMA when reading transfer count
authorLaxman Dewangan <ldewangan@nvidia.com>
Mon, 9 Jan 2012 20:05:11 +0000 (20:05 +0000)
committerOlof Johansson <olof@lixom.net>
Tue, 7 Feb 2012 02:24:59 +0000 (18:24 -0800)
In order to read an accurate channel transfer count
from the APB DMA engine, the DMA controller must be
paused first.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

No differences found
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