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drm/radeon: fix ordering in pll picking on dce4+
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 6 Aug 2012 21:06:03 +0000 (17:06 -0400)
committerBen Hutchings <ben@decadent.org.uk>
Wed, 19 Sep 2012 14:05:23 +0000 (15:05 +0100)
commit ecd67955fd4c8e66e4df312098989d5fa7da624c upstream.

No functional change, but re-order the cases so they
evaluate properly due to the way the DCE macros work.

Noticed by kallisti5 on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[bwh: Backported to 3.2: drop the DCE6 case]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>

No differences found
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