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[MIPS] Use correct dma flushing in dma_cache_sync()
authorThomas Bogendoerfer <tsbogend@alpha.franken.de>
Tue, 27 Nov 2007 18:31:33 +0000 (19:31 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 29 Jan 2008 10:14:58 +0000 (10:14 +0000)
Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

No differences found
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