* use 8 clk setting for active clocks == 7 (was 12 clk)
* use 12 clk setting for active clocks > 12 (was 8 clk)
* do 66MHz bus fixup before mapping active clocks
* fix setup of PIO command timings
Acked-by: Jung-Ik (John) Lee <jilee@google.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>