ACPICA: Clear PM register write-only bits on reading
authorLin Ming <ming.m.lin@intel.com>
Thu, 19 Mar 2009 01:51:01 +0000 (09:51 +0800)
committerLen Brown <len.brown@intel.com>
Fri, 27 Mar 2009 16:11:03 +0000 (12:11 -0400)
Affects PM1 Control register only. When reading the register, zero
the write-only bits as per the ACPI spec.  ACPICA BZ 443. Lin Ming.

http://www.acpica.org/bugzilla/show_bug.cgi?id=443

Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>

No differences found