rockchip: enable SYS_NS16550 for all SoCs by default

All rockchip SoCs can use ns16550 driver, enable it for all
and set SYS_NS16550_MEM32 for all SoCs.

Version-changes: 2
- use imply instead of select

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7212fc5..c930fa2 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1185,6 +1185,7 @@ config ARCH_ROCKCHIP
        imply TPL_SYSRESET
        imply ADC
        imply SARADC_ROCKCHIP
+       imply SYS_NS16550
 
 config TARGET_THUNDERX_88XX
        bool "Support ThunderX 88xx"

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 0adaed4..007cb22 100644 (file)
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -103,7 +103,6 @@ config ROCKCHIP_RK3368
        imply SPL_SERIAL_SUPPORT
        imply TPL_SERIAL_SUPPORT
        select DEBUG_UART_BOARD_INIT
-       select SYS_NS16550
        help
          The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
          into a big and little cluster with 4 cores each) Cortex-A53 including

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f39a272..c5ec864 100644 (file)
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -18,9 +18,6 @@
 #define CONFIG_SYS_TIMER_BASE          0x200440a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_INIT_SP_ADDR                0x60100000
 #define CONFIG_SYS_LOAD_ADDR           0x60800800
 #define CONFIG_SPL_STACK               0x10081fff

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index bd8019c..c593f18 100644 (file)
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -19,8 +19,6 @@
 #define CONFIG_SYS_TIMER_BASE          0x200440a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_INIT_SP_ADDR                0x60100000
 #define CONFIG_SYS_LOAD_ADDR           0x60800800
 

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index b437b85..0fb7221 100644 (file)
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -18,7 +18,6 @@
 #define CONFIG_SYS_TIMER_BASE          0x110c00a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SYS_INIT_SP_ADDR                0x60100000
 #define CONFIG_SYS_LOAD_ADDR           0x60800800
 #define CONFIG_SPL_STACK               0x10088000

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 9b7b24f..23dbfec 100644 (file)
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -19,8 +19,6 @@
 #define        CONFIG_SYS_TIMER_BASE           0xff810020 /* TIMER7 */
 #define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
 #endif

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 349c53c..cd204e9 100644 (file)
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -18,9 +18,6 @@
 #define CONFIG_SYS_TIMER_BASE          0x10350020
 #define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_SDRAM_BASE          0x60000000
 #define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_TEXT_BASE + 0x100000)