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drm/radeon: improve PLL limit handling in post div calculation
authorChristian König <christian.koenig@amd.com>
Sun, 20 Apr 2014 11:24:32 +0000 (13:24 +0200)
committerChristian König <christian.koenig@amd.com>
Sun, 20 Apr 2014 15:16:12 +0000 (17:16 +0200)
This improves the PLL parameters when we work at
the limits of the allowed ranges.

Signed-off-by: Christian König <christian.koenig@amd.com>

No differences found
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