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ARM: imx6q-clk: parent lvds_gate from lvds_sel
authorLucas Stach <l.stach@pengutronix.de>
Fri, 28 Mar 2014 16:52:52 +0000 (17:52 +0100)
committerShawn Guo <shawn.guo@freescale.com>
Mon, 14 Apr 2014 02:22:37 +0000 (10:22 +0800)
Allows fror proper refcounting of the parent clocks
when enabling the clock output on CLK1/2 pads.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

No differences found
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