ASoC: tlv320aic3x: Optimize PLL programming in aic3x_set_bias_level
authorJarkko Nikula <jhnikula@gmail.com>
Fri, 10 Sep 2010 11:23:29 +0000 (14:23 +0300)
committerLiam Girdwood <lrg@slimlogic.co.uk>
Sat, 11 Sep 2010 08:03:20 +0000 (09:03 +0100)
There is only need to enable/disable once the PLL when the bias is going
between on, prepare, standby and off states.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>

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