drm/radeon: fix irq ring buffer overflow handling
authorChristian König <christian.koenig@amd.com>
Wed, 23 Jul 2014 07:47:58 +0000 (09:47 +0200)
committerBen Hutchings <ben@decadent.org.uk>
Sat, 13 Sep 2014 22:41:39 +0000 (23:41 +0100)
commit e8c214d22e76dd0ead38f97f8d2dc09aac70d651 upstream.

We must mask out the overflow bit as well, otherwise
the wptr will never match the rptr again and the interrupt
handler will loop forever.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
[bwh: Backported to 3.2: drop changes for unsupported GPUs]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>

No differences found