drm/amdgpu: add backend implementation of gpu scheduler (v2)

v2: fix rebase breakage

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index 2800cf7..f1cb7d2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -85,7 +85,8 @@ amdgpu-y += amdgpu_cgs.o
 
 # GPU scheduler
 amdgpu-y += \
-       ../scheduler/gpu_scheduler.o
+       ../scheduler/gpu_scheduler.o \
+       amdgpu_sched.o
 
 amdgpu-$(CONFIG_COMPAT) += amdgpu_ioc32.o
 amdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 776339c..6bf16d9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -416,6 +416,7 @@ struct amdgpu_user_fence {
        struct amdgpu_bo        *bo;
        /* write-back address offset to bo start */
        uint32_t                offset;
+       uint64_t                sequence;
 };
 
 int amdgpu_fence_driver_init(struct amdgpu_device *adev);
@@ -859,6 +860,8 @@ enum amdgpu_ring_type {
        AMDGPU_RING_TYPE_VCE
 };
 
+extern struct amd_sched_backend_ops amdgpu_sched_ops;
+
 struct amdgpu_ring {
        struct amdgpu_device            *adev;
        const struct amdgpu_ring_funcs  *funcs;
@@ -1232,6 +1235,11 @@ struct amdgpu_cs_parser {
 
        /* user fence */
        struct amdgpu_user_fence uf;
+
+       struct mutex job_lock;
+       struct work_struct job_work;
+       int (*prepare_job)(struct amdgpu_cs_parser *sched_job);
+       int (*run_job)(struct amdgpu_cs_parser *sched_job);
 };
 
 static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p, uint32_t ib_idx, int idx)

diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
Simple merge

diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
Simple merge