drivers: spi: Fix data loss issue in QSPI
authorNaresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Fri, 7 Mar 2025 09:38:26 +0000 (01:38 -0800)
committerTom Rini <trini@konsulko.com>
Tue, 29 Apr 2025 21:28:54 +0000 (15:28 -0600)
QSPI driver performs chip select operation before every read/write
access. During this operation, driver needs to enable and disable
the QSPI controller. This may cause data loss if there is inadvertent
halting of any ongoing read/write operation. To avoid this scenario,
waiting for the QSPI status to be idle before next read/write
operation is implemented.

Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
drivers/spi/cadence_qspi_apb.c

index f2f69cf..b579699 100644 (file)
@@ -747,6 +747,10 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_priv *priv,
                goto failrd;
        }
 
+       /* Wait til QSPI is idle */
+       if (!cadence_qspi_wait_idle(priv->regbase))
+               return -EIO;
+
        return 0;
 
 failrd:
@@ -914,6 +918,11 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv,
 
        if (bounce_buf)
                free(bounce_buf);
+
+       /* Wait til QSPI is idle */
+       if (!cadence_qspi_wait_idle(priv->regbase))
+               return -EIO;
+
        return 0;
 
 failwr: