arm64: atomics: patch in lse instructions when supported by the CPU
authorWill Deacon <will.deacon@arm.com>
Tue, 3 Feb 2015 16:14:13 +0000 (16:14 +0000)
committerWill Deacon <will.deacon@arm.com>
Mon, 27 Jul 2015 14:28:50 +0000 (15:28 +0100)
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.

This patch introduces runtime patching of atomic_t and atomic64_t
routines so that the call-site for the out-of-line ll/sc sequences is
patched with an LSE atomic instruction when we detect that
the CPU supports it.

If binutils is not recent enough to assemble the LSE instructions, then
the ll/sc sequences are inlined as though CONFIG_ARM64_LSE_ATOMICS=n.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/Makefile
arch/arm64/include/asm/atomic.h
arch/arm64/include/asm/atomic_ll_sc.h
arch/arm64/include/asm/atomic_lse.h
arch/arm64/include/asm/lse.h [new file with mode: 0644]
arch/arm64/kernel/setup.c

index 0953a97..15ff5b4 100644 (file)
@@ -17,7 +17,18 @@ GZFLAGS              :=-9
 
 KBUILD_DEFCONFIG := defconfig
 
-KBUILD_CFLAGS  += -mgeneral-regs-only
+# Check for binutils support for specific extensions
+lseinstr := $(call as-instr,.arch_extension lse,-DCONFIG_AS_LSE=1)
+
+ifeq ($(CONFIG_ARM64_LSE_ATOMICS), y)
+  ifeq ($(lseinstr),)
+$(warning LSE atomics not supported by binutils)
+  endif
+endif
+
+KBUILD_CFLAGS  += -mgeneral-regs-only $(lseinstr)
+KBUILD_AFLAGS  += $(lseinstr)
+
 ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
 KBUILD_CPPFLAGS        += -mbig-endian
 AS             += -EB
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge