Convert CONFIG_SYS_IMMR to Kconfig
authorTom Rini <trini@konsulko.com>
Mon, 13 Dec 2021 03:12:30 +0000 (22:12 -0500)
committerTom Rini <trini@konsulko.com>
Mon, 27 Dec 2021 13:41:38 +0000 (08:41 -0500)
This converts the following to Kconfig:
   CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>
20 files changed:
arch/Kconfig
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
arch/arm/include/asm/arch-ls102xa/config.h
arch/powerpc/cpu/mpc83xx/Kconfig
arch/powerpc/cpu/mpc83xx/start.S
arch/powerpc/cpu/mpc8xx/Kconfig
configs/MCR3000_defconfig
configs/ids8313_defconfig
drivers/i2c/fsl_i2c.c
include/configs/M5208EVBE.h
include/configs/M5235EVB.h
include/configs/M5253DEMO.h
include/configs/M5275EVB.h
include/configs/M53017EVB.h
include/configs/M5329EVB.h
include/configs/M5373EVB.h
include/configs/astro_mcf5373l.h
include/configs/eb_cpu5282.h
include/mpc85xx.h

index 3915606..ba2c57d 100644 (file)
@@ -353,6 +353,18 @@ config SYS_DISABLE_DCACHE_OPS
         Note that, its up to the individual architectures to implement
         this functionality.
 
+config SYS_IMMR
+       hex
+       depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
+       default 0xFF000000 if MPC8xx
+       default 0xF0000000 if ARCH_MPC8313
+       default 0xE0000000 if MPC83xx && !ARCH_MPC8313
+       default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
+       default SYS_CCSRBAR_DEFAULT
+       help
+         Address for the Internal Memory-Mapped Registers (IMMR) window used
+         to configure the features of many Freescale / NXP SoCs.
+
 config SKIP_LOWLEVEL_INIT
        bool "Skip the calls to certain low level initialization functions"
        depends on ARM || NDS32 || MIPS || RISCV
index c9be076..06adf66 100644 (file)
@@ -11,7 +11,6 @@
 #include <linux/bitops.h>
 #endif
 
-#define CONFIG_SYS_IMMR                                0x01000000
 #define CONFIG_SYS_DCSRBAR                     0x20000000
 #define CONFIG_SYS_DCSR_DCFG_ADDR      (CONFIG_SYS_DCSRBAR + 0x00140000)
 #define CONFIG_SYS_DCSR_COP_CCP_ADDR   (CONFIG_SYS_DCSRBAR + 0x02008040)
index b64d7fb..863618a 100644 (file)
@@ -9,7 +9,6 @@
 #ifndef __ARCH_FSL_LSCH3_IMMAP_H_
 #define __ARCH_FSL_LSCH3_IMMAP_H_
 
-#define CONFIG_SYS_IMMR                                0x01000000
 #define CONFIG_SYS_FSL_DDR_ADDR                        (CONFIG_SYS_IMMR + 0x00080000)
 #define CONFIG_SYS_FSL_DDR2_ADDR               (CONFIG_SYS_IMMR + 0x00090000)
 #define CONFIG_SYS_FSL_DDR3_ADDR               0x08210000
index 3884948..0e1f9e0 100644 (file)
@@ -11,7 +11,6 @@
 #define OCRAM_BASE_S_ADDR                      0x10010000
 #define OCRAM_S_SIZE                           0x00010000
 
-#define CONFIG_SYS_IMMR                                0x01000000
 #define CONFIG_SYS_DCSRBAR                     0x20000000
 
 #define CONFIG_SYS_DCSR_DCFG_ADDR      (CONFIG_SYS_DCSRBAR + 0x00220000)
index cff98f7..d58d278 100644 (file)
@@ -179,13 +179,6 @@ config ARCH_MPC837X
        select SYS_CACHE_SHIFT_5
        select FSL_ELBC
 
-config SYS_IMMR
-       hex "Value for IMMR"
-       default 0xE0000000
-       help
-         Address for the Internal Memory-Mapped Registers (IMMR) window used
-         to configure the features of the SoC.
-
 source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
index c4953df..91c8778 100644 (file)
@@ -115,9 +115,6 @@ disable_addr_trans:
 #ifndef CONFIG_DEFAULT_IMMR
 #error CONFIG_DEFAULT_IMMR must be defined
 #endif /* CONFIG_DEFAULT_IMMR */
-#ifndef CONFIG_SYS_IMMR
-#define CONFIG_SYS_IMMR CONFIG_DEFAULT_IMMR
-#endif /* CONFIG_SYS_IMMR */
 
 /*
  * After configuration, a system reset exception is executed using the
index 091bbaf..d630711 100644 (file)
@@ -84,9 +84,6 @@ config SYS_DER
        help
          Debug Event Register (37-47)
 
-config SYS_IMMR
-       hex "Value for IMMR"
-
 source "board/cssi/MCR3000/Kconfig"
 
 endmenu
index b9c5843..04fe756 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
 CONFIG_MPC8xx=y
-CONFIG_SYS_IMMR=0xFF000000
 CONFIG_TARGET_MCR3000=y
 CONFIG_8xx_GCLK_FREQ=132000000
 CONFIG_CMD_IMMAP=y
index 006c80c..4ee97ae 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_CLK_FREQ=66000000
 CONFIG_MPC83xx=y
 CONFIG_HIGH_BATS=y
 CONFIG_TARGET_IDS8313=y
-CONFIG_SYS_IMMR=0xF0000000
 CONFIG_CORE_PLL_RATIO_2_1=y
 CONFIG_PCI_HOST_MODE_ENABLE=y
 CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y
index eafd801..9a3c824 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_M68K
+#define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
+#endif
+
 #if !CONFIG_IS_ENABLED(DM_I2C)
 static const struct fsl_i2c_base *i2c_base[4] = {
        (struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET),
index 717e3e4..5ed624c 100644 (file)
@@ -38,7 +38,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
index 2e5220f..90f1664 100644 (file)
@@ -47,7 +47,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG      (gpio->par_qspi)
 #define CONFIG_SYS_I2C_PINMUX_CLR      ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
 #define CONFIG_SYS_I2C_PINMUX_SET      (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
index ff29096..c5d8aa3 100644 (file)
@@ -67,7 +67,6 @@
 #define CONFIG_HOSTNAME                "M5253DEMO"
 
 /* I2C */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG      (*(u32 *) (CONFIG_SYS_MBAR+0x19C))
 #define CONFIG_SYS_I2C_PINMUX_CLR      (0xFFFFE7FF)
 #define CONFIG_SYS_I2C_PINMUX_SET      (0)
index 7ca9164..b18f031 100644 (file)
@@ -58,7 +58,6 @@
 #endif
 
 /* I2C */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG      (gpio_reg->par_feci2c)
 #define CONFIG_SYS_I2C_PINMUX_CLR      (0xFFF0)
 #define CONFIG_SYS_I2C_PINMUX_SET      (0x000F)
index 58b75b2..5db189a 100644 (file)
@@ -53,7 +53,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
index f172db0..16343b5 100644 (file)
@@ -47,7 +47,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
index ddcd752..ccc59eb 100644 (file)
@@ -49,7 +49,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
index 1af3438..d87ca30 100644 (file)
@@ -58,7 +58,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
 
 /*
  * Defines processor clock - important for correct timings concerning serial
index bf1cfc3..62b62e0 100644 (file)
  * I2C
  */
 
-#define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
-
 #ifdef CONFIG_CMD_DATE
 #define CONFIG_RTC_DS1338
 #define CONFIG_I2C_RTC_ADDR            0x68
index ce6d083..2c69a60 100644 (file)
@@ -60,8 +60,4 @@ CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead."
 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
                                 CONFIG_SYS_CCSRBAR_PHYS_LOW)
 
-#ifndef CONFIG_SYS_IMMR
-#define CONFIG_SYS_IMMR                        CONFIG_SYS_CCSRBAR
-#endif
-
 #endif /* __MPC85xx_H__ */