irqchip: versatile FPGA: support cascaded interrupts from DT
authorLinus Walleij <linus.walleij@linaro.org>
Fri, 4 Oct 2013 13:15:35 +0000 (15:15 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 3 Jan 2014 21:26:13 +0000 (22:26 +0100)
The Versatile FPGA interrupt controller supports cascading interrupts,
i.e. that its output is connected to the input of another interrupt
controller. This makes it possible to pass a parent interrupt from
the device tree and print it in the boot log if applicable.

Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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