x86: cacheinfo: use L3 cache index disable feature only for CPUs that support it
authorAndreas Herrmann <andreas.herrmann3@amd.com>
Thu, 9 Apr 2009 13:05:10 +0000 (15:05 +0200)
committerIngo Molnar <mingo@elte.hu>
Fri, 10 Apr 2009 12:21:40 +0000 (14:21 +0200)
AMD family 0x11 CPU doesn't support the feature.

Some AMD family 0x10 CPUs do not support it or have an erratum, see
erratum #382 in "Revision Guide for AMD Family 10h Processors, 41322
Rev. 3.40 February 2009".

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
CC: Mark Langsdorf <mark.langsdorf@amd.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <20090409130510.GG31527@alberich.amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

No differences found