PCI: Add offsets of PCIe capability registers
authorBjorn Helgaas <bhelgaas@google.com>
Tue, 27 Aug 2013 18:17:59 +0000 (12:17 -0600)
committerBjorn Helgaas <bhelgaas@google.com>
Wed, 28 Aug 2013 17:28:10 +0000 (11:28 -0600)
These offsets are not used, and in some cases are completely reserved
even in the spec, but I'm adding them for completeness just to match
the diagrams in the spec, e.g., PCIe spec r3.0, sec 7.8.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

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