OMAP3 clock: split mcbspX_src_fck from mcbspX_fck
authorPaul Walmsley <paul@pwsan.com>
Thu, 18 Sep 2008 17:46:54 +0000 (11:46 -0600)
committerTony Lindgren <tony@atomide.com>
Mon, 22 Sep 2008 14:45:20 +0000 (17:45 +0300)
McBSP clock source control registers are located in the System Control
Module, not the PRCM.  However, the clock enable/disable registers are
in the CM.  Since the following patches require all registers in a
struct clk to be in only one of {CM, PRM, SCM}, we must split the
source clock selection into a separate struct clk from the clock
enable/disable control.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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