sparc: perf: Add support M7 processor

The M7 processor has a different hypervisor group id and different PCR fast
trap values. PIC read/write functions and PCR bit fields are the same as
the T4 so those are reused.

Signed-off-by: David Ahern <david.ahern@oracle.com>
Acked-by: Bob Picco <bob.picco@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --cc arch/sparc/include/asm/hypervisor.h
Simple merge

diff --cc arch/sparc/kernel/hvapi.c
Simple merge

diff --cc arch/sparc/kernel/hvcalls.S
Simple merge

diff --cc arch/sparc/kernel/pcr.c
Simple merge

diff --cc arch/sparc/kernel/perf_event.c
Simple merge