clk: qcom: Add reset controller support
authorStephen Boyd <sboyd@codeaurora.org>
Wed, 15 Jan 2014 18:47:27 +0000 (10:47 -0800)
committerMike Turquette <mturquette@linaro.org>
Thu, 16 Jan 2014 20:01:02 +0000 (12:01 -0800)
Reset controllers and clock controllers are combined into one IP
block on Qualcomm chipsets. Usually a reset signal is associated
with each clock branch but sometimes a reset signal is associated
with a handful of clocks. Either way the register interface is
the same; set a bit to assert a reset and clear a bit to deassert
a reset. Add support for these types of resets signals.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/qcom/Kconfig
drivers/clk/qcom/Makefile
drivers/clk/qcom/reset.c [new file with mode: 0644]
drivers/clk/qcom/reset.h [new file with mode: 0644]

Simple merge
Simple merge
Simple merge
Simple merge