struct rswitch_port_priv *priv = miidev->priv;
struct rswitch_etha *etha = &priv->etha;
int val;
- int reg;
/* Change to disable mode */
rswitch_etha_change_mode(priv, EAMC_OPC_DISABLE);
rswitch_etha_change_mode(priv, EAMC_OPC_CONFIG);
/* Enable Station Management clock */
- reg = readl(etha->addr + MPIC);
- reg &= ~MPIC_PSMCS_MASK & ~MPIC_PSMHT_MASK;
- writel(reg | MPIC_MDC_CLK_SET, etha->addr + MPIC);
+ clrsetbits_le32(etha->addr + MPIC,
+ MPIC_PSMCS_MASK | MPIC_PSMHT_MASK,
+ MPIC_MDC_CLK_SET);
/* Set Station Management Mode : Clause 45 */
setbits_le32(etha->addr + MPSM, MPSM_MFF_C45);
{
struct rswitch_port_priv *priv = miidev->priv;
struct rswitch_etha *etha = &priv->etha;
- int reg;
/* Change to disable mode */
rswitch_etha_change_mode(priv, EAMC_OPC_DISABLE);
rswitch_etha_change_mode(priv, EAMC_OPC_CONFIG);
/* Enable Station Management clock */
- reg = readl(etha->addr + MPIC);
- reg &= ~MPIC_PSMCS_MASK & ~MPIC_PSMHT_MASK;
- writel(reg | MPIC_MDC_CLK_SET, etha->addr + MPIC);
+ clrsetbits_le32(etha->addr + MPIC,
+ MPIC_PSMCS_MASK | MPIC_PSMHT_MASK,
+ MPIC_MDC_CLK_SET);
/* Set Station Management Mode : Clause 45 */
setbits_le32(etha->addr + MPSM, MPSM_MFF_C45);