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ARM: dts: imx6qdl: Fix CODA960 interrupt order
authorPhilipp Zabel <p.zabel@pengutronix.de>
Fri, 28 Nov 2014 15:23:46 +0000 (16:23 +0100)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 29 Dec 2014 11:22:25 +0000 (19:22 +0800)
Commit a04a0b6fed4f ("ARM: dts: imx6qdl: Enable CODA960 VPU") lost the
fix for the CODA960 interrupt order during a rebase before being applied.
This patch adds the missing bit and brings the interrupts and
interrupt-names properties back in sync.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

No differences found
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