drm/i915: Kill intel_flush_primary_plane()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 26 May 2015 17:27:23 +0000 (20:27 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 28 May 2015 09:13:51 +0000 (11:13 +0200)
The primary plane frobbing was removed from the sprite code in
 commit ecce87ea3ab55ad0dc64460e6422c357d158a55e
 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
 Date:   Tue Apr 21 17:12:50 2015 +0300

    drm/i915: Remove implicitly disabling primary plane for now

but the intel_flush_primary_plane() calls were left behind. Replace them
with straight forward POSTING_READ() of the sprite surface address
register.

The other user of intel_flush_primary_plane() is g4x_disable_trickle_feed()
where we can just inline the steps directly.

This allows intel_flush_primary_plane() to be killed off.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_sprite.c

index 657a333..27792c1 100644 (file)
@@ -2210,20 +2210,6 @@ static void intel_disable_pipe(struct intel_crtc *crtc)
                intel_wait_for_pipe_off(crtc);
 }
 
-/*
- * Plane regs are double buffered, going from enabled->disabled needs a
- * trigger in order to latch.  The display address reg provides this.
- */
-void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
-                              enum plane plane)
-{
-       struct drm_device *dev = dev_priv->dev;
-       u32 reg = INTEL_INFO(dev)->gen >= 4 ? DSPSURF(plane) : DSPADDR(plane);
-
-       I915_WRITE(reg, I915_READ(reg));
-       POSTING_READ(reg);
-}
-
 /**
  * intel_enable_primary_hw_plane - enable the primary plane on a given pipe
  * @plane:  plane to be enabled
Simple merge
Simple merge
Simple merge