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arm: zynq: timer: Remove unnecessary register write
authorSoren Brinkmann <soren.brinkmann@xilinx.com>
Wed, 19 Dec 2012 18:18:37 +0000 (10:18 -0800)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 28 Jan 2013 12:27:21 +0000 (13:27 +0100)
Acknowedging an interrupt requires to read the interrupt register
only. The write was only required to work around a bug in
the QEMU implementation of the TTC, which is fixed.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
arch/arm/mach-zynq/timer.c patch | blob | history

diff --cc arch/arm/mach-zynq/timer.c
Simple merge
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