MIPS: lantiq: adds code for booting GPHY
authorJohn Crispin <blogic@openwrt.org>
Fri, 9 Nov 2012 12:43:30 +0000 (13:43 +0100)
committerJohn Crispin <blogic@openwrt.org>
Sun, 11 Nov 2012 17:47:35 +0000 (18:47 +0100)
The XRX200 family of SoCs has embedded gigabit PHYs. This patch adds code to
boot them up.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4522


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