EDAC, synps: Add EDAC support for zynq ddr ecc controller

Add EDAC support for ecc errors reporting on the synopsys ddr
controller. The ddr ecc controller corrects single bit errors and
detects double bit errors.

Selected important-ish notes from the changelog:

- I have not taken care of spliting synps_edac_geterror_info function as
it adds additional indentation levels and moreover the existing changes
were made as part of the v2 review comments

- Removed dt binding info as already there is a binding info available
under memorycontroller. so, updated ecc info there.

- Shortened the prefix "sysnopsys" to "synps"

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Link: http://lkml.kernel.org/r/a728a8d4678f4dbf9de189a480297c3d@BY2FFO11FD034.protection.gbl
[ Boris: massage commit message. ]
Signed-off-by: Borislav Petkov <bp@suse.de>

diff --git a/MAINTAINERS b/MAINTAINERS
index ddb9ac8..375e248 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1583,6 +1583,7 @@ N:        xilinx
 F:     drivers/clocksource/cadence_ttc_timer.c
 F:     drivers/i2c/busses/i2c-cadence.c
 F:     drivers/mmc/host/sdhci-of-arasan.c
+F:     drivers/edac/synopsys_edac.c
 
 ARM SMMU DRIVER
 M:     Will Deacon <will.deacon@arm.com>

diff --cc drivers/edac/Kconfig
Simple merge

diff --cc drivers/edac/Makefile
Simple merge

diff --cc drivers/edac/synopsys_edac.c
Simple merge