Convert CONFIG_SYS_I2C_EEPROM_CCID et al to Kconfig
authorTom Rini <trini@konsulko.com>
Wed, 10 Aug 2022 14:29:27 +0000 (10:29 -0400)
committerTom Rini <trini@konsulko.com>
Thu, 1 Sep 2022 21:18:42 +0000 (17:18 -0400)
This converts the following to Kconfig:
   CONFIG_SYS_I2C_EEPROM_CCID
   CONFIG_SYS_I2C_EEPROM_NXID
   CONFIG_SYS_EEPROM_BUS_NUM

Signed-off-by: Tom Rini <trini@konsulko.com>
38 files changed:
common/Kconfig
configs/MPC8548CDS_36BIT_defconfig
configs/MPC8548CDS_defconfig
configs/MPC8548CDS_legacy_defconfig
configs/ls1021atwr_nor_SECURE_BOOT_defconfig
configs/ls1021atwr_nor_defconfig
configs/ls1021atwr_nor_lpuart_defconfig
configs/ls1021atwr_qspi_defconfig
configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
configs/ls1021atwr_sdcard_ifc_defconfig
configs/ls1021atwr_sdcard_qspi_defconfig
include/configs/MPC8548CDS.h
include/configs/P1010RDB.h
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/corenet_ds.h
include/configs/ls1012aqds.h
include/configs/ls1021aiot.h
include/configs/ls1021aqds.h
include/configs/ls1021atsn.h
include/configs/ls1021atwr.h
include/configs/ls1028a_common.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046afrwy.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/configs/lx2160a_common.h
include/configs/lx2160aqds.h
include/configs/lx2160ardb.h
include/configs/lx2162aqds.h
include/configs/sifive-unmatched.h

index e7914ca..2c3f7f4 100644 (file)
@@ -671,6 +671,27 @@ config ID_EEPROM
          A number of different systems and vendors enable a vendor-specified
          EEPROM that contains various identifying features.
 
+config SYS_EEPROM_BUS_NUM
+       int "I2C bus number of the system identifier EEPROM"
+       depends on ID_EEPROM
+       default 0
+
+choice
+       prompt "EEPROM starts with 'CCID' or 'NXID'"
+       depends on ID_EEPROM && (PPC || ARCH_LS1021A || FSL_LAYERSCAPE)
+       default SYS_I2C_EEPROM_NXID
+       help
+         Specify if the Freescale / NXP ID EEPROM starts with 'CCID' or 'NXID'
+         ASCII literal string.
+
+config SYS_I2C_EEPROM_CCID
+       bool "EEPROM starts with 'CCID'"
+
+config SYS_I2C_EEPROM_NXID
+       bool "EEPROM starts with 'NXID'"
+
+endchoice
+
 config PCI_INIT_R
        bool "Enumerate PCI buses during init"
        depends on PCI
index def5d6f..feb0be5 100644 (file)
@@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
 # CONFIG_MISC_INIT_R is not set
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_CCID=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index 881fca9..9453479 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
 # CONFIG_MISC_INIT_R is not set
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_CCID=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index 99a6330..f069451 100644 (file)
@@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
 # CONFIG_MISC_INIT_R is not set
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_CCID=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index e385ea4..f66aacc 100644 (file)
@@ -33,6 +33,7 @@ CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_MISC_INIT_R=y
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=1
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_SYS_BOOTM_LEN=0x4000000
index 1d4e57c..110cf5d 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_MISC_INIT_R=y
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=1
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_SYS_BOOTM_LEN=0x4000000
index 391f464..9d8dbbf 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_MISC_INIT_R=y
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=1
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_SYS_BOOTM_LEN=0x4000000
index 3b37641..039c984 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_MISC_INIT_R=y
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=1
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_SYS_BOOTM_LEN=0x4000000
index 38c074d..a916959 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_MISC_INIT_R=y
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=1
 CONFIG_SPL_MAX_SIZE=0x1a000
 CONFIG_SPL_PAD_TO=0x1c000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
index 3dd0871..65f033a 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_MISC_INIT_R=y
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=1
 CONFIG_SPL_MAX_SIZE=0x1a000
 CONFIG_SPL_PAD_TO=0x1c000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
index 84722b0..45c9179 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_MISC_INIT_R=y
 CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=1
 CONFIG_SPL_MAX_SIZE=0x1a000
 CONFIG_SPL_PAD_TO=0x1c000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
index 0c710ef..eb7a835 100644 (file)
 #define CONFIG_SYS_I2C_NOPROBES                { {0, 0x69} }
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_CCID
-
 /*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
index 7f5eaf8..8492a64 100644 (file)
@@ -351,10 +351,6 @@ extern unsigned long get_sdram_size(void);
 
 /* I2C EEPROM */
 #if defined(CONFIG_TARGET_P1010RDB_PB)
-#ifdef CONFIG_ID_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#endif
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
 #define MAX_NUM_PORTS                  9 /* for 128Bytes EEPROM */
 #endif
 /* enable read and write access to EEPROM */
index 11a3db5..925720d 100644 (file)
 #define CONFIG_SYS_DCSRBAR_PHYS                0xf00000000ull
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /*
  * DDR Setup
  */
index a5461d7..e0aa2b9 100644 (file)
 #define CONFIG_SYS_DCSRBAR_PHYS                0xf00000000ull
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /*
  * DDR Setup
  */
index fc068c9..e852fc4 100644 (file)
 #define CONFIG_SYS_DCSRBAR     0xf0000000
 #define CONFIG_SYS_DCSRBAR_PHYS        0xf00000000ull
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /*
  * DDR Setup
  */
index 056e2d1..68cf135 100644 (file)
 #define CONFIG_SYS_DCSRBAR     0xf0000000
 #define CONFIG_SYS_DCSRBAR_PHYS        0xf00000000ull
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /*
  * DDR Setup
  */
index 7e65b2b..6ee5ec0 100644 (file)
 #define CONFIG_SYS_DCSRBAR_PHYS                0xf00000000ull
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /*
  * DDR Setup
  */
index 48fe828..9ad3a12 100644 (file)
 #define RTC
 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM    0
-
 
 /* Voltage monitor on channel 2*/
 #define I2C_VOL_MONITOR_ADDR           0x40
index ec68874..f418c8c 100644 (file)
  * I2C
  */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /*
  * MMC
  */
index aaf28a3..d383b6c 100644 (file)
 
 /* GPIO */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /*
  * I2C bus multiplexer
  */
index f318eb5..157f218 100644 (file)
 
 /* I2C */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /* PCIe */
 #define FSL_PCIE_COMPAT                        "fsl,ls1021a-pcie"
 
index 5f3e8d5..83c74b6 100644 (file)
 
 /* GPIO */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              1
-
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
 
index 8413e68..2442266 100644 (file)
 #define I2C_MUX_PCA_ADDR_PRI            0x77 /* Primary Mux*/
 #define I2C_MUX_CH_DEFAULT              0x8
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /* DisplayPort */
 #define DP_PWD_EN_DEFAULT_MASK          0x8
 
index 49f6cd6..4158d15 100644 (file)
 
 /* SATA */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 #define CONFIG_SYS_SATA                                AHCI_BASE_ADDR
 
 /*
index ff5da5d..4bfe4e3 100644 (file)
 #define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_CPLD_FTIM2
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_CPLD_FTIM3
 
-/* EEPROM */
-#ifndef SPL_NO_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-#endif
-
 /*
  * Environment
  */
index 43717cd..2df5f3f 100644 (file)
@@ -59,8 +59,6 @@
 #define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NAND_FTIM3
 
 /* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
 #define I2C_RETIMER_ADDR                       0x18
 
 /* I2C bus multiplexer */
index 869bbd7..1f54e51 100644 (file)
 #define CFG_LPUART_EN          0x2
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /*
  * IFC Definitions
  */
index 382d5c7..5d32957 100644 (file)
@@ -98,8 +98,6 @@
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_CPLD_FTIM3
 
 /* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
 #define I2C_RETIMER_ADDR                       0x18
 
 /* PMIC */
index 747ee9d..2d3351e 100644 (file)
 #define RTC
 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 #ifdef CONFIG_FSL_DSPI
 #if !defined(CONFIG_TFABOOT) && \
        !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
index 3e829ea..d98ed39 100644 (file)
 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 #ifndef SPL_NO_ENV
 /* Initial environment variables */
 #ifdef CONFIG_TFABOOT
index 6487397..d02d7fc 100644 (file)
 #define CONFIG_RTC_DS3231               1
 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /* Initial environment variables */
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #ifdef CONFIG_NXP_ESBC
index 87d07b7..09484dc 100644 (file)
 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 #define BOOT_TARGET_DEVICES(func) \
        func(USB, usb, 0) \
        func(MMC, mmc, 0) \
index d39c003..ed69b85 100644 (file)
 #define RTC
 #define CONFIG_SYS_I2C_RTC_ADDR                0x51  /* Channel 3*/
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /* Qixis */
 #define CONFIG_SYS_I2C_FPGA_ADDR               0x66
 
index 585aab2..4e8a904 100644 (file)
 
 /* MAC/PHY configuration */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS              \
        EXTRA_ENV_SETTINGS                      \
index 5c4ea27..bb9239c 100644 (file)
 #define I2C_EMC2305_CMD                0x40
 #define I2C_EMC2305_PWM                0x80
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM                 0
-
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS              \
        EXTRA_ENV_SETTINGS                      \
index d1ae403..b70abb0 100644 (file)
 /* RTC */
 #define CONFIG_SYS_RTC_BUS_NUM         0
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS              \
        EXTRA_ENV_SETTINGS                      \
index 9923f3d..85fab92 100644 (file)
@@ -51,6 +51,4 @@
        "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
        BOOTENV
 
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 #endif /* __SIFIVE_UNMATCHED_H */