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ARM: S3C64XX: Correct reservation of GPIOs for CPU module on Cragganmore
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Thu, 3 Nov 2011 07:28:15 +0000 (16:28 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Tue, 8 Nov 2011 10:56:03 +0000 (19:56 +0900)
The gpio_base for the PMIC on the CPU module was being incorrectly set to
be the same as that for the CODEC causing the two GPIO drivers to collide.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

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