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[POWERPC] 85xx: Only invalidate TLB0 and TLB1
authorKumar Gala <galak@kernel.crashing.org>
Mon, 28 Jan 2008 19:23:42 +0000 (13:23 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 28 Jan 2008 19:23:42 +0000 (13:23 -0600)
All current 85xx/e500 implementations only have two TLB
arrays.  We are wasting cycles by invalidating TLB2 and TLB3.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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