{
return 0;
}
-
-#define RST_BASE 0xE6160000
-#define RST_CA57RESCNT (RST_BASE + 0x40)
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_RSTOUTCR (RST_BASE + 0x58)
-#define RST_CA57_CODE 0xA5A5000F
-#define RST_CA53_CODE 0x5A5A000F
-
-void reset_cpu(void)
-{
- unsigned long midr, cputype;
-
- asm volatile("mrs %0, midr_el1" : "=r" (midr));
- cputype = (midr >> 4) & 0xfff;
-
- if (cputype == 0xd03)
- writel(RST_CA53_CODE, RST_CA53RESCNT);
- else if (cputype == 0xd07)
- writel(RST_CA57_CODE, RST_CA57RESCNT);
- else
- hang();
-}
return 0;
}
-
-#define RST_BASE 0xE6160000
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_CA53_CODE 0x5A5A000F
-
-void reset_cpu(void)
-{
- writel(RST_CA53_CODE, RST_CA53RESCNT);
-}
{
return 0;
}
-
-#define RST_BASE 0xE6160000
-#define RST_CA57RESCNT (RST_BASE + 0x40)
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_RSTOUTCR (RST_BASE + 0x58)
-#define RST_CA57_CODE 0xA5A5000F
-#define RST_CA53_CODE 0x5A5A000F
-
-void reset_cpu(void)
-{
- unsigned long midr, cputype;
-
- asm volatile("mrs %0, midr_el1" : "=r" (midr));
- cputype = (midr >> 4) & 0xfff;
-
- if (cputype == 0xd03)
- writel(RST_CA53_CODE, RST_CA53RESCNT);
- else if (cputype == 0xd07)
- writel(RST_CA57_CODE, RST_CA57RESCNT);
- else
- hang();
-}
{
return 0;
}
-
-#define RST_BASE 0xE6160000
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_CA53_CODE 0x5A5A000F
-
-void reset_cpu(void)
-{
- writel(RST_CA53_CODE, RST_CA53RESCNT);
-}
}
#define RST_BASE 0xE6160000 /* Domain0 */
-#define RST_SRESCR0 (RST_BASE + 0x18)
-#define RST_SPRES 0x5AA58000
#define RST_WDTRSTCR (RST_BASE + 0x10)
#define RST_RWDT 0xA55A8002
return 0;
}
-
-void reset_cpu(void)
-{
- writel(RST_SPRES, RST_SRESCR0);
-}
#include <common.h>
#include <dm.h>
#include <fdt_support.h>
+#include <hang.h>
#include <init.h>
#include <asm/global_data.h>
+#include <asm/io.h>
#include <dm/uclass-internal.h>
#include <asm/arch/rmobile.h>
#include <linux/libfdt.h>
return 0;
}
+#if defined(CONFIG_RCAR_GEN3)
+#define RST_BASE 0xE6160000
+#define RST_CA57RESCNT (RST_BASE + 0x40)
+#define RST_CA53RESCNT (RST_BASE + 0x44)
+#define RST_RSTOUTCR (RST_BASE + 0x58)
+#define RST_CA57_CODE 0xA5A5000F
+#define RST_CA53_CODE 0x5A5A000F
+
+void __weak reset_cpu(void)
+{
+ unsigned long midr, cputype;
+
+ asm volatile("mrs %0, midr_el1" : "=r" (midr));
+ cputype = (midr >> 4) & 0xfff;
+
+ if (cputype == 0xd03)
+ writel(RST_CA53_CODE, RST_CA53RESCNT);
+ else if (cputype == 0xd07)
+ writel(RST_CA57_CODE, RST_CA57RESCNT);
+ else
+ hang();
+}
+#elif defined(CONFIG_RCAR_GEN4)
+#define RST_BASE 0xE6160000 /* Domain0 */
+#define RST_SRESCR0 (RST_BASE + 0x18)
+#define RST_SPRES 0x5AA58000
+
+void __weak reset_cpu(void)
+{
+ writel(RST_SPRES, RST_SRESCR0);
+}
+#else
+#error Neither CONFIG_RCAR_GEN3 nor CONFIG_RCAR_GEN4 are set
+#endif
+
#if defined(CONFIG_OF_BOARD_SETUP)
static int is_mem_overlap(void *blob, int first_mem_node, int curr_mem_node)
{
return 0;
}
-#define RST_BASE 0xE6160000
-#define RST_CA57RESCNT (RST_BASE + 0x40)
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_RSTOUTCR (RST_BASE + 0x58)
-#define RST_CODE 0xA5A5000F
-
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
void reset_cpu(void)
{
-#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
-#else
- /* only CA57 ? */
- writel(RST_CODE, RST_CA57RESCNT);
-#endif
}
+#endif
#ifdef CONFIG_MULTI_DTB_FIT
int board_fit_config_name_match(const char *name)
return 0;
}
-
-void reset_cpu(void)
-{
- writel(RST_SPRES, RST_SRESCR0);
-}
return 0;
}
-
-void reset_cpu(void)
-{
- writel(RST_SPRES, RST_SRESCR0);
-}