omap2 clock: vlynq_fck is missing clksel divider code
authorPaul Walmsley <paul@pwsan.com>
Thu, 2 Aug 2007 18:10:14 +0000 (12:10 -0600)
committerTony Lindgren <tony@atomide.com>
Fri, 10 Aug 2007 09:35:52 +0000 (02:35 -0700)
vlynq_fck is a clksel clock.  But omap2_clk_set_parent() is missing
the code to divide its parent's rate down appropriately when vlynq_fck
is set to use a core_ck parent.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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