board: phytec: phycore-imx8mm: Add EEPROM detection initialisation
authorYunus Bas <y.bas@phytec.de>
Fri, 22 Nov 2024 10:29:38 +0000 (11:29 +0100)
committerFabio Estevam <festevam@gmail.com>
Tue, 26 Nov 2024 02:08:24 +0000 (23:08 -0300)
Add EEPROM detection initialisation for phyCORE-i.MX8MM.

Signed-off-by: Yunus Bas <y.bas@phytec.de>
arch/arm/dts/imx8mm-phyboard-polis-rdk-u-boot.dtsi
board/phytec/phycore_imx8mm/Kconfig
board/phytec/phycore_imx8mm/spl.c
configs/phycore-imx8mm_defconfig

index 516e52e..512dbc9 100644 (file)
        };
 };
 
+&pinctrl_i2c1 {
+       bootph-pre-ram;
+};
+
 &pinctrl_uart3 {
        bootph-pre-ram;
 };
        bootph-pre-ram;
 };
 
+&i2c1 {
+       bootph-pre-ram;
+};
+
 &uart3 {
        bootph-pre-ram;
 };
index 25e4bf2..0644912 100644 (file)
@@ -12,4 +12,5 @@ config SYS_CONFIG_NAME
 config IMX_CONFIG
        default "board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg"
 
+source "board/phytec/common/Kconfig"
 endif
index 8d85859..faff064 100644 (file)
 #include <log.h>
 #include <spl.h>
 
+#include "../common/imx8m_som_detection.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
+#define EEPROM_ADDR            0x51
+#define EEPROM_ADDR_FALLBACK   0x59
+
 int spl_board_boot_device(enum boot_device boot_dev_spl)
 {
        switch (boot_dev_spl) {
@@ -39,6 +44,18 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
 
 static void spl_dram_init(void)
 {
+       int ret;
+
+       ret = phytec_eeprom_data_setup_fallback(NULL, 0, EEPROM_ADDR,
+                       EEPROM_ADDR_FALLBACK);
+       if (ret)
+               goto out;
+
+       ret = phytec_imx8m_detect(NULL);
+       if (!ret)
+               phytec_print_som_info(NULL);
+
+out:
        ddr_init(&dram_timing);
 }
 
index 5e59efe..c245804 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_ENV_OFFSET=0x3C0000
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk"
 CONFIG_TARGET_PHYCORE_IMX8MM=y
+CONFIG_PHYTEC_SOM_DETECTION=y
 CONFIG_DM_RESET=y
 CONFIG_SYS_MONITOR_LEN=524288
 CONFIG_SPL_MMC=y