i2c: piix4: Add support for AMD ML and CZ SMBus changes
authorShane Huang <shane.huang@amd.com>
Wed, 22 Jan 2014 22:05:46 +0000 (14:05 -0800)
committerBen Hutchings <ben@decadent.org.uk>
Tue, 1 Apr 2014 23:58:45 +0000 (00:58 +0100)
commit 032f708bc4f6da868ec49dac48ddf3670d8035d3 upstream.

The locations of SMBus register base address and enablement bit are changed
from AMD ML, which need this patch to be supported.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
[bwh: Backported to 3.2:
 - Adjust context
 - Aux bus support is not included]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>

No differences found