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drm/i915/chv: Fix CHV PLL state tracking
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 9 Apr 2014 10:28:57 +0000 (13:28 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 20 May 2014 13:33:25 +0000 (15:33 +0200)
Setup the pipe config dpll state correctly for CHV. Also add
a assert_pipe_disabled() to chv_disable_pll(), and program the
DPLL_MD registers in chv_enable_pll().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c patch | blob | history

diff --cc drivers/gpu/drm/i915/intel_display.c
Simple merge
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