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mmc: sdhci-pci: Fix Braswell eMMC timeout clock frequency
authorAdrian Hunter <adrian.hunter@intel.com>
Wed, 24 Sep 2014 07:27:33 +0000 (10:27 +0300)
committerUlf Hansson <ulf.hansson@linaro.org>
Fri, 3 Oct 2014 12:25:35 +0000 (14:25 +0200)
Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-pci.c patch | blob | history

diff --cc drivers/mmc/host/sdhci-pci.c
Simple merge
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