+++ /dev/null
-From linux-omap-owner@vger.kernel.org Sat Sep 12 18:36:17 2009\r
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- Sat, 12 Sep 2009 09:34:13 -0700 (PDT)\r
-From: Sergio Aguirre <saaguirre@ti.com>\r
-To: Imre Deak <imre.deak@nokia.com>\r
-Cc: linux-fbdev-devel@lists.sourceforge.net, linux-omap@vger.kernel.org,\r
- Sergio Aguirre <saaguirre@ti.com>\r
-Subject: [PATCH] omapfb: Reorder Register_framebuffer call\r
-Date: Sat, 12 Sep 2009 19:34:09 +0300\r
-Message-Id: <1252773249-24444-1-git-send-email-saaguirre@ti.com>\r
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-X-OriginalArrivalTime: 12 Sep 2009 16:34:31.0630 (UTC) FILETIME=[E7A3E6E0:01CA33C6]\r
-\r
-This fixes the issue in which mm_lock mutex was attempted to be\r
-used without initializing previously.\r
-\r
-Thanks to the testers!\r
- - OMAP3430 SDP (Anand Gadiyar)\r
- - OMAP3530 EVM (Vaibhav Hiremath)\r
- - LogicPD's OMAP boards (Peter Brada)\r
- - Beagleboard Rev. C2 (Eric Witcher)\r
-\r
-Signed-off-by: Sergio Aguirre <saaguirre@ti.com>\r
-Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>\r
-Tested-by: Anand Gadiyar <gadiyar@ti.com>\r
-Tested-by: Peter Barada <peterb@logicpd.com>\r
-Tested-by: Eric Witcher <ewitcher@mindspring.com>\r
----\r
- drivers/video/omap/omapfb_main.c | 20 +++++++++++---------\r
- 1 files changed, 11 insertions(+), 9 deletions(-)\r
-\r
-diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c\r
-index 125e605..60f9482 100644\r
---- a/drivers/video/omap/omapfb_main.c\r
-+++ b/drivers/video/omap/omapfb_main.c\r
-@@ -1503,12 +1503,21 @@ static int fbinfo_init(struct omapfb_device *fbdev, struct fb_info *info)\r
- var->rotate = def_rotate;\r
- var->bits_per_pixel = fbdev->panel->bpp;\r
- \r
-+ r = register_framebuffer(info);\r
-+ if (r != 0) {\r
-+ dev_err(fbdev->dev,\r
-+ "registering framebuffer failed\n");\r
-+ return r;\r
-+ }\r
-+\r
- set_fb_var(info, var);\r
- set_fb_fix(info);\r
- \r
- r = fb_alloc_cmap(&info->cmap, 16, 0);\r
-- if (r != 0)\r
-+ if (r != 0) {\r
- dev_err(fbdev->dev, "unable to allocate color map memory\n");\r
-+ unregister_framebuffer(info);\r
-+ }\r
- \r
- return r;\r
- }\r
-@@ -1773,15 +1782,8 @@ static int omapfb_do_probe(struct platform_device *pdev,\r
- init_state++;\r
- \r
- vram = 0;\r
-- for (i = 0; i < fbdev->mem_desc.region_cnt; i++) {\r
-- r = register_framebuffer(fbdev->fb_info[i]);\r
-- if (r != 0) {\r
-- dev_err(fbdev->dev,\r
-- "registering framebuffer %d failed\n", i);\r
-- goto cleanup;\r
-- }\r
-+ for (i = 0; i < fbdev->mem_desc.region_cnt; i++)\r
- vram += fbdev->mem_desc.region[i].size;\r
-- }\r
- \r
- fbdev->state = OMAPFB_ACTIVE;\r
- \r
--- \r
-1.6.3.2\r
-\r
---\r
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in\r
-the body of a message to majordomo@vger.kernel.org\r
-More majordomo info at http://vger.kernel.org/majordomo-info.html\r
-\r
--- /dev/null
+From 416c7ba6ec7041dc4d61340adf73c9467ff8073a Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@beagleboard.org>
+Date: Wed, 23 Sep 2009 09:35:15 +0200
+Subject: [PATCH] ARM: OMAP: Fix beagleboard EHCI setup
+
+The EHCI configuration in the beagleboard board file was copy/pasted
+from the sdp one and hence wrong. The beagleboard only used one port
+and lacks a charge pump.
+
+Tested on revision C1D and C3 boards
+
+Signed-off-by: Koen Kooi <koen@beagleboard.org>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c | 6 +++---
+ 1 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 496b4a0..aa403e6 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
++++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -406,10 +406,10 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+- .chargepump = true,
++ .chargepump = false,
+ .phy_reset = true,
+- .reset_gpio_port[0] = 57,
+- .reset_gpio_port[1] = 61,
++ .reset_gpio_port[0] = -EINVAL,
++ .reset_gpio_port[1] = 147,
+ .reset_gpio_port[2] = -EINVAL
+ };
+
+--
+1.6.2.4
+
+++ /dev/null
-From 9c6a05af8f862025f5187a2f37be87db39ae709f Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Fri, 3 Jul 2009 15:55:24 +0530
-Subject: [PATCH 02/16] ehci: fix ehci pin mux init
-
-EHCI pin mux init fucntion is still using old #ifdef which are not defined
-anymore.This causes pin mux init to always set TLL settings and thus EHCI
-PHY mode doesn't work.
-
-Fixing this issue by using phy_mode parameter to initialize mux settings.
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
----
- arch/arm/mach-omap2/usb-ehci.c | 167 ++++++++++++++++++++--------------------
- 1 files changed, 83 insertions(+), 84 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
-index 56fc7f4..6a96569 100644
---- a/arch/arm/mach-omap2/usb-ehci.c
-+++ b/arch/arm/mach-omap2/usb-ehci.c
-@@ -68,90 +68,89 @@ static struct platform_device ehci_device = {
- /*
- * setup_ehci_io_mux - initialize IO pad mux for USBHOST
- */
--static void setup_ehci_io_mux(void)
-+static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
- {
--#ifdef CONFIG_OMAP_EHCI_PHY_MODE
-- /* PHY mode of operation for board: 750-2083-001
-- * ISP1504 connected to Port1 and Port2
-- * Do Func Mux setting for 12-pin ULPI PHY mode
-- */
--
-- /* Port1 */
-- omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
-- omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
-- omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
-- omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
-- omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
-- omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
-- omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
-- omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
-- omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
-- omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
-- omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
-- omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
--
-- /* Port2 */
-- omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
-- omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
-- omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
-- omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
-- omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
-- omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
-- omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
-- omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
-- omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
-- omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
-- omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
-- omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
--
--#else
-- /* Set Func mux for :
-- * TLL mode of operation
-- * 12-pin ULPI SDR TLL mode for Port1/2/3
-- */
--
-- /* Port1 */
-- omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
-- omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
-- omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
-- omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
-- omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
-- omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
-- omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
-- omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
-- omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
-- omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
-- omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
-- omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
--
-- /* Port2 */
-- omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
-- omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
-- omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
-- omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
-- omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
-- omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
-- omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
-- omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
-- omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
-- omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
-- omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
-- omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
--
-- /* Port3 */
-- omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
-- omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
-- omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
-- omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
-- omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
-- omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
-- omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
-- omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
-- omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
-- omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
-- omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
-- omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
--#endif /* CONFIG_OMAP_EHCI_PHY_MODE */
-+ if (phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
-+ /* PHY mode of operation for board: 750-2083-001
-+ * ISP1504 connected to Port1 and Port2
-+ * Do Func Mux setting for 12-pin ULPI PHY mode
-+ */
-+ /* Port1 */
-+ omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
-+ omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
-+ omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
-+ omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
-+ omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
-+ omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
-+ omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
-+ omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
-+ omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
-+ omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
-+ omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
-+ omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
-+
-+ /* Port2 */
-+ omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
-+ omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
-+ omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
-+ omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
-+ omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
-+ omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
-+ omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
-+ omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
-+ omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
-+ omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
-+ omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
-+ omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
-+
-+ } else {
-+ /* Set Func mux for :
-+ * TLL mode of operation
-+ * 12-pin ULPI SDR TLL mode for Port1/2/3
-+ */
-+
-+ /* Port1 */
-+ omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
-+ omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
-+ omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
-+ omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
-+ omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
-+ omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
-+ omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
-+ omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
-+ omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
-+ omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
-+ omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
-+ omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
-+
-+ /* Port2 */
-+ omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
-+ omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
-+ omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
-+ omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
-+ omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
-+ omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
-+ omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
-+ omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
-+ omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
-+ omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
-+ omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
-+ omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
-+
-+ /* Port3 */
-+ omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
-+ omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
-+ omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
-+ omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
-+ omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
-+ omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
-+ omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
-+ omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
-+ omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
-+ omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
-+ omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
-+ omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
-+ }
-
- return;
- }
-@@ -172,7 +171,7 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
-
- /* Setup Pin IO MUX for EHCI */
- if (cpu_is_omap34xx())
-- setup_ehci_io_mux();
-+ setup_ehci_io_mux(phy_mode);
-
- if (platform_device_register(&ehci_device) < 0) {
- printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
---
-1.6.2.4
-
+++ /dev/null
-From 2f0fe550c81056cb22c0cb8bf54c464e313e1047 Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Mon, 6 Jul 2009 12:46:08 +0530
-Subject: [PATCH 03/16] ehci: adding mux pin for EHCI phy reset line
-
-GPIO135 is used as EHCI (port2) phy reset pin on Multi Media Daughter card
-connected to OMAP3EVM.
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
----
- arch/arm/mach-omap2/mux.c | 2 ++
- arch/arm/plat-omap/include/mach/mux.h | 1 +
- 2 files changed, 3 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
-index 2daa595..339ba80 100644
---- a/arch/arm/mach-omap2/mux.c
-+++ b/arch/arm/mach-omap2/mux.c
-@@ -472,6 +472,8 @@ MUX_CFG_34XX("G25_34XX_GPIO86_OUT", 0x0fc,
- OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
- MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160,
- OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
-+MUX_CFG_34XX("AF4_34XX_GPIO135_OUT", 0x162,
-+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
- MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164,
- OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
- MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
-diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
-index 98dfab6..4bcf8a5 100644
---- a/arch/arm/plat-omap/include/mach/mux.h
-+++ b/arch/arm/plat-omap/include/mach/mux.h
-@@ -846,6 +846,7 @@ enum omap34xx_index {
- L8_34XX_GPIO63,
- G25_34XX_GPIO86_OUT,
- AG4_34XX_GPIO134_OUT,
-+ AF4_34XX_GPIO135_OUT,
- AE4_34XX_GPIO136_OUT,
- AF6_34XX_GPIO140_UP,
- AE6_34XX_GPIO141,
---
-1.6.2.4
-
+++ /dev/null
-From 4cc29612d5a706049b14e67bcc3b22490bdddcf7 Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Fri, 10 Jul 2009 10:01:39 +0530
-Subject: [PATCH 04/16] ehci: correct EHCI init parameters on OMAP3EVM
-
-Multimedia Daughter card on OMAP3EVM uses port2 as EHCI port.
-Other ports (port1 and port3)are not used.
-
-GPIO135 has been used as EHCI phy reset pin so the mux config
-is also setup.
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
----
- arch/arm/mach-omap2/board-omap3evm.c | 4 +++-
- 1 files changed, 3 insertions(+), 1 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
-index 35f6075..18b747b 100644
---- a/arch/arm/mach-omap2/board-omap3evm.c
-+++ b/arch/arm/mach-omap2/board-omap3evm.c
-@@ -308,7 +308,9 @@ static void __init omap3_evm_init(void)
- usb_nop_xceiv_register();
- #endif
- usb_musb_init();
-- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
-+ /* Setup EHCI phy reset padconfig */
-+ omap_cfg_reg(AF4_34XX_GPIO135_OUT);
-+ usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -EINVAL, 135);
- ads7846_dev_init();
- }
-
---
-1.6.2.4
-
+++ /dev/null
-From 42c413f8f9005a5ca109f82baff81f8e400b8854 Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Mon, 13 Jul 2009 14:10:46 +0530
-Subject: [PATCH 05/16] ehci: fix phy_reset init in ehci probe
-
-phy_reset is not getting updated from platform_data.
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
----
- drivers/usb/host/ehci-omap.c | 2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
-index 0058f03..55e5259 100644
---- a/drivers/usb/host/ehci-omap.c
-+++ b/drivers/usb/host/ehci-omap.c
-@@ -33,7 +33,6 @@
- * - add suspend/resume
- * - move workarounds to board-files
- * - differentiate between ES2.x and ES3.x
-- * - make it enumerate devices
- */
-
- #include <linux/platform_device.h>
-@@ -590,6 +589,7 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
-
- platform_set_drvdata(pdev, omap);
- omap->dev = &pdev->dev;
-+ omap->phy_reset = pdata->phy_reset;
- omap->reset_gpio_port1 = pdata->reset_gpio_port1;
- omap->reset_gpio_port2 = pdata->reset_gpio_port2;
- omap->phy_mode = pdata->phy_mode;
---
-1.6.2.4
-
+++ /dev/null
-From 4e499dd02940a567ca805010e9c3f78d8ab7bc79 Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Mon, 6 Jul 2009 17:59:02 +0530
-Subject: [PATCH 06/16] ehci: increase timeout to fix ehci failure
-
-Sometime during TLL reset and waiting loop for TLL reset timeouts and thus
-ehci init fails. Fixing this by increasing timeout value.
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
----
- drivers/usb/host/ehci-omap.c | 2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
-index 55e5259..c7631f5 100644
---- a/drivers/usb/host/ehci-omap.c
-+++ b/drivers/usb/host/ehci-omap.c
-@@ -244,7 +244,7 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask)
- */
- static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
- {
-- unsigned long timeout = jiffies + msecs_to_jiffies(100);
-+ unsigned long timeout = jiffies + msecs_to_jiffies(1000);
- unsigned reg = 0;
- int ret = 0;
-
---
-1.6.2.4
-
+++ /dev/null
-From 4d0b781b146ee79cee1208589498e8ac959d5796 Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Thu, 13 Aug 2009 09:10:44 +0530
-Subject: [PATCH 07/16] ehci: portwise configurations
-
-OMAP3 EHCI has three ports and we can configure port modes
-(PHY/TLL) on per port basis in silicon version ES3.0 onwards.
-
-This patch modifies the existing EHCI driver to accomodate
-portwise mode configuration.
-
-Changes being done:
-
- - Pass platform_data pointer as parameter to usb_ehci_init()
- to avoid multiple parameters.
- - Use platform_data pointer in usb-ehci.c as platform_data
- directly without copying it to another *pdata*.
- - Initializing platform_data in all platform files with
- platform specific ehci parameters.
- - Added port_mode[OMAP_HS_USB_PORTS]in platform_data
- structures.This allows to setup mux pins on per port basis.
- - Added phy_reset_gpio[OMAP_HS_USB_PORTS].
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
----
- arch/arm/mach-omap2/board-3430sdp.c | 15 +++++-
- arch/arm/mach-omap2/board-omap3beagle.c | 15 +++++-
- arch/arm/mach-omap2/board-omap3evm.c | 15 +++++-
- arch/arm/mach-omap2/board-omap3pandora.c | 15 +++++-
- arch/arm/mach-omap2/usb-ehci.c | 95 +++++++++++++++---------------
- arch/arm/plat-omap/include/mach/usb.h | 12 ++--
- drivers/usb/host/ehci-omap.c | 63 +++++++++++---------
- 7 files changed, 145 insertions(+), 85 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
-index 439ebcc..f9fabb0 100644
---- a/arch/arm/mach-omap2/board-3430sdp.c
-+++ b/arch/arm/mach-omap2/board-3430sdp.c
-@@ -480,6 +480,19 @@ static void enable_board_wakeup_source(void)
- omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
- }
-
-+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
-+
-+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
-+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
-+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
-+
-+ .chargepump = true,
-+ .phy_reset = true,
-+ .reset_gpio_port[0] = 57,
-+ .reset_gpio_port[1] = 61,
-+ .reset_gpio_port[2] = -EINVAL
-+};
-+
- static void __init omap_3430sdp_init(void)
- {
- omap3430_i2c_init();
-@@ -495,8 +508,8 @@ static void __init omap_3430sdp_init(void)
- omap_serial_init();
- usb_musb_init();
- board_smc91x_init();
-- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
- enable_board_wakeup_source();
-+ usb_ehci_init(&ehci_pdata);
- }
-
- static void __init omap_3430sdp_map_io(void)
-diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
-index a661fe3..4109969 100644
---- a/arch/arm/mach-omap2/board-omap3beagle.c
-+++ b/arch/arm/mach-omap2/board-omap3beagle.c
-@@ -395,6 +395,19 @@ static void __init omap3beagle_flash_init(void)
- }
- }
-
-+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
-+
-+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
-+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
-+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
-+
-+ .chargepump = false,
-+ .phy_reset = true,
-+ .reset_gpio_port[0] = -EINVAL,
-+ .reset_gpio_port[1] = 147,
-+ .reset_gpio_port[2] = -EINVAL
-+};
-+
- static void __init omap3_beagle_init(void)
- {
- omap3_beagle_i2c_init();
-@@ -408,7 +421,7 @@ static void __init omap3_beagle_init(void)
- gpio_direction_output(170, true);
-
- usb_musb_init();
-- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
-+ usb_ehci_init(&ehci_pdata);
- omap3beagle_flash_init();
-
- /* Ensure SDRC pins are mux'd for self-refresh */
-diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
-index 18b747b..62a6f32 100644
---- a/arch/arm/mach-omap2/board-omap3evm.c
-+++ b/arch/arm/mach-omap2/board-omap3evm.c
-@@ -293,6 +293,19 @@ static struct platform_device *omap3_evm_devices[] __initdata = {
- &omap3evm_smc911x_device,
- };
-
-+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
-+
-+ .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
-+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
-+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
-+
-+ .chargepump = false,
-+ .phy_reset = true,
-+ .reset_gpio_port[0] = -EINVAL,
-+ .reset_gpio_port[1] = 135,
-+ .reset_gpio_port[2] = -EINVAL
-+};
-+
- static void __init omap3_evm_init(void)
- {
- omap3_evm_i2c_init();
-@@ -310,7 +323,7 @@ static void __init omap3_evm_init(void)
- usb_musb_init();
- /* Setup EHCI phy reset padconfig */
- omap_cfg_reg(AF4_34XX_GPIO135_OUT);
-- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -EINVAL, 135);
-+ usb_ehci_init(&ehci_pdata);
- ads7846_dev_init();
- }
-
-diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
-index c9d6488..9f115dc 100644
---- a/arch/arm/mach-omap2/board-omap3pandora.c
-+++ b/arch/arm/mach-omap2/board-omap3pandora.c
-@@ -383,6 +383,19 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
- &pandora_keys_gpio,
- };
-
-+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
-+
-+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
-+ .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
-+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
-+
-+ .chargepump = false,
-+ .phy_reset = true,
-+ .reset_gpio_port[0] = 16,
-+ .reset_gpio_port[1] = -EINVAL,
-+ .reset_gpio_port[2] = -EINVAL
-+};
-+
- static void __init omap3pandora_init(void)
- {
- omap3pandora_i2c_init();
-@@ -392,7 +405,7 @@ static void __init omap3pandora_init(void)
- spi_register_board_info(omap3pandora_spi_board_info,
- ARRAY_SIZE(omap3pandora_spi_board_info));
- omap3pandora_ads7846_init();
-- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, 16, -EINVAL);
-+ usb_ehci_init(&ehci_pdata);
- pandora_keys_gpio_init();
- usb_musb_init();
-
-diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
-index 6a96569..a29c8ca 100644
---- a/arch/arm/mach-omap2/usb-ehci.c
-+++ b/arch/arm/mach-omap2/usb-ehci.c
-@@ -68,14 +68,10 @@ static struct platform_device ehci_device = {
- /*
- * setup_ehci_io_mux - initialize IO pad mux for USBHOST
- */
--static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
-+static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
- {
-- if (phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
-- /* PHY mode of operation for board: 750-2083-001
-- * ISP1504 connected to Port1 and Port2
-- * Do Func Mux setting for 12-pin ULPI PHY mode
-- */
-- /* Port1 */
-+ switch (port_mode[0]) {
-+ case EHCI_HCD_OMAP_MODE_PHY:
- omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
- omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
- omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
-@@ -88,28 +84,8 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
- omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
- omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
- omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
--
-- /* Port2 */
-- omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
-- omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
-- omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
-- omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
-- omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
-- omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
-- omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
-- omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
-- omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
-- omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
-- omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
-- omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
--
-- } else {
-- /* Set Func mux for :
-- * TLL mode of operation
-- * 12-pin ULPI SDR TLL mode for Port1/2/3
-- */
--
-- /* Port1 */
-+ break;
-+ case EHCI_HCD_OMAP_MODE_TLL:
- omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
- omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
- omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
-@@ -122,8 +98,29 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
- omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
- omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
- omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
-+ break;
-+ case EHCI_HCD_OMAP_MODE_UNKNOWN:
-+ /* FALLTHROUGH */
-+ default:
-+ break;
-+ }
-
-- /* Port2 */
-+ switch (port_mode[1]) {
-+ case EHCI_HCD_OMAP_MODE_PHY:
-+ omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
-+ omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
-+ omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
-+ omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
-+ omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
-+ omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
-+ omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
-+ omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
-+ omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
-+ omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
-+ omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
-+ omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
-+ break;
-+ case EHCI_HCD_OMAP_MODE_TLL:
- omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
- omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
- omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
-@@ -136,8 +133,18 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
- omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
- omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
- omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
-+ break;
-+ case EHCI_HCD_OMAP_MODE_UNKNOWN:
-+ /* FALLTHROUGH */
-+ default:
-+ break;
-+ }
-
-- /* Port3 */
-+ switch (port_mode[2]) {
-+ case EHCI_HCD_OMAP_MODE_PHY:
-+ printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
-+ break;
-+ case EHCI_HCD_OMAP_MODE_TLL:
- omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
- omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
- omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
-@@ -150,28 +157,23 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
- omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
- omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
- omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
-+ break;
-+ case EHCI_HCD_OMAP_MODE_UNKNOWN:
-+ /* FALLTHROUGH */
-+ default:
-+ break;
- }
-
- return;
- }
-
--static struct ehci_hcd_omap_platform_data pdata __initconst;
--
--void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
-- int chargepump, int phy_reset, int reset_gpio_port1,
-- int reset_gpio_port2)
-+void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
- {
-- pdata.phy_mode = phy_mode;
-- pdata.chargepump = chargepump;
-- pdata.phy_reset = phy_reset;
-- pdata.reset_gpio_port1 = reset_gpio_port1;
-- pdata.reset_gpio_port2 = reset_gpio_port2;
--
-- platform_device_add_data(&ehci_device, &pdata, sizeof(pdata));
-+ platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
-
- /* Setup Pin IO MUX for EHCI */
- if (cpu_is_omap34xx())
-- setup_ehci_io_mux(phy_mode);
-+ setup_ehci_io_mux(pdata->port_mode);
-
- if (platform_device_register(&ehci_device) < 0) {
- printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
-@@ -181,9 +183,8 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
-
- #else
-
--void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
-- int chargepump, int phy_reset, int reset_gpio_port1,
-- int reset_gpio_port2)
-+void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
-+
- {
- }
-
-diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h
-index 1b1366c..d1b14cc 100644
---- a/arch/arm/plat-omap/include/mach/usb.h
-+++ b/arch/arm/plat-omap/include/mach/usb.h
-@@ -5,6 +5,7 @@
-
- #include <mach/board.h>
-
-+#define OMAP3_HS_USB_PORTS 3
- enum ehci_hcd_omap_mode {
- EHCI_HCD_OMAP_MODE_UNKNOWN,
- EHCI_HCD_OMAP_MODE_PHY,
-@@ -12,13 +13,12 @@ enum ehci_hcd_omap_mode {
- };
-
- struct ehci_hcd_omap_platform_data {
-- enum ehci_hcd_omap_mode phy_mode;
-+ enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS];
- unsigned chargepump:1;
- unsigned phy_reset:1;
-
-- /* have to be valid if phy_reset is true */
-- int reset_gpio_port1;
-- int reset_gpio_port2;
-+ /* have to be valid if phy_reset is true and portx is in phy mode */
-+ int reset_gpio_port[OMAP3_HS_USB_PORTS];
- };
-
- /*-------------------------------------------------------------------------*/
-@@ -45,9 +45,7 @@ struct ehci_hcd_omap_platform_data {
-
- extern void usb_musb_init(void);
-
--extern void usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
-- int chargepump, int phy_reset, int reset_gpio_port1,
-- int reset_gpio_port2);
-+extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata);
-
- #endif
-
-diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
-index c7631f5..3175122 100644
---- a/drivers/usb/host/ehci-omap.c
-+++ b/drivers/usb/host/ehci-omap.c
-@@ -162,8 +162,7 @@ struct ehci_hcd_omap {
- */
-
- /* gpio for resetting phy */
-- int reset_gpio_port1;
-- int reset_gpio_port2;
-+ int reset_gpio_port[OMAP3_HS_USB_PORTS];
-
- /* phy reset workaround */
- int phy_reset;
-@@ -172,7 +171,7 @@ struct ehci_hcd_omap {
- int chargepump;
-
- /* desired phy_mode: TLL, PHY */
-- enum ehci_hcd_omap_mode phy_mode;
-+ enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS];
-
- void __iomem *uhh_base;
- void __iomem *tll_base;
-@@ -297,14 +296,16 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
-
- if (omap->phy_reset) {
- /* Refer: ISSUE1 */
-- if (gpio_is_valid(omap->reset_gpio_port1)) {
-- gpio_request(omap->reset_gpio_port1, "USB1 PHY reset");
-- gpio_direction_output(omap->reset_gpio_port1, 0);
-+ if (gpio_is_valid(omap->reset_gpio_port[0])) {
-+ gpio_request(omap->reset_gpio_port[0],
-+ "USB1 PHY reset");
-+ gpio_direction_output(omap->reset_gpio_port[0], 0);
- }
-
-- if (gpio_is_valid(omap->reset_gpio_port2)) {
-- gpio_request(omap->reset_gpio_port2, "USB2 PHY reset");
-- gpio_direction_output(omap->reset_gpio_port2, 0);
-+ if (gpio_is_valid(omap->reset_gpio_port[1])) {
-+ gpio_request(omap->reset_gpio_port[1],
-+ "USB2 PHY reset");
-+ gpio_direction_output(omap->reset_gpio_port[1], 0);
- }
-
- /* Hold the PHY in RESET for enough time till DIR is high */
-@@ -361,7 +362,10 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
-
- ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
-
-- if (omap->phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
-+ if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
-+ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
-+ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) {
-+
- reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
-
- reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
-@@ -374,7 +378,9 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
- ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
- dev_dbg(omap->dev, "Entered ULPI PHY MODE: success\n");
-
-- } else if (omap->phy_mode == EHCI_HCD_OMAP_MODE_TLL) {
-+ } else if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
-+ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
-+ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
-
- /* Enable UTMI mode for all 3 TLL channels */
- omap_usb_utmi_init(omap,
-@@ -396,11 +402,11 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
- */
- udelay(10);
-
-- if (gpio_is_valid(omap->reset_gpio_port1))
-- gpio_set_value(omap->reset_gpio_port1, 1);
-+ if (gpio_is_valid(omap->reset_gpio_port[0]))
-+ gpio_set_value(omap->reset_gpio_port[0], 1);
-
-- if (gpio_is_valid(omap->reset_gpio_port2))
-- gpio_set_value(omap->reset_gpio_port2, 1);
-+ if (gpio_is_valid(omap->reset_gpio_port[1]))
-+ gpio_set_value(omap->reset_gpio_port[1], 1);
- }
-
- if (omap->chargepump) {
-@@ -438,11 +444,11 @@ err_tll_fck:
- clk_put(omap->usbhost1_48m_fck);
-
- if (omap->phy_reset) {
-- if (gpio_is_valid(omap->reset_gpio_port1))
-- gpio_free(omap->reset_gpio_port1);
-+ if (gpio_is_valid(omap->reset_gpio_port[0]))
-+ gpio_free(omap->reset_gpio_port[0]);
-
-- if (gpio_is_valid(omap->reset_gpio_port2))
-- gpio_free(omap->reset_gpio_port2);
-+ if (gpio_is_valid(omap->reset_gpio_port[1]))
-+ gpio_free(omap->reset_gpio_port[1]);
- }
-
- err_host_48m_fck:
-@@ -531,11 +537,11 @@ static void omap_stop_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
- }
-
- if (omap->phy_reset) {
-- if (gpio_is_valid(omap->reset_gpio_port1))
-- gpio_free(omap->reset_gpio_port1);
-+ if (gpio_is_valid(omap->reset_gpio_port[0]))
-+ gpio_free(omap->reset_gpio_port[0]);
-
-- if (gpio_is_valid(omap->reset_gpio_port2))
-- gpio_free(omap->reset_gpio_port2);
-+ if (gpio_is_valid(omap->reset_gpio_port[1]))
-+ gpio_free(omap->reset_gpio_port[1]);
- }
-
- dev_dbg(omap->dev, "Clock to USB host has been disabled\n");
-@@ -590,10 +596,13 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
- platform_set_drvdata(pdev, omap);
- omap->dev = &pdev->dev;
- omap->phy_reset = pdata->phy_reset;
-- omap->reset_gpio_port1 = pdata->reset_gpio_port1;
-- omap->reset_gpio_port2 = pdata->reset_gpio_port2;
-- omap->phy_mode = pdata->phy_mode;
-- omap->chargepump = pdata->chargepump;
-+ omap->reset_gpio_port[0] = pdata->reset_gpio_port[0];
-+ omap->reset_gpio_port[1] = pdata->reset_gpio_port[1];
-+ omap->reset_gpio_port[2] = pdata->reset_gpio_port[2];
-+ omap->port_mode[0] = pdata->port_mode[0];
-+ omap->port_mode[1] = pdata->port_mode[1];
-+ omap->port_mode[2] = pdata->port_mode[2];
-+ omap->chargepump = pdata->chargepump;
- omap->ehci = hcd_to_ehci(hcd);
- omap->ehci->sbrn = 0x20;
-
---
-1.6.2.4
-
+++ /dev/null
-From 2caa398b8d7d37ecbf062fd36c54ed6807e3ab5b Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Mon, 13 Jul 2009 14:13:26 +0530
-Subject: [PATCH 09/16] ehci: Support for ES3.x
-
-OMAP ES3.x supports portwise PHY or TLL mode of operation whereas
-in ES2.x all the three ports can either be in PHY mode or in TLL
-mode.Port3 can not be configured in PHY mode.
-
-Port mode must be defined either PHY, TLL or UNKNOWN in platform
-files.Be careful of the scenario where one port is set as PHY and
-other in TLL but the OMAP silicon version is 2.x or earlier where
-this scenario is *not* supported.
-
-Changes are :
- - Setup all the bypass configuration in omap_start_ehc()
- based on ES version.
- - Remove UHH_HOSTCONFIG programming for bypass settings
- in omap_usb_utmi_init()
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
----
- drivers/usb/host/ehci-omap.c | 90 ++++++++++++++++++++++++------------------
- 1 files changed, 52 insertions(+), 38 deletions(-)
-
-diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
-index 3175122..81a0b65 100644
---- a/drivers/usb/host/ehci-omap.c
-+++ b/drivers/usb/host/ehci-omap.c
-@@ -32,7 +32,6 @@
- * - move DPLL5 programming to clock fw
- * - add suspend/resume
- * - move workarounds to board-files
-- * - differentiate between ES2.x and ES3.x
- */
-
- #include <linux/platform_device.h>
-@@ -102,6 +101,9 @@
- #define OMAP_UHH_SYSSTATUS (0x14)
- #define OMAP_UHH_HOSTCONFIG (0x40)
- #define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS (1 << 0)
-+#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS (1 << 0)
-+#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS (1 << 11)
-+#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS (1 << 12)
- #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
- #define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
- #define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
-@@ -185,16 +187,6 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask)
- unsigned reg;
- int i;
-
-- reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
-- reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS
-- | OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
-- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
-- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN;
-- reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
--
-- /* Use UTMI Ports of TLL */
-- ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
--
- /* Program the 3 TLL channels upfront */
- for (i = 0; i < OMAP_TLL_CHANNEL_COUNT; i++) {
- reg = ehci_omap_readl(omap->tll_base, OMAP_TLL_CHANNEL_CONF(i));
-@@ -243,7 +235,9 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask)
- */
- static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
- {
-+ struct omap_chip_id oci = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3);
- unsigned long timeout = jiffies + msecs_to_jiffies(1000);
-+ u8 tll_ch_mask = 0;
- unsigned reg = 0;
- int ret = 0;
-
-@@ -362,37 +356,58 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
-
- ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
-
-- if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
-- (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
-- (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) {
-+ reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
-
-- reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
-+ /* setup ULPI bypass and burst configurations */
-+ reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
-+ | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
-+ | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
-+ reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
-
-- reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
-- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
-- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
-- reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_BYPASS
-- | OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN);
-+ /* Bypass the TLL module for PHY mode operation */
-+ if (omap_chip_is(oci)) {
-+ dev_dbg(omap->dev, "OMAP3 ES version > ES3\n");
-+ if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
-+ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
-+ else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
-+ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
-
-- /* Bypass the TLL module for PHY mode operation */
-- ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
-- dev_dbg(omap->dev, "Entered ULPI PHY MODE: success\n");
-+ if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
-+ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
-+ else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
-+ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
-+
-+ if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)
-+ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
-+ else if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
-+ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
-
-- } else if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
-- (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
-- (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
--
-- /* Enable UTMI mode for all 3 TLL channels */
-- omap_usb_utmi_init(omap,
-- OMAP_TLL_CHANNEL_1_EN_MASK |
-- OMAP_TLL_CHANNEL_2_EN_MASK |
-- OMAP_TLL_CHANNEL_3_EN_MASK
-- );
- } else {
-- dev_err(hcd->self.controller,
-- "UNKOWN mode requested\n");
-- ret = -EINVAL;
-- goto err_unknown_mode;
-+ dev_dbg(omap->dev, "OMAP3 ES version < ES3\n");
-+ if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
-+ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
-+ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY))
-+ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
-+ else
-+ reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
-+ }
-+ ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
-+ dev_dbg(omap->dev, "UHH setup done, uhh_base=%x\n", reg);
-+
-+
-+ if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
-+ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
-+ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
-+
-+ if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
-+ tll_ch_mask |= OMAP_TLL_CHANNEL_1_EN_MASK;
-+ if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
-+ tll_ch_mask |= OMAP_TLL_CHANNEL_2_EN_MASK;
-+ if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
-+ tll_ch_mask |= OMAP_TLL_CHANNEL_3_EN_MASK;
-+
-+ /* Enable UTMI mode for required TLL channels */
-+ omap_usb_utmi_init(omap, tll_ch_mask);
- }
-
- if (omap->phy_reset) {
-@@ -430,7 +445,6 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
-
- return 0;
-
--err_unknown_mode:
- err_sys_status:
- clk_disable(omap->usbtll_ick);
- clk_put(omap->usbtll_ick);
---
-1.6.2.4
-
+++ /dev/null
-From 4ad1dd4ce8c9c04c2fbfad72a78247d848090329 Mon Sep 17 00:00:00 2001
-From: Ajay Kumar Gupta <ajay.gupta@ti.com>
-Date: Fri, 10 Jul 2009 19:46:20 +0530
-Subject: [PATCH 10/16] ehci: update driver with generic change
-
-Update the OMAP EHCI driver in accordance with below patch
-introduced in generic EHCI driver.
-
-commit: b18ffd49e86102a9ed0a1cc83fdafe3891e844e5
-USB: EHCI: update toggle state for linked QHs
-
-Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
----
- drivers/usb/host/ehci-omap.c | 1 +
- 1 files changed, 1 insertions(+), 0 deletions(-)
-
-diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
-index 81a0b65..8b944d7 100644
---- a/drivers/usb/host/ehci-omap.c
-+++ b/drivers/usb/host/ehci-omap.c
-@@ -761,6 +761,7 @@ static const struct hc_driver ehci_omap_hc_driver = {
- .urb_enqueue = ehci_urb_enqueue,
- .urb_dequeue = ehci_urb_dequeue,
- .endpoint_disable = ehci_endpoint_disable,
-+ .endpoint_reset = ehci_endpoint_reset,
-
- /*
- * scheduling support
---
-1.6.2.4
-
DEFAULT_PREFERENCE = "-1"
DEFAULT_PREFERENCE_omapzoom2 = "1"
-SRCREV = "52a962f09ab2306a2ac6e22c2d3bac1a76ac"
+SRCREV = "945044d157dd63c6af0f2ed40a5346382af94eb4"
# The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc
#PV = "2.6.30+2.6.31-rc8+gitr${SRCREV}"
file://madc/madc.patch;patch=1 \
file://arch-has-holes.diff;patch=1 \
file://usb/0001-musb-fix-put_device-call-sequence.patch;patch=1 \
- file://usb/0002-ehci-fix-ehci-pin-mux-init.patch;patch=1 \
- file://usb/0003-ehci-adding-mux-pin-for-EHCI-phy-reset-line.patch;patch=1 \
- file://usb/0004-ehci-correct-EHCI-init-parameters-on-OMAP3EVM.patch;patch=1 \
- file://usb/0005-ehci-fix-phy_reset-init-in-ehci-probe.patch;patch=1 \
- file://usb/0006-ehci-increase-timeout-to-fix-ehci-failure.patch;patch=1 \
- file://usb/0007-ehci-portwise-configurations.patch;patch=1 \
file://usb/0008-omap3-Add-CHIP_GE_OMAP3430ES3-for-HSUSB.patch;patch=1 \
- file://usb/0009-ehci-Support-for-ES3.x.patch;patch=1 \
- file://usb/0010-ehci-update-driver-with-generic-change.patch;patch=1 \
file://usb/0011-musb-fix-musb-gadget_driver-NULL-bug.patch;patch=1 \
file://usb/0012-musb-Add-back-old-musb-procfs-file.patch;patch=1 \
file://usb/0013-musb-Remove-USB_SUSPEND-auto-select-with-OTG.patch;patch=1 \
file://usb/0014-musb-disable-PING-on-status-phase-of-control-transf.patch;patch=1 \
file://usb/0015-musb-Add-context-save-and-restore-support.patch;patch=1 \
file://usb/0016-usb-update-defconfig.patch;patch=1 \
+ file://usb/0001-ARM-OMAP-Fix-beagleboard-EHCI-setup.patch;patch=1 \
file://modedb-hd720.patch;patch=1 \
- file://fix-omapfb.patch;patch=1 \
file://dss2/beagle-dss2-support.patch;patch=1 \
"
git.openpandora.org / openembedded.git / commitdiff